pci.h 2.5 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef __ALPHA_PCI_H
  3. #define __ALPHA_PCI_H
  4. #ifdef __KERNEL__
  5. #include <linux/spinlock.h>
  6. #include <linux/dma-mapping.h>
  7. #include <linux/scatterlist.h>
  8. #include <asm/machvec.h>
  9. /*
  10. * The following structure is used to manage multiple PCI busses.
  11. */
  12. struct pci_iommu_arena;
  13. struct page;
  14. /* A controller. Used to manage multiple PCI busses. */
  15. struct pci_controller {
  16. struct pci_controller *next;
  17. struct pci_bus *bus;
  18. struct resource *io_space;
  19. struct resource *mem_space;
  20. /* The following are for reporting to userland. The invariant is
  21. that if we report a BWX-capable dense memory, we do not report
  22. a sparse memory at all, even if it exists. */
  23. unsigned long sparse_mem_base;
  24. unsigned long dense_mem_base;
  25. unsigned long sparse_io_base;
  26. unsigned long dense_io_base;
  27. /* This one's for the kernel only. It's in KSEG somewhere. */
  28. unsigned long config_space_base;
  29. unsigned int index;
  30. /* For compatibility with current (as of July 2003) pciutils
  31. and XFree86. Eventually will be removed. */
  32. unsigned int need_domain_info;
  33. struct pci_iommu_arena *sg_pci;
  34. struct pci_iommu_arena *sg_isa;
  35. void *sysdata;
  36. };
  37. /* Override the logic in pci_scan_bus for skipping already-configured
  38. bus numbers. */
  39. #define pcibios_assign_all_busses() 1
  40. #define PCIBIOS_MIN_IO alpha_mv.min_io_address
  41. #define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
  42. /* IOMMU controls. */
  43. #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
  44. static inline int pci_proc_domain(struct pci_bus *bus)
  45. {
  46. struct pci_controller *hose = bus->sysdata;
  47. return hose->need_domain_info;
  48. }
  49. #endif /* __KERNEL__ */
  50. /* Values for the `which' argument to sys_pciconfig_iobase. */
  51. #define IOBASE_HOSE 0
  52. #define IOBASE_SPARSE_MEM 1
  53. #define IOBASE_DENSE_MEM 2
  54. #define IOBASE_SPARSE_IO 3
  55. #define IOBASE_DENSE_IO 4
  56. #define IOBASE_ROOT_BUS 5
  57. #define IOBASE_FROM_HOSE 0x10000
  58. extern struct pci_dev *isa_bridge;
  59. extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
  60. size_t count);
  61. extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
  62. size_t count);
  63. extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
  64. struct vm_area_struct *vma,
  65. enum pci_mmap_state mmap_state);
  66. extern void pci_adjust_legacy_attr(struct pci_bus *bus,
  67. enum pci_mmap_state mmap_type);
  68. #define HAVE_PCI_LEGACY 1
  69. extern int pci_create_resource_files(struct pci_dev *dev);
  70. extern void pci_remove_resource_files(struct pci_dev *dev);
  71. #endif /* __ALPHA_PCI_H */