traps.c 15 KB

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  1. /*
  2. * arch/xtensa/kernel/traps.c
  3. *
  4. * Exception handling.
  5. *
  6. * Derived from code with the following copyrights:
  7. * Copyright (C) 1994 - 1999 by Ralf Baechle
  8. * Modified for R3000 by Paul M. Antoine, 1995, 1996
  9. * Complete output from die() by Ulf Carlsson, 1998
  10. * Copyright (C) 1999 Silicon Graphics, Inc.
  11. *
  12. * Essentially rewritten for the Xtensa architecture port.
  13. *
  14. * Copyright (C) 2001 - 2013 Tensilica Inc.
  15. *
  16. * Joe Taylor <[email protected], [email protected]>
  17. * Chris Zankel <[email protected]>
  18. * Marc Gauthier<[email protected], [email protected]>
  19. * Kevin Chea
  20. *
  21. * This file is subject to the terms and conditions of the GNU General Public
  22. * License. See the file "COPYING" in the main directory of this archive
  23. * for more details.
  24. */
  25. #include <linux/kernel.h>
  26. #include <linux/sched/signal.h>
  27. #include <linux/sched/debug.h>
  28. #include <linux/sched/task_stack.h>
  29. #include <linux/init.h>
  30. #include <linux/module.h>
  31. #include <linux/stringify.h>
  32. #include <linux/kallsyms.h>
  33. #include <linux/delay.h>
  34. #include <linux/hardirq.h>
  35. #include <linux/ratelimit.h>
  36. #include <linux/pgtable.h>
  37. #include <asm/stacktrace.h>
  38. #include <asm/ptrace.h>
  39. #include <asm/timex.h>
  40. #include <linux/uaccess.h>
  41. #include <asm/processor.h>
  42. #include <asm/traps.h>
  43. #include <asm/hw_breakpoint.h>
  44. /*
  45. * Machine specific interrupt handlers
  46. */
  47. static void do_illegal_instruction(struct pt_regs *regs);
  48. static void do_div0(struct pt_regs *regs);
  49. static void do_interrupt(struct pt_regs *regs);
  50. #if XTENSA_FAKE_NMI
  51. static void do_nmi(struct pt_regs *regs);
  52. #endif
  53. #if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION
  54. static void do_unaligned_user(struct pt_regs *regs);
  55. #endif
  56. static void do_multihit(struct pt_regs *regs);
  57. #if XTENSA_HAVE_COPROCESSORS
  58. static void do_coprocessor(struct pt_regs *regs);
  59. #endif
  60. static void do_debug(struct pt_regs *regs);
  61. /*
  62. * The vector table must be preceded by a save area (which
  63. * implies it must be in RAM, unless one places RAM immediately
  64. * before a ROM and puts the vector at the start of the ROM (!))
  65. */
  66. #define KRNL 0x01
  67. #define USER 0x02
  68. #define COPROCESSOR(x) \
  69. { EXCCAUSE_COPROCESSOR ## x ## _DISABLED, USER|KRNL, fast_coprocessor },\
  70. { EXCCAUSE_COPROCESSOR ## x ## _DISABLED, 0, do_coprocessor }
  71. typedef struct {
  72. int cause;
  73. int fast;
  74. void* handler;
  75. } dispatch_init_table_t;
  76. static dispatch_init_table_t __initdata dispatch_init_table[] = {
  77. #ifdef CONFIG_USER_ABI_CALL0_PROBE
  78. { EXCCAUSE_ILLEGAL_INSTRUCTION, USER, fast_illegal_instruction_user },
  79. #endif
  80. { EXCCAUSE_ILLEGAL_INSTRUCTION, 0, do_illegal_instruction},
  81. { EXCCAUSE_SYSTEM_CALL, USER, fast_syscall_user },
  82. { EXCCAUSE_SYSTEM_CALL, 0, system_call },
  83. /* EXCCAUSE_INSTRUCTION_FETCH unhandled */
  84. /* EXCCAUSE_LOAD_STORE_ERROR unhandled*/
  85. { EXCCAUSE_LEVEL1_INTERRUPT, 0, do_interrupt },
  86. #ifdef SUPPORT_WINDOWED
  87. { EXCCAUSE_ALLOCA, USER|KRNL, fast_alloca },
  88. #endif
  89. { EXCCAUSE_INTEGER_DIVIDE_BY_ZERO, 0, do_div0 },
  90. /* EXCCAUSE_PRIVILEGED unhandled */
  91. #if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION
  92. #ifdef CONFIG_XTENSA_UNALIGNED_USER
  93. { EXCCAUSE_UNALIGNED, USER, fast_unaligned },
  94. #endif
  95. { EXCCAUSE_UNALIGNED, 0, do_unaligned_user },
  96. { EXCCAUSE_UNALIGNED, KRNL, fast_unaligned },
  97. #endif
  98. #ifdef CONFIG_MMU
  99. { EXCCAUSE_ITLB_MISS, 0, do_page_fault },
  100. { EXCCAUSE_ITLB_MISS, USER|KRNL, fast_second_level_miss},
  101. { EXCCAUSE_DTLB_MISS, USER|KRNL, fast_second_level_miss},
  102. { EXCCAUSE_DTLB_MISS, 0, do_page_fault },
  103. { EXCCAUSE_STORE_CACHE_ATTRIBUTE, USER|KRNL, fast_store_prohibited },
  104. #endif /* CONFIG_MMU */
  105. #ifdef CONFIG_PFAULT
  106. { EXCCAUSE_ITLB_MULTIHIT, 0, do_multihit },
  107. { EXCCAUSE_ITLB_PRIVILEGE, 0, do_page_fault },
  108. { EXCCAUSE_FETCH_CACHE_ATTRIBUTE, 0, do_page_fault },
  109. { EXCCAUSE_DTLB_MULTIHIT, 0, do_multihit },
  110. { EXCCAUSE_DTLB_PRIVILEGE, 0, do_page_fault },
  111. { EXCCAUSE_STORE_CACHE_ATTRIBUTE, 0, do_page_fault },
  112. { EXCCAUSE_LOAD_CACHE_ATTRIBUTE, 0, do_page_fault },
  113. #endif
  114. /* XCCHAL_EXCCAUSE_FLOATING_POINT unhandled */
  115. #if XTENSA_HAVE_COPROCESSOR(0)
  116. COPROCESSOR(0),
  117. #endif
  118. #if XTENSA_HAVE_COPROCESSOR(1)
  119. COPROCESSOR(1),
  120. #endif
  121. #if XTENSA_HAVE_COPROCESSOR(2)
  122. COPROCESSOR(2),
  123. #endif
  124. #if XTENSA_HAVE_COPROCESSOR(3)
  125. COPROCESSOR(3),
  126. #endif
  127. #if XTENSA_HAVE_COPROCESSOR(4)
  128. COPROCESSOR(4),
  129. #endif
  130. #if XTENSA_HAVE_COPROCESSOR(5)
  131. COPROCESSOR(5),
  132. #endif
  133. #if XTENSA_HAVE_COPROCESSOR(6)
  134. COPROCESSOR(6),
  135. #endif
  136. #if XTENSA_HAVE_COPROCESSOR(7)
  137. COPROCESSOR(7),
  138. #endif
  139. #if XTENSA_FAKE_NMI
  140. { EXCCAUSE_MAPPED_NMI, 0, do_nmi },
  141. #endif
  142. { EXCCAUSE_MAPPED_DEBUG, 0, do_debug },
  143. { -1, -1, 0 }
  144. };
  145. /* The exception table <exc_table> serves two functions:
  146. * 1. it contains three dispatch tables (fast_user, fast_kernel, default-c)
  147. * 2. it is a temporary memory buffer for the exception handlers.
  148. */
  149. DEFINE_PER_CPU(struct exc_table, exc_table);
  150. DEFINE_PER_CPU(struct debug_table, debug_table);
  151. void die(const char*, struct pt_regs*, long);
  152. static inline void
  153. __die_if_kernel(const char *str, struct pt_regs *regs, long err)
  154. {
  155. if (!user_mode(regs))
  156. die(str, regs, err);
  157. }
  158. /*
  159. * Unhandled Exceptions. Kill user task or panic if in kernel space.
  160. */
  161. void do_unhandled(struct pt_regs *regs)
  162. {
  163. __die_if_kernel("Caught unhandled exception - should not happen",
  164. regs, SIGKILL);
  165. /* If in user mode, send SIGILL signal to current process */
  166. pr_info_ratelimited("Caught unhandled exception in '%s' "
  167. "(pid = %d, pc = %#010lx) - should not happen\n"
  168. "\tEXCCAUSE is %ld\n",
  169. current->comm, task_pid_nr(current), regs->pc,
  170. regs->exccause);
  171. force_sig(SIGILL);
  172. }
  173. /*
  174. * Multi-hit exception. This if fatal!
  175. */
  176. static void do_multihit(struct pt_regs *regs)
  177. {
  178. die("Caught multihit exception", regs, SIGKILL);
  179. }
  180. /*
  181. * IRQ handler.
  182. */
  183. #if XTENSA_FAKE_NMI
  184. #define IS_POW2(v) (((v) & ((v) - 1)) == 0)
  185. #if !(PROFILING_INTLEVEL == XCHAL_EXCM_LEVEL && \
  186. IS_POW2(XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL)))
  187. #warning "Fake NMI is requested for PMM, but there are other IRQs at or above its level."
  188. #warning "Fake NMI will be used, but there will be a bugcheck if one of those IRQs fire."
  189. static inline void check_valid_nmi(void)
  190. {
  191. unsigned intread = xtensa_get_sr(interrupt);
  192. unsigned intenable = xtensa_get_sr(intenable);
  193. BUG_ON(intread & intenable &
  194. ~(XTENSA_INTLEVEL_ANDBELOW_MASK(PROFILING_INTLEVEL) ^
  195. XTENSA_INTLEVEL_MASK(PROFILING_INTLEVEL) ^
  196. BIT(XCHAL_PROFILING_INTERRUPT)));
  197. }
  198. #else
  199. static inline void check_valid_nmi(void)
  200. {
  201. }
  202. #endif
  203. irqreturn_t xtensa_pmu_irq_handler(int irq, void *dev_id);
  204. DEFINE_PER_CPU(unsigned long, nmi_count);
  205. static void do_nmi(struct pt_regs *regs)
  206. {
  207. struct pt_regs *old_regs = set_irq_regs(regs);
  208. nmi_enter();
  209. ++*this_cpu_ptr(&nmi_count);
  210. check_valid_nmi();
  211. xtensa_pmu_irq_handler(0, NULL);
  212. nmi_exit();
  213. set_irq_regs(old_regs);
  214. }
  215. #endif
  216. static void do_interrupt(struct pt_regs *regs)
  217. {
  218. static const unsigned int_level_mask[] = {
  219. 0,
  220. XCHAL_INTLEVEL1_MASK,
  221. XCHAL_INTLEVEL2_MASK,
  222. XCHAL_INTLEVEL3_MASK,
  223. XCHAL_INTLEVEL4_MASK,
  224. XCHAL_INTLEVEL5_MASK,
  225. XCHAL_INTLEVEL6_MASK,
  226. XCHAL_INTLEVEL7_MASK,
  227. };
  228. struct pt_regs *old_regs = set_irq_regs(regs);
  229. unsigned unhandled = ~0u;
  230. irq_enter();
  231. for (;;) {
  232. unsigned intread = xtensa_get_sr(interrupt);
  233. unsigned intenable = xtensa_get_sr(intenable);
  234. unsigned int_at_level = intread & intenable;
  235. unsigned level;
  236. for (level = LOCKLEVEL; level > 0; --level) {
  237. if (int_at_level & int_level_mask[level]) {
  238. int_at_level &= int_level_mask[level];
  239. if (int_at_level & unhandled)
  240. int_at_level &= unhandled;
  241. else
  242. unhandled |= int_level_mask[level];
  243. break;
  244. }
  245. }
  246. if (level == 0)
  247. break;
  248. /* clear lowest pending irq in the unhandled mask */
  249. unhandled ^= (int_at_level & -int_at_level);
  250. do_IRQ(__ffs(int_at_level), regs);
  251. }
  252. irq_exit();
  253. set_irq_regs(old_regs);
  254. }
  255. static bool check_div0(struct pt_regs *regs)
  256. {
  257. static const u8 pattern[] = {'D', 'I', 'V', '0'};
  258. const u8 *p;
  259. u8 buf[5];
  260. if (user_mode(regs)) {
  261. if (copy_from_user(buf, (void __user *)regs->pc + 2, 5))
  262. return false;
  263. p = buf;
  264. } else {
  265. p = (const u8 *)regs->pc + 2;
  266. }
  267. return memcmp(p, pattern, sizeof(pattern)) == 0 ||
  268. memcmp(p + 1, pattern, sizeof(pattern)) == 0;
  269. }
  270. /*
  271. * Illegal instruction. Fatal if in kernel space.
  272. */
  273. static void do_illegal_instruction(struct pt_regs *regs)
  274. {
  275. #ifdef CONFIG_USER_ABI_CALL0_PROBE
  276. /*
  277. * When call0 application encounters an illegal instruction fast
  278. * exception handler will attempt to set PS.WOE and retry failing
  279. * instruction.
  280. * If we get here we know that that instruction is also illegal
  281. * with PS.WOE set, so it's not related to the windowed option
  282. * hence PS.WOE may be cleared.
  283. */
  284. if (regs->pc == current_thread_info()->ps_woe_fix_addr)
  285. regs->ps &= ~PS_WOE_MASK;
  286. #endif
  287. if (check_div0(regs)) {
  288. do_div0(regs);
  289. return;
  290. }
  291. __die_if_kernel("Illegal instruction in kernel", regs, SIGKILL);
  292. /* If in user mode, send SIGILL signal to current process. */
  293. pr_info_ratelimited("Illegal Instruction in '%s' (pid = %d, pc = %#010lx)\n",
  294. current->comm, task_pid_nr(current), regs->pc);
  295. force_sig(SIGILL);
  296. }
  297. static void do_div0(struct pt_regs *regs)
  298. {
  299. __die_if_kernel("Unhandled division by 0 in kernel", regs, SIGKILL);
  300. force_sig_fault(SIGFPE, FPE_INTDIV, (void __user *)regs->pc);
  301. }
  302. /*
  303. * Handle unaligned memory accesses from user space. Kill task.
  304. *
  305. * If CONFIG_UNALIGNED_USER is not set, we don't allow unaligned memory
  306. * accesses causes from user space.
  307. */
  308. #if XCHAL_UNALIGNED_LOAD_EXCEPTION || XCHAL_UNALIGNED_STORE_EXCEPTION
  309. static void do_unaligned_user(struct pt_regs *regs)
  310. {
  311. __die_if_kernel("Unhandled unaligned exception in kernel",
  312. regs, SIGKILL);
  313. current->thread.bad_vaddr = regs->excvaddr;
  314. current->thread.error_code = -3;
  315. pr_info_ratelimited("Unaligned memory access to %08lx in '%s' "
  316. "(pid = %d, pc = %#010lx)\n",
  317. regs->excvaddr, current->comm,
  318. task_pid_nr(current), regs->pc);
  319. force_sig_fault(SIGBUS, BUS_ADRALN, (void *) regs->excvaddr);
  320. }
  321. #endif
  322. #if XTENSA_HAVE_COPROCESSORS
  323. static void do_coprocessor(struct pt_regs *regs)
  324. {
  325. coprocessor_flush_release_all(current_thread_info());
  326. }
  327. #endif
  328. /* Handle debug events.
  329. * When CONFIG_HAVE_HW_BREAKPOINT is on this handler is called with
  330. * preemption disabled to avoid rescheduling and keep mapping of hardware
  331. * breakpoint structures to debug registers intact, so that
  332. * DEBUGCAUSE.DBNUM could be used in case of data breakpoint hit.
  333. */
  334. static void do_debug(struct pt_regs *regs)
  335. {
  336. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  337. int ret = check_hw_breakpoint(regs);
  338. preempt_enable();
  339. if (ret == 0)
  340. return;
  341. #endif
  342. __die_if_kernel("Breakpoint in kernel", regs, SIGKILL);
  343. /* If in user mode, send SIGTRAP signal to current process */
  344. force_sig(SIGTRAP);
  345. }
  346. #define set_handler(type, cause, handler) \
  347. do { \
  348. unsigned int cpu; \
  349. \
  350. for_each_possible_cpu(cpu) \
  351. per_cpu(exc_table, cpu).type[cause] = (handler);\
  352. } while (0)
  353. /* Set exception C handler - for temporary use when probing exceptions */
  354. xtensa_exception_handler *
  355. __init trap_set_handler(int cause, xtensa_exception_handler *handler)
  356. {
  357. void *previous = per_cpu(exc_table, 0).default_handler[cause];
  358. set_handler(default_handler, cause, handler);
  359. return previous;
  360. }
  361. static void trap_init_excsave(void)
  362. {
  363. xtensa_set_sr(this_cpu_ptr(&exc_table), excsave1);
  364. }
  365. static void trap_init_debug(void)
  366. {
  367. unsigned long debugsave = (unsigned long)this_cpu_ptr(&debug_table);
  368. this_cpu_ptr(&debug_table)->debug_exception = debug_exception;
  369. __asm__ __volatile__("wsr %0, excsave" __stringify(XCHAL_DEBUGLEVEL)
  370. :: "a"(debugsave));
  371. }
  372. /*
  373. * Initialize dispatch tables.
  374. *
  375. * The exception vectors are stored compressed the __init section in the
  376. * dispatch_init_table. This function initializes the following three tables
  377. * from that compressed table:
  378. * - fast user first dispatch table for user exceptions
  379. * - fast kernel first dispatch table for kernel exceptions
  380. * - default C-handler C-handler called by the default fast handler.
  381. *
  382. * See vectors.S for more details.
  383. */
  384. void __init trap_init(void)
  385. {
  386. int i;
  387. /* Setup default vectors. */
  388. for (i = 0; i < EXCCAUSE_N; i++) {
  389. set_handler(fast_user_handler, i, user_exception);
  390. set_handler(fast_kernel_handler, i, kernel_exception);
  391. set_handler(default_handler, i, do_unhandled);
  392. }
  393. /* Setup specific handlers. */
  394. for(i = 0; dispatch_init_table[i].cause >= 0; i++) {
  395. int fast = dispatch_init_table[i].fast;
  396. int cause = dispatch_init_table[i].cause;
  397. void *handler = dispatch_init_table[i].handler;
  398. if (fast == 0)
  399. set_handler(default_handler, cause, handler);
  400. if ((fast & USER) != 0)
  401. set_handler(fast_user_handler, cause, handler);
  402. if ((fast & KRNL) != 0)
  403. set_handler(fast_kernel_handler, cause, handler);
  404. }
  405. /* Initialize EXCSAVE_1 to hold the address of the exception table. */
  406. trap_init_excsave();
  407. trap_init_debug();
  408. }
  409. #ifdef CONFIG_SMP
  410. void secondary_trap_init(void)
  411. {
  412. trap_init_excsave();
  413. trap_init_debug();
  414. }
  415. #endif
  416. /*
  417. * This function dumps the current valid window frame and other base registers.
  418. */
  419. void show_regs(struct pt_regs * regs)
  420. {
  421. int i;
  422. show_regs_print_info(KERN_DEFAULT);
  423. for (i = 0; i < 16; i++) {
  424. if ((i % 8) == 0)
  425. pr_info("a%02d:", i);
  426. pr_cont(" %08lx", regs->areg[i]);
  427. }
  428. pr_cont("\n");
  429. pr_info("pc: %08lx, ps: %08lx, depc: %08lx, excvaddr: %08lx\n",
  430. regs->pc, regs->ps, regs->depc, regs->excvaddr);
  431. pr_info("lbeg: %08lx, lend: %08lx lcount: %08lx, sar: %08lx\n",
  432. regs->lbeg, regs->lend, regs->lcount, regs->sar);
  433. if (user_mode(regs))
  434. pr_cont("wb: %08lx, ws: %08lx, wmask: %08lx, syscall: %ld\n",
  435. regs->windowbase, regs->windowstart, regs->wmask,
  436. regs->syscall);
  437. }
  438. static int show_trace_cb(struct stackframe *frame, void *data)
  439. {
  440. const char *loglvl = data;
  441. if (kernel_text_address(frame->pc))
  442. printk("%s [<%08lx>] %pB\n",
  443. loglvl, frame->pc, (void *)frame->pc);
  444. return 0;
  445. }
  446. static void show_trace(struct task_struct *task, unsigned long *sp,
  447. const char *loglvl)
  448. {
  449. if (!sp)
  450. sp = stack_pointer(task);
  451. printk("%sCall Trace:\n", loglvl);
  452. walk_stackframe(sp, show_trace_cb, (void *)loglvl);
  453. }
  454. #define STACK_DUMP_ENTRY_SIZE 4
  455. #define STACK_DUMP_LINE_SIZE 32
  456. static size_t kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
  457. void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
  458. {
  459. size_t len, off = 0;
  460. if (!sp)
  461. sp = stack_pointer(task);
  462. len = min((-(size_t)sp) & (THREAD_SIZE - STACK_DUMP_ENTRY_SIZE),
  463. kstack_depth_to_print * STACK_DUMP_ENTRY_SIZE);
  464. printk("%sStack:\n", loglvl);
  465. while (off < len) {
  466. u8 line[STACK_DUMP_LINE_SIZE];
  467. size_t line_len = len - off > STACK_DUMP_LINE_SIZE ?
  468. STACK_DUMP_LINE_SIZE : len - off;
  469. __memcpy(line, (u8 *)sp + off, line_len);
  470. print_hex_dump(loglvl, " ", DUMP_PREFIX_NONE,
  471. STACK_DUMP_LINE_SIZE, STACK_DUMP_ENTRY_SIZE,
  472. line, line_len, false);
  473. off += STACK_DUMP_LINE_SIZE;
  474. }
  475. show_trace(task, sp, loglvl);
  476. }
  477. DEFINE_SPINLOCK(die_lock);
  478. void __noreturn die(const char * str, struct pt_regs * regs, long err)
  479. {
  480. static int die_counter;
  481. const char *pr = "";
  482. if (IS_ENABLED(CONFIG_PREEMPTION))
  483. pr = IS_ENABLED(CONFIG_PREEMPT_RT) ? " PREEMPT_RT" : " PREEMPT";
  484. console_verbose();
  485. spin_lock_irq(&die_lock);
  486. pr_info("%s: sig: %ld [#%d]%s\n", str, err, ++die_counter, pr);
  487. show_regs(regs);
  488. if (!user_mode(regs))
  489. show_stack(NULL, (unsigned long *)regs->areg[1], KERN_INFO);
  490. add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
  491. spin_unlock_irq(&die_lock);
  492. if (in_interrupt())
  493. panic("Fatal exception in interrupt");
  494. if (panic_on_oops)
  495. panic("Fatal exception");
  496. make_task_dead(err);
  497. }