mxhead.S 1.3 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364
  1. /*
  2. * Xtensa Secondary Processors startup code.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 2001 - 2013 Tensilica Inc.
  9. *
  10. * Joe Taylor <[email protected]>
  11. * Chris Zankel <[email protected]>
  12. * Marc Gauthier <[email protected], [email protected]>
  13. * Pete Delaney <[email protected]>
  14. */
  15. #include <linux/linkage.h>
  16. #include <asm/cacheasm.h>
  17. #include <asm/initialize_mmu.h>
  18. #include <asm/mxregs.h>
  19. #include <asm/regs.h>
  20. .section .SecondaryResetVector.text, "ax"
  21. ENTRY(_SecondaryResetVector)
  22. _j _SetupOCD
  23. .begin no-absolute-literals
  24. .literal_position
  25. _SetupOCD:
  26. /*
  27. * Initialize WB, WS, and clear PS.EXCM (to allow loop instructions).
  28. * Set Interrupt Level just below XCHAL_DEBUGLEVEL to allow
  29. * xt-gdb to single step via DEBUG exceptions received directly
  30. * by ocd.
  31. */
  32. #if XCHAL_HAVE_WINDOWED
  33. movi a1, 1
  34. movi a0, 0
  35. wsr a1, windowstart
  36. wsr a0, windowbase
  37. rsync
  38. #endif
  39. movi a1, LOCKLEVEL
  40. wsr a1, ps
  41. rsync
  42. _SetupMMU:
  43. #ifdef CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
  44. initialize_mmu
  45. #endif
  46. /*
  47. * Start Secondary Processors with NULL pointer to boot params.
  48. */
  49. movi a2, 0 # a2 == NULL
  50. movi a3, _startup
  51. jx a3
  52. .end no-absolute-literals