irq_64.h 3.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* irq.h: IRQ registers on the 64-bit Sparc.
  3. *
  4. * Copyright (C) 1996 David S. Miller ([email protected])
  5. * Copyright (C) 1998 Jakub Jelinek ([email protected])
  6. */
  7. #ifndef _SPARC64_IRQ_H
  8. #define _SPARC64_IRQ_H
  9. #include <linux/linkage.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/interrupt.h>
  13. #include <asm/pil.h>
  14. #include <asm/ptrace.h>
  15. /* IMAP/ICLR register defines */
  16. #define IMAP_VALID 0x80000000UL /* IRQ Enabled */
  17. #define IMAP_TID_UPA 0x7c000000UL /* UPA TargetID */
  18. #define IMAP_TID_JBUS 0x7c000000UL /* JBUS TargetID */
  19. #define IMAP_TID_SHIFT 26
  20. #define IMAP_AID_SAFARI 0x7c000000UL /* Safari AgentID */
  21. #define IMAP_AID_SHIFT 26
  22. #define IMAP_NID_SAFARI 0x03e00000UL /* Safari NodeID */
  23. #define IMAP_NID_SHIFT 21
  24. #define IMAP_IGN 0x000007c0UL /* IRQ Group Number */
  25. #define IMAP_INO 0x0000003fUL /* IRQ Number */
  26. #define IMAP_INR 0x000007ffUL /* Full interrupt number*/
  27. #define ICLR_IDLE 0x00000000UL /* Idle state */
  28. #define ICLR_TRANSMIT 0x00000001UL /* Transmit state */
  29. #define ICLR_PENDING 0x00000003UL /* Pending state */
  30. /* The largest number of unique interrupt sources we support.
  31. * If this needs to ever be larger than 255, you need to change
  32. * the type of ino_bucket->irq as appropriate.
  33. *
  34. * ino_bucket->irq allocation is made during {sun4v_,}build_irq().
  35. */
  36. #define NR_IRQS (2048)
  37. void irq_install_pre_handler(int irq,
  38. void (*func)(unsigned int, void *, void *),
  39. void *arg1, void *arg2);
  40. #define irq_canonicalize(irq) (irq)
  41. unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
  42. unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
  43. unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
  44. unsigned int sun4v_build_msi(u32 devhandle, unsigned int *irq_p,
  45. unsigned int msi_devino_start,
  46. unsigned int msi_devino_end);
  47. void sun4v_destroy_msi(unsigned int irq);
  48. unsigned int sun4u_build_msi(u32 portid, unsigned int *irq_p,
  49. unsigned int msi_devino_start,
  50. unsigned int msi_devino_end,
  51. unsigned long imap_base,
  52. unsigned long iclr_base);
  53. void sun4u_destroy_msi(unsigned int irq);
  54. unsigned int irq_alloc(unsigned int dev_handle, unsigned int dev_ino);
  55. void irq_free(unsigned int irq);
  56. void __init init_IRQ(void);
  57. void fixup_irqs(void);
  58. static inline void set_softint(unsigned long bits)
  59. {
  60. __asm__ __volatile__("wr %0, 0x0, %%set_softint"
  61. : /* No outputs */
  62. : "r" (bits));
  63. }
  64. static inline void clear_softint(unsigned long bits)
  65. {
  66. __asm__ __volatile__("wr %0, 0x0, %%clear_softint"
  67. : /* No outputs */
  68. : "r" (bits));
  69. }
  70. static inline unsigned long get_softint(void)
  71. {
  72. unsigned long retval;
  73. __asm__ __volatile__("rd %%softint, %0"
  74. : "=r" (retval));
  75. return retval;
  76. }
  77. void arch_trigger_cpumask_backtrace(const struct cpumask *mask,
  78. bool exclude_self);
  79. #define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
  80. extern void *hardirq_stack[NR_CPUS];
  81. extern void *softirq_stack[NR_CPUS];
  82. #define NO_IRQ 0xffffffff
  83. #endif