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android_kernel_samsung_sm8650_ksu
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android_kernel_...
/
arch
/
sparc
/
include
/
asm
/
head_64.h

head_64.h 2.1 KB
История Исходник

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  1. /* SPDX-License-Identifier: GPL-2.0 */
    2. 

  2. #ifndef _SPARC64_HEAD_H
    3. 

  3. #define _SPARC64_HEAD_H
    4. 

  4. 

  5. #include <asm/pstate.h>
    6. 

  6. 

  7. 	/* wrpr	%g0, val, %gl */
    8. 

  8. #define SET_GL(val)	\
    9. 

  9. 	.word	0xa1902000 | val
    10. 

  10. 

  11. 	/* rdpr %gl, %gN */
    12. 

  12. #define GET_GL_GLOBAL(N)	\
    13. 

  13. 	.word	0x81540000 | (N << 25)
    14. 

  14. 

  15. #define KERNBASE	0x400000
    16. 

  16. 

  17. #define	PTREGS_OFF	(STACK_BIAS + STACKFRAME_SZ)
    18. 

  18. 

  19. #define	RTRAP_PSTATE		(PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV|PSTATE_IE)
    20. 

  20. #define	RTRAP_PSTATE_IRQOFF	(PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV)
    21. 

  21. #define RTRAP_PSTATE_AG_IRQOFF	(PSTATE_TSO|PSTATE_PEF|PSTATE_PRIV|PSTATE_AG)
    22. 

  22. 

  23. #define __CHEETAH_ID	0x003e0014
    24. 

  24. #define __JALAPENO_ID	0x003e0016
    25. 

  25. #define __SERRANO_ID	0x003e0022
    26. 

  26. 

  27. #define CHEETAH_MANUF		0x003e
    28. 

  28. #define CHEETAH_IMPL		0x0014 /* Ultra-III   */
    29. 

  29. #define CHEETAH_PLUS_IMPL	0x0015 /* Ultra-III+  */
    30. 

  30. #define JALAPENO_IMPL		0x0016 /* Ultra-IIIi  */
    31. 

  31. #define JAGUAR_IMPL		0x0018 /* Ultra-IV    */
    32. 

  32. #define PANTHER_IMPL		0x0019 /* Ultra-IV+   */
    33. 

  33. #define SERRANO_IMPL		0x0022 /* Ultra-IIIi+ */
    34. 

  34. 

  35. #define BRANCH_IF_SUN4V(tmp1,label)		\
    36. 

  36. 	sethi	%hi(is_sun4v), %tmp1;		\
    37. 

  37. 	lduw	[%tmp1 + %lo(is_sun4v)], %tmp1; \
    38. 

  38. 	brnz,pn	%tmp1, label;			\
    39. 

  39. 	 nop
    40. 

  40. 

  41. #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label)	\
    42. 

  42. 	rdpr	%ver, %tmp1;			\
    43. 

  43. 	sethi	%hi(__CHEETAH_ID), %tmp2;	\
    44. 

  44. 	srlx	%tmp1, 32, %tmp1;		\
    45. 

  45. 	or	%tmp2, %lo(__CHEETAH_ID), %tmp2;\
    46. 

  46. 	cmp	%tmp1, %tmp2;			\
    47. 

  47. 	be,pn	%icc, label;			\
    48. 

  48. 	 nop;
    49. 

  49. 

  50. #define BRANCH_IF_JALAPENO(tmp1,tmp2,label)	\
    51. 

  51. 	rdpr	%ver, %tmp1;			\
    52. 

  52. 	sethi	%hi(__JALAPENO_ID), %tmp2;	\
    53. 

  53. 	srlx	%tmp1, 32, %tmp1;		\
    54. 

  54. 	or	%tmp2, %lo(__JALAPENO_ID), %tmp2;\
    55. 

  55. 	cmp	%tmp1, %tmp2;			\
    56. 

  56. 	be,pn	%icc, label;			\
    57. 

  57. 	 nop;
    58. 

  58. 

  59. #define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label)	\
    60. 

  60. 	rdpr	%ver, %tmp1;			\
    61. 

  61. 	srlx	%tmp1, (32 + 16), %tmp2;	\
    62. 

  62. 	cmp	%tmp2, CHEETAH_MANUF;		\
    63. 

  63. 	bne,pt	%xcc, 99f;			\
    64. 

  64. 	 sllx	%tmp1, 16, %tmp1;		\
    65. 

  65. 	srlx	%tmp1, (32 + 16), %tmp2;	\
    66. 

  66. 	cmp	%tmp2, CHEETAH_PLUS_IMPL;	\
    67. 

  67. 	bgeu,pt	%xcc, label;			\
    68. 

  68. 99:	 nop;
    69. 

  69. 

  70. #define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label)	\
    71. 

  71. 	rdpr	%ver, %tmp1;			\
    72. 

  72. 	srlx	%tmp1, (32 + 16), %tmp2;	\
    73. 

  73. 	cmp	%tmp2, CHEETAH_MANUF;		\
    74. 

  74. 	bne,pt	%xcc, 99f;			\
    75. 

  75. 	 sllx	%tmp1, 16, %tmp1;		\
    76. 

  76. 	srlx	%tmp1, (32 + 16), %tmp2;	\
    77. 

  77. 	cmp	%tmp2, CHEETAH_IMPL;		\
    78. 

  78. 	bgeu,pt	%xcc, label;			\
    79. 

  79. 99:	 nop;
    80. 

  80. 

  81. #endif /* !(_SPARC64_HEAD_H) */
    82.