mpic_msgr.c 6.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright 2011-2012, Meador Inge, Mentor Graphics Corporation.
  4. *
  5. * Some ideas based on un-pushed work done by Vivek Mahajan, Jason Jin, and
  6. * Mingkai Hu from Freescale Semiconductor, Inc.
  7. */
  8. #include <linux/list.h>
  9. #include <linux/of_address.h>
  10. #include <linux/of_irq.h>
  11. #include <linux/of_platform.h>
  12. #include <linux/errno.h>
  13. #include <linux/err.h>
  14. #include <linux/export.h>
  15. #include <linux/slab.h>
  16. #include <asm/hw_irq.h>
  17. #include <asm/ppc-pci.h>
  18. #include <asm/mpic_msgr.h>
  19. #define MPIC_MSGR_REGISTERS_PER_BLOCK 4
  20. #define MPIC_MSGR_STRIDE 0x10
  21. #define MPIC_MSGR_MER_OFFSET 0x100
  22. #define MSGR_INUSE 0
  23. #define MSGR_FREE 1
  24. static struct mpic_msgr **mpic_msgrs;
  25. static unsigned int mpic_msgr_count;
  26. static DEFINE_RAW_SPINLOCK(msgrs_lock);
  27. static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value)
  28. {
  29. out_be32(msgr->mer, value);
  30. }
  31. static inline u32 _mpic_msgr_mer_read(struct mpic_msgr *msgr)
  32. {
  33. return in_be32(msgr->mer);
  34. }
  35. static inline void _mpic_msgr_disable(struct mpic_msgr *msgr)
  36. {
  37. u32 mer = _mpic_msgr_mer_read(msgr);
  38. _mpic_msgr_mer_write(msgr, mer & ~(1 << msgr->num));
  39. }
  40. struct mpic_msgr *mpic_msgr_get(unsigned int reg_num)
  41. {
  42. unsigned long flags;
  43. struct mpic_msgr *msgr;
  44. /* Assume busy until proven otherwise. */
  45. msgr = ERR_PTR(-EBUSY);
  46. if (reg_num >= mpic_msgr_count)
  47. return ERR_PTR(-ENODEV);
  48. raw_spin_lock_irqsave(&msgrs_lock, flags);
  49. msgr = mpic_msgrs[reg_num];
  50. if (msgr->in_use == MSGR_FREE)
  51. msgr->in_use = MSGR_INUSE;
  52. raw_spin_unlock_irqrestore(&msgrs_lock, flags);
  53. return msgr;
  54. }
  55. EXPORT_SYMBOL_GPL(mpic_msgr_get);
  56. void mpic_msgr_put(struct mpic_msgr *msgr)
  57. {
  58. unsigned long flags;
  59. raw_spin_lock_irqsave(&msgr->lock, flags);
  60. msgr->in_use = MSGR_FREE;
  61. _mpic_msgr_disable(msgr);
  62. raw_spin_unlock_irqrestore(&msgr->lock, flags);
  63. }
  64. EXPORT_SYMBOL_GPL(mpic_msgr_put);
  65. void mpic_msgr_enable(struct mpic_msgr *msgr)
  66. {
  67. unsigned long flags;
  68. u32 mer;
  69. raw_spin_lock_irqsave(&msgr->lock, flags);
  70. mer = _mpic_msgr_mer_read(msgr);
  71. _mpic_msgr_mer_write(msgr, mer | (1 << msgr->num));
  72. raw_spin_unlock_irqrestore(&msgr->lock, flags);
  73. }
  74. EXPORT_SYMBOL_GPL(mpic_msgr_enable);
  75. void mpic_msgr_disable(struct mpic_msgr *msgr)
  76. {
  77. unsigned long flags;
  78. raw_spin_lock_irqsave(&msgr->lock, flags);
  79. _mpic_msgr_disable(msgr);
  80. raw_spin_unlock_irqrestore(&msgr->lock, flags);
  81. }
  82. EXPORT_SYMBOL_GPL(mpic_msgr_disable);
  83. /* The following three functions are used to compute the order and number of
  84. * the message register blocks. They are clearly very inefficient. However,
  85. * they are called *only* a few times during device initialization.
  86. */
  87. static unsigned int mpic_msgr_number_of_blocks(void)
  88. {
  89. unsigned int count;
  90. struct device_node *aliases;
  91. count = 0;
  92. aliases = of_find_node_by_name(NULL, "aliases");
  93. if (aliases) {
  94. char buf[32];
  95. for (;;) {
  96. snprintf(buf, sizeof(buf), "mpic-msgr-block%d", count);
  97. if (!of_find_property(aliases, buf, NULL))
  98. break;
  99. count += 1;
  100. }
  101. of_node_put(aliases);
  102. }
  103. return count;
  104. }
  105. static unsigned int mpic_msgr_number_of_registers(void)
  106. {
  107. return mpic_msgr_number_of_blocks() * MPIC_MSGR_REGISTERS_PER_BLOCK;
  108. }
  109. static int mpic_msgr_block_number(struct device_node *node)
  110. {
  111. struct device_node *aliases;
  112. unsigned int index, number_of_blocks;
  113. char buf[64];
  114. number_of_blocks = mpic_msgr_number_of_blocks();
  115. aliases = of_find_node_by_name(NULL, "aliases");
  116. if (!aliases)
  117. return -1;
  118. for (index = 0; index < number_of_blocks; ++index) {
  119. struct property *prop;
  120. struct device_node *tn;
  121. snprintf(buf, sizeof(buf), "mpic-msgr-block%d", index);
  122. prop = of_find_property(aliases, buf, NULL);
  123. tn = of_find_node_by_path(prop->value);
  124. if (node == tn) {
  125. of_node_put(tn);
  126. break;
  127. }
  128. of_node_put(tn);
  129. }
  130. of_node_put(aliases);
  131. return index == number_of_blocks ? -1 : index;
  132. }
  133. /* The probe function for a single message register block.
  134. */
  135. static int mpic_msgr_probe(struct platform_device *dev)
  136. {
  137. void __iomem *msgr_block_addr;
  138. int block_number;
  139. struct resource rsrc;
  140. unsigned int i;
  141. unsigned int irq_index;
  142. struct device_node *np = dev->dev.of_node;
  143. unsigned int receive_mask;
  144. const unsigned int *prop;
  145. if (!np) {
  146. dev_err(&dev->dev, "Device OF-Node is NULL");
  147. return -EFAULT;
  148. }
  149. /* Allocate the message register array upon the first device
  150. * registered.
  151. */
  152. if (!mpic_msgrs) {
  153. mpic_msgr_count = mpic_msgr_number_of_registers();
  154. dev_info(&dev->dev, "Found %d message registers\n",
  155. mpic_msgr_count);
  156. mpic_msgrs = kcalloc(mpic_msgr_count, sizeof(*mpic_msgrs),
  157. GFP_KERNEL);
  158. if (!mpic_msgrs) {
  159. dev_err(&dev->dev,
  160. "No memory for message register blocks\n");
  161. return -ENOMEM;
  162. }
  163. }
  164. dev_info(&dev->dev, "Of-device full name %pOF\n", np);
  165. /* IO map the message register block. */
  166. of_address_to_resource(np, 0, &rsrc);
  167. msgr_block_addr = devm_ioremap(&dev->dev, rsrc.start, resource_size(&rsrc));
  168. if (!msgr_block_addr) {
  169. dev_err(&dev->dev, "Failed to iomap MPIC message registers");
  170. return -EFAULT;
  171. }
  172. /* Ensure the block has a defined order. */
  173. block_number = mpic_msgr_block_number(np);
  174. if (block_number < 0) {
  175. dev_err(&dev->dev,
  176. "Failed to find message register block alias\n");
  177. return -ENODEV;
  178. }
  179. dev_info(&dev->dev, "Setting up message register block %d\n",
  180. block_number);
  181. /* Grab the receive mask which specifies what registers can receive
  182. * interrupts.
  183. */
  184. prop = of_get_property(np, "mpic-msgr-receive-mask", NULL);
  185. receive_mask = (prop) ? *prop : 0xF;
  186. /* Build up the appropriate message register data structures. */
  187. for (i = 0, irq_index = 0; i < MPIC_MSGR_REGISTERS_PER_BLOCK; ++i) {
  188. struct mpic_msgr *msgr;
  189. unsigned int reg_number;
  190. msgr = kzalloc(sizeof(struct mpic_msgr), GFP_KERNEL);
  191. if (!msgr) {
  192. dev_err(&dev->dev, "No memory for message register\n");
  193. return -ENOMEM;
  194. }
  195. reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
  196. msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE;
  197. msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET);
  198. msgr->in_use = MSGR_FREE;
  199. msgr->num = i;
  200. raw_spin_lock_init(&msgr->lock);
  201. if (receive_mask & (1 << i)) {
  202. msgr->irq = irq_of_parse_and_map(np, irq_index);
  203. if (!msgr->irq) {
  204. dev_err(&dev->dev,
  205. "Missing interrupt specifier");
  206. kfree(msgr);
  207. return -EFAULT;
  208. }
  209. irq_index += 1;
  210. } else {
  211. msgr->irq = 0;
  212. }
  213. mpic_msgrs[reg_number] = msgr;
  214. mpic_msgr_disable(msgr);
  215. dev_info(&dev->dev, "Register %d initialized: irq %d\n",
  216. reg_number, msgr->irq);
  217. }
  218. return 0;
  219. }
  220. static const struct of_device_id mpic_msgr_ids[] = {
  221. {
  222. .compatible = "fsl,mpic-v3.1-msgr",
  223. .data = NULL,
  224. },
  225. {}
  226. };
  227. static struct platform_driver mpic_msgr_driver = {
  228. .driver = {
  229. .name = "mpic-msgr",
  230. .of_match_table = mpic_msgr_ids,
  231. },
  232. .probe = mpic_msgr_probe,
  233. };
  234. static __init int mpic_msgr_init(void)
  235. {
  236. return platform_driver_register(&mpic_msgr_driver);
  237. }
  238. subsys_initcall(mpic_msgr_init);