ras.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2001 Dave Engebretsen IBM Corporation
  4. */
  5. #include <linux/sched.h>
  6. #include <linux/interrupt.h>
  7. #include <linux/irq.h>
  8. #include <linux/of.h>
  9. #include <linux/fs.h>
  10. #include <linux/reboot.h>
  11. #include <linux/irq_work.h>
  12. #include <asm/machdep.h>
  13. #include <asm/rtas.h>
  14. #include <asm/firmware.h>
  15. #include <asm/mce.h>
  16. #include "pseries.h"
  17. static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
  18. static DEFINE_SPINLOCK(ras_log_buf_lock);
  19. static int ras_check_exception_token;
  20. #define EPOW_SENSOR_TOKEN 9
  21. #define EPOW_SENSOR_INDEX 0
  22. /* EPOW events counter variable */
  23. static int num_epow_events;
  24. static irqreturn_t ras_hotplug_interrupt(int irq, void *dev_id);
  25. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id);
  26. static irqreturn_t ras_error_interrupt(int irq, void *dev_id);
  27. /* RTAS pseries MCE errorlog section. */
  28. struct pseries_mc_errorlog {
  29. __be32 fru_id;
  30. __be32 proc_id;
  31. u8 error_type;
  32. /*
  33. * sub_err_type (1 byte). Bit fields depends on error_type
  34. *
  35. * MSB0
  36. * |
  37. * V
  38. * 01234567
  39. * XXXXXXXX
  40. *
  41. * For error_type == MC_ERROR_TYPE_UE
  42. * XXXXXXXX
  43. * X 1: Permanent or Transient UE.
  44. * X 1: Effective address provided.
  45. * X 1: Logical address provided.
  46. * XX 2: Reserved.
  47. * XXX 3: Type of UE error.
  48. *
  49. * For error_type == MC_ERROR_TYPE_SLB/ERAT/TLB
  50. * XXXXXXXX
  51. * X 1: Effective address provided.
  52. * XXXXX 5: Reserved.
  53. * XX 2: Type of SLB/ERAT/TLB error.
  54. *
  55. * For error_type == MC_ERROR_TYPE_CTRL_MEM_ACCESS
  56. * XXXXXXXX
  57. * X 1: Error causing address provided.
  58. * XXX 3: Type of error.
  59. * XXXX 4: Reserved.
  60. */
  61. u8 sub_err_type;
  62. u8 reserved_1[6];
  63. __be64 effective_address;
  64. __be64 logical_address;
  65. } __packed;
  66. /* RTAS pseries MCE error types */
  67. #define MC_ERROR_TYPE_UE 0x00
  68. #define MC_ERROR_TYPE_SLB 0x01
  69. #define MC_ERROR_TYPE_ERAT 0x02
  70. #define MC_ERROR_TYPE_UNKNOWN 0x03
  71. #define MC_ERROR_TYPE_TLB 0x04
  72. #define MC_ERROR_TYPE_D_CACHE 0x05
  73. #define MC_ERROR_TYPE_I_CACHE 0x07
  74. #define MC_ERROR_TYPE_CTRL_MEM_ACCESS 0x08
  75. /* RTAS pseries MCE error sub types */
  76. #define MC_ERROR_UE_INDETERMINATE 0
  77. #define MC_ERROR_UE_IFETCH 1
  78. #define MC_ERROR_UE_PAGE_TABLE_WALK_IFETCH 2
  79. #define MC_ERROR_UE_LOAD_STORE 3
  80. #define MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE 4
  81. #define UE_EFFECTIVE_ADDR_PROVIDED 0x40
  82. #define UE_LOGICAL_ADDR_PROVIDED 0x20
  83. #define MC_EFFECTIVE_ADDR_PROVIDED 0x80
  84. #define MC_ERROR_SLB_PARITY 0
  85. #define MC_ERROR_SLB_MULTIHIT 1
  86. #define MC_ERROR_SLB_INDETERMINATE 2
  87. #define MC_ERROR_ERAT_PARITY 1
  88. #define MC_ERROR_ERAT_MULTIHIT 2
  89. #define MC_ERROR_ERAT_INDETERMINATE 3
  90. #define MC_ERROR_TLB_PARITY 1
  91. #define MC_ERROR_TLB_MULTIHIT 2
  92. #define MC_ERROR_TLB_INDETERMINATE 3
  93. #define MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK 0
  94. #define MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS 1
  95. static inline u8 rtas_mc_error_sub_type(const struct pseries_mc_errorlog *mlog)
  96. {
  97. switch (mlog->error_type) {
  98. case MC_ERROR_TYPE_UE:
  99. return (mlog->sub_err_type & 0x07);
  100. case MC_ERROR_TYPE_SLB:
  101. case MC_ERROR_TYPE_ERAT:
  102. case MC_ERROR_TYPE_TLB:
  103. return (mlog->sub_err_type & 0x03);
  104. case MC_ERROR_TYPE_CTRL_MEM_ACCESS:
  105. return (mlog->sub_err_type & 0x70) >> 4;
  106. default:
  107. return 0;
  108. }
  109. }
  110. /*
  111. * Enable the hotplug interrupt late because processing them may touch other
  112. * devices or systems (e.g. hugepages) that have not been initialized at the
  113. * subsys stage.
  114. */
  115. static int __init init_ras_hotplug_IRQ(void)
  116. {
  117. struct device_node *np;
  118. /* Hotplug Events */
  119. np = of_find_node_by_path("/event-sources/hot-plug-events");
  120. if (np != NULL) {
  121. if (dlpar_workqueue_init() == 0)
  122. request_event_sources_irqs(np, ras_hotplug_interrupt,
  123. "RAS_HOTPLUG");
  124. of_node_put(np);
  125. }
  126. return 0;
  127. }
  128. machine_late_initcall(pseries, init_ras_hotplug_IRQ);
  129. /*
  130. * Initialize handlers for the set of interrupts caused by hardware errors
  131. * and power system events.
  132. */
  133. static int __init init_ras_IRQ(void)
  134. {
  135. struct device_node *np;
  136. ras_check_exception_token = rtas_token("check-exception");
  137. /* Internal Errors */
  138. np = of_find_node_by_path("/event-sources/internal-errors");
  139. if (np != NULL) {
  140. request_event_sources_irqs(np, ras_error_interrupt,
  141. "RAS_ERROR");
  142. of_node_put(np);
  143. }
  144. /* EPOW Events */
  145. np = of_find_node_by_path("/event-sources/epow-events");
  146. if (np != NULL) {
  147. request_event_sources_irqs(np, ras_epow_interrupt, "RAS_EPOW");
  148. of_node_put(np);
  149. }
  150. return 0;
  151. }
  152. machine_subsys_initcall(pseries, init_ras_IRQ);
  153. #define EPOW_SHUTDOWN_NORMAL 1
  154. #define EPOW_SHUTDOWN_ON_UPS 2
  155. #define EPOW_SHUTDOWN_LOSS_OF_CRITICAL_FUNCTIONS 3
  156. #define EPOW_SHUTDOWN_AMBIENT_TEMPERATURE_TOO_HIGH 4
  157. static void handle_system_shutdown(char event_modifier)
  158. {
  159. switch (event_modifier) {
  160. case EPOW_SHUTDOWN_NORMAL:
  161. pr_emerg("Power off requested\n");
  162. orderly_poweroff(true);
  163. break;
  164. case EPOW_SHUTDOWN_ON_UPS:
  165. pr_emerg("Loss of system power detected. System is running on"
  166. " UPS/battery. Check RTAS error log for details\n");
  167. break;
  168. case EPOW_SHUTDOWN_LOSS_OF_CRITICAL_FUNCTIONS:
  169. pr_emerg("Loss of system critical functions detected. Check"
  170. " RTAS error log for details\n");
  171. orderly_poweroff(true);
  172. break;
  173. case EPOW_SHUTDOWN_AMBIENT_TEMPERATURE_TOO_HIGH:
  174. pr_emerg("High ambient temperature detected. Check RTAS"
  175. " error log for details\n");
  176. orderly_poweroff(true);
  177. break;
  178. default:
  179. pr_err("Unknown power/cooling shutdown event (modifier = %d)\n",
  180. event_modifier);
  181. }
  182. }
  183. struct epow_errorlog {
  184. unsigned char sensor_value;
  185. unsigned char event_modifier;
  186. unsigned char extended_modifier;
  187. unsigned char reserved;
  188. unsigned char platform_reason;
  189. };
  190. #define EPOW_RESET 0
  191. #define EPOW_WARN_COOLING 1
  192. #define EPOW_WARN_POWER 2
  193. #define EPOW_SYSTEM_SHUTDOWN 3
  194. #define EPOW_SYSTEM_HALT 4
  195. #define EPOW_MAIN_ENCLOSURE 5
  196. #define EPOW_POWER_OFF 7
  197. static void rtas_parse_epow_errlog(struct rtas_error_log *log)
  198. {
  199. struct pseries_errorlog *pseries_log;
  200. struct epow_errorlog *epow_log;
  201. char action_code;
  202. char modifier;
  203. pseries_log = get_pseries_errorlog(log, PSERIES_ELOG_SECT_ID_EPOW);
  204. if (pseries_log == NULL)
  205. return;
  206. epow_log = (struct epow_errorlog *)pseries_log->data;
  207. action_code = epow_log->sensor_value & 0xF; /* bottom 4 bits */
  208. modifier = epow_log->event_modifier & 0xF; /* bottom 4 bits */
  209. switch (action_code) {
  210. case EPOW_RESET:
  211. if (num_epow_events) {
  212. pr_info("Non critical power/cooling issue cleared\n");
  213. num_epow_events--;
  214. }
  215. break;
  216. case EPOW_WARN_COOLING:
  217. pr_info("Non-critical cooling issue detected. Check RTAS error"
  218. " log for details\n");
  219. break;
  220. case EPOW_WARN_POWER:
  221. pr_info("Non-critical power issue detected. Check RTAS error"
  222. " log for details\n");
  223. break;
  224. case EPOW_SYSTEM_SHUTDOWN:
  225. handle_system_shutdown(modifier);
  226. break;
  227. case EPOW_SYSTEM_HALT:
  228. pr_emerg("Critical power/cooling issue detected. Check RTAS"
  229. " error log for details. Powering off.\n");
  230. orderly_poweroff(true);
  231. break;
  232. case EPOW_MAIN_ENCLOSURE:
  233. case EPOW_POWER_OFF:
  234. pr_emerg("System about to lose power. Check RTAS error log "
  235. " for details. Powering off immediately.\n");
  236. emergency_sync();
  237. kernel_power_off();
  238. break;
  239. default:
  240. pr_err("Unknown power/cooling event (action code = %d)\n",
  241. action_code);
  242. }
  243. /* Increment epow events counter variable */
  244. if (action_code != EPOW_RESET)
  245. num_epow_events++;
  246. }
  247. static irqreturn_t ras_hotplug_interrupt(int irq, void *dev_id)
  248. {
  249. struct pseries_errorlog *pseries_log;
  250. struct pseries_hp_errorlog *hp_elog;
  251. spin_lock(&ras_log_buf_lock);
  252. rtas_call(ras_check_exception_token, 6, 1, NULL,
  253. RTAS_VECTOR_EXTERNAL_INTERRUPT, virq_to_hw(irq),
  254. RTAS_HOTPLUG_EVENTS, 0, __pa(&ras_log_buf),
  255. rtas_get_error_log_max());
  256. pseries_log = get_pseries_errorlog((struct rtas_error_log *)ras_log_buf,
  257. PSERIES_ELOG_SECT_ID_HOTPLUG);
  258. hp_elog = (struct pseries_hp_errorlog *)pseries_log->data;
  259. /*
  260. * Since PCI hotplug is not currently supported on pseries, put PCI
  261. * hotplug events on the ras_log_buf to be handled by rtas_errd.
  262. */
  263. if (hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_MEM ||
  264. hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_CPU ||
  265. hp_elog->resource == PSERIES_HP_ELOG_RESOURCE_PMEM)
  266. queue_hotplug_event(hp_elog);
  267. else
  268. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
  269. spin_unlock(&ras_log_buf_lock);
  270. return IRQ_HANDLED;
  271. }
  272. /* Handle environmental and power warning (EPOW) interrupts. */
  273. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id)
  274. {
  275. int state;
  276. int critical;
  277. rtas_get_sensor_fast(EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX, &state);
  278. if (state > 3)
  279. critical = 1; /* Time Critical */
  280. else
  281. critical = 0;
  282. spin_lock(&ras_log_buf_lock);
  283. rtas_call(ras_check_exception_token, 6, 1, NULL, RTAS_VECTOR_EXTERNAL_INTERRUPT,
  284. virq_to_hw(irq), RTAS_EPOW_WARNING, critical, __pa(&ras_log_buf),
  285. rtas_get_error_log_max());
  286. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
  287. rtas_parse_epow_errlog((struct rtas_error_log *)ras_log_buf);
  288. spin_unlock(&ras_log_buf_lock);
  289. return IRQ_HANDLED;
  290. }
  291. /*
  292. * Handle hardware error interrupts.
  293. *
  294. * RTAS check-exception is called to collect data on the exception. If
  295. * the error is deemed recoverable, we log a warning and return.
  296. * For nonrecoverable errors, an error is logged and we stop all processing
  297. * as quickly as possible in order to prevent propagation of the failure.
  298. */
  299. static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
  300. {
  301. struct rtas_error_log *rtas_elog;
  302. int status;
  303. int fatal;
  304. spin_lock(&ras_log_buf_lock);
  305. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  306. RTAS_VECTOR_EXTERNAL_INTERRUPT,
  307. virq_to_hw(irq),
  308. RTAS_INTERNAL_ERROR, 1 /* Time Critical */,
  309. __pa(&ras_log_buf),
  310. rtas_get_error_log_max());
  311. rtas_elog = (struct rtas_error_log *)ras_log_buf;
  312. if (status == 0 &&
  313. rtas_error_severity(rtas_elog) >= RTAS_SEVERITY_ERROR_SYNC)
  314. fatal = 1;
  315. else
  316. fatal = 0;
  317. /* format and print the extended information */
  318. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal);
  319. if (fatal) {
  320. pr_emerg("Fatal hardware error detected. Check RTAS error"
  321. " log for details. Powering off immediately\n");
  322. emergency_sync();
  323. kernel_power_off();
  324. } else {
  325. pr_err("Recoverable hardware error detected\n");
  326. }
  327. spin_unlock(&ras_log_buf_lock);
  328. return IRQ_HANDLED;
  329. }
  330. /*
  331. * Some versions of FWNMI place the buffer inside the 4kB page starting at
  332. * 0x7000. Other versions place it inside the rtas buffer. We check both.
  333. * Minimum size of the buffer is 16 bytes.
  334. */
  335. #define VALID_FWNMI_BUFFER(A) \
  336. ((((A) >= 0x7000) && ((A) <= 0x8000 - 16)) || \
  337. (((A) >= rtas.base) && ((A) <= (rtas.base + rtas.size - 16))))
  338. static inline struct rtas_error_log *fwnmi_get_errlog(void)
  339. {
  340. return (struct rtas_error_log *)local_paca->mce_data_buf;
  341. }
  342. static __be64 *fwnmi_get_savep(struct pt_regs *regs)
  343. {
  344. unsigned long savep_ra;
  345. /* Mask top two bits */
  346. savep_ra = regs->gpr[3] & ~(0x3UL << 62);
  347. if (!VALID_FWNMI_BUFFER(savep_ra)) {
  348. printk(KERN_ERR "FWNMI: corrupt r3 0x%016lx\n", regs->gpr[3]);
  349. return NULL;
  350. }
  351. return __va(savep_ra);
  352. }
  353. /*
  354. * Get the error information for errors coming through the
  355. * FWNMI vectors. The pt_regs' r3 will be updated to reflect
  356. * the actual r3 if possible, and a ptr to the error log entry
  357. * will be returned if found.
  358. *
  359. * Use one buffer mce_data_buf per cpu to store RTAS error.
  360. *
  361. * The mce_data_buf does not have any locks or protection around it,
  362. * if a second machine check comes in, or a system reset is done
  363. * before we have logged the error, then we will get corruption in the
  364. * error log. This is preferable over holding off on calling
  365. * ibm,nmi-interlock which would result in us checkstopping if a
  366. * second machine check did come in.
  367. */
  368. static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
  369. {
  370. struct rtas_error_log *h;
  371. __be64 *savep;
  372. savep = fwnmi_get_savep(regs);
  373. if (!savep)
  374. return NULL;
  375. regs->gpr[3] = be64_to_cpu(savep[0]); /* restore original r3 */
  376. h = (struct rtas_error_log *)&savep[1];
  377. /* Use the per cpu buffer from paca to store rtas error log */
  378. memset(local_paca->mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
  379. if (!rtas_error_extended(h)) {
  380. memcpy(local_paca->mce_data_buf, h, sizeof(__u64));
  381. } else {
  382. int len, error_log_length;
  383. error_log_length = 8 + rtas_error_extended_log_length(h);
  384. len = min_t(int, error_log_length, RTAS_ERROR_LOG_MAX);
  385. memcpy(local_paca->mce_data_buf, h, len);
  386. }
  387. return (struct rtas_error_log *)local_paca->mce_data_buf;
  388. }
  389. /* Call this when done with the data returned by FWNMI_get_errinfo.
  390. * It will release the saved data area for other CPUs in the
  391. * partition to receive FWNMI errors.
  392. */
  393. static void fwnmi_release_errinfo(void)
  394. {
  395. struct rtas_args rtas_args;
  396. int ret;
  397. /*
  398. * On pseries, the machine check stack is limited to under 4GB, so
  399. * args can be on-stack.
  400. */
  401. rtas_call_unlocked(&rtas_args, ibm_nmi_interlock_token, 0, 1, NULL);
  402. ret = be32_to_cpu(rtas_args.rets[0]);
  403. if (ret != 0)
  404. printk(KERN_ERR "FWNMI: nmi-interlock failed: %d\n", ret);
  405. }
  406. int pSeries_system_reset_exception(struct pt_regs *regs)
  407. {
  408. #ifdef __LITTLE_ENDIAN__
  409. /*
  410. * Some firmware byteswaps SRR registers and gives incorrect SRR1. Try
  411. * to detect the bad SRR1 pattern here. Flip the NIP back to correct
  412. * endian for reporting purposes. Unfortunately the MSR can't be fixed,
  413. * so clear it. It will be missing MSR_RI so we won't try to recover.
  414. */
  415. if ((be64_to_cpu(regs->msr) &
  416. (MSR_LE|MSR_RI|MSR_DR|MSR_IR|MSR_ME|MSR_PR|
  417. MSR_ILE|MSR_HV|MSR_SF)) == (MSR_DR|MSR_SF)) {
  418. regs_set_return_ip(regs, be64_to_cpu((__be64)regs->nip));
  419. regs_set_return_msr(regs, 0);
  420. }
  421. #endif
  422. if (fwnmi_active) {
  423. __be64 *savep;
  424. /*
  425. * Firmware (PowerVM and KVM) saves r3 to a save area like
  426. * machine check, which is not exactly what PAPR (2.9)
  427. * suggests but there is no way to detect otherwise, so this
  428. * is the interface now.
  429. *
  430. * System resets do not save any error log or require an
  431. * "ibm,nmi-interlock" rtas call to release.
  432. */
  433. savep = fwnmi_get_savep(regs);
  434. if (savep)
  435. regs->gpr[3] = be64_to_cpu(savep[0]); /* restore original r3 */
  436. }
  437. if (smp_handle_nmi_ipi(regs))
  438. return 1;
  439. return 0; /* need to perform reset */
  440. }
  441. static int mce_handle_err_realmode(int disposition, u8 error_type)
  442. {
  443. #ifdef CONFIG_PPC_BOOK3S_64
  444. if (disposition == RTAS_DISP_NOT_RECOVERED) {
  445. switch (error_type) {
  446. case MC_ERROR_TYPE_ERAT:
  447. flush_erat();
  448. disposition = RTAS_DISP_FULLY_RECOVERED;
  449. break;
  450. case MC_ERROR_TYPE_SLB:
  451. #ifdef CONFIG_PPC_64S_HASH_MMU
  452. /*
  453. * Store the old slb content in paca before flushing.
  454. * Print this when we go to virtual mode.
  455. * There are chances that we may hit MCE again if there
  456. * is a parity error on the SLB entry we trying to read
  457. * for saving. Hence limit the slb saving to single
  458. * level of recursion.
  459. */
  460. if (local_paca->in_mce == 1)
  461. slb_save_contents(local_paca->mce_faulty_slbs);
  462. flush_and_reload_slb();
  463. disposition = RTAS_DISP_FULLY_RECOVERED;
  464. #endif
  465. break;
  466. default:
  467. break;
  468. }
  469. } else if (disposition == RTAS_DISP_LIMITED_RECOVERY) {
  470. /* Platform corrected itself but could be degraded */
  471. pr_err("MCE: limited recovery, system may be degraded\n");
  472. disposition = RTAS_DISP_FULLY_RECOVERED;
  473. }
  474. #endif
  475. return disposition;
  476. }
  477. static int mce_handle_err_virtmode(struct pt_regs *regs,
  478. struct rtas_error_log *errp,
  479. struct pseries_mc_errorlog *mce_log,
  480. int disposition)
  481. {
  482. struct mce_error_info mce_err = { 0 };
  483. int initiator = rtas_error_initiator(errp);
  484. int severity = rtas_error_severity(errp);
  485. unsigned long eaddr = 0, paddr = 0;
  486. u8 error_type, err_sub_type;
  487. if (!mce_log)
  488. goto out;
  489. error_type = mce_log->error_type;
  490. err_sub_type = rtas_mc_error_sub_type(mce_log);
  491. if (initiator == RTAS_INITIATOR_UNKNOWN)
  492. mce_err.initiator = MCE_INITIATOR_UNKNOWN;
  493. else if (initiator == RTAS_INITIATOR_CPU)
  494. mce_err.initiator = MCE_INITIATOR_CPU;
  495. else if (initiator == RTAS_INITIATOR_PCI)
  496. mce_err.initiator = MCE_INITIATOR_PCI;
  497. else if (initiator == RTAS_INITIATOR_ISA)
  498. mce_err.initiator = MCE_INITIATOR_ISA;
  499. else if (initiator == RTAS_INITIATOR_MEMORY)
  500. mce_err.initiator = MCE_INITIATOR_MEMORY;
  501. else if (initiator == RTAS_INITIATOR_POWERMGM)
  502. mce_err.initiator = MCE_INITIATOR_POWERMGM;
  503. else
  504. mce_err.initiator = MCE_INITIATOR_UNKNOWN;
  505. if (severity == RTAS_SEVERITY_NO_ERROR)
  506. mce_err.severity = MCE_SEV_NO_ERROR;
  507. else if (severity == RTAS_SEVERITY_EVENT)
  508. mce_err.severity = MCE_SEV_WARNING;
  509. else if (severity == RTAS_SEVERITY_WARNING)
  510. mce_err.severity = MCE_SEV_WARNING;
  511. else if (severity == RTAS_SEVERITY_ERROR_SYNC)
  512. mce_err.severity = MCE_SEV_SEVERE;
  513. else if (severity == RTAS_SEVERITY_ERROR)
  514. mce_err.severity = MCE_SEV_SEVERE;
  515. else
  516. mce_err.severity = MCE_SEV_FATAL;
  517. if (severity <= RTAS_SEVERITY_ERROR_SYNC)
  518. mce_err.sync_error = true;
  519. else
  520. mce_err.sync_error = false;
  521. mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN;
  522. mce_err.error_class = MCE_ECLASS_UNKNOWN;
  523. switch (error_type) {
  524. case MC_ERROR_TYPE_UE:
  525. mce_err.error_type = MCE_ERROR_TYPE_UE;
  526. mce_common_process_ue(regs, &mce_err);
  527. if (mce_err.ignore_event)
  528. disposition = RTAS_DISP_FULLY_RECOVERED;
  529. switch (err_sub_type) {
  530. case MC_ERROR_UE_IFETCH:
  531. mce_err.u.ue_error_type = MCE_UE_ERROR_IFETCH;
  532. break;
  533. case MC_ERROR_UE_PAGE_TABLE_WALK_IFETCH:
  534. mce_err.u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH;
  535. break;
  536. case MC_ERROR_UE_LOAD_STORE:
  537. mce_err.u.ue_error_type = MCE_UE_ERROR_LOAD_STORE;
  538. break;
  539. case MC_ERROR_UE_PAGE_TABLE_WALK_LOAD_STORE:
  540. mce_err.u.ue_error_type = MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE;
  541. break;
  542. case MC_ERROR_UE_INDETERMINATE:
  543. default:
  544. mce_err.u.ue_error_type = MCE_UE_ERROR_INDETERMINATE;
  545. break;
  546. }
  547. if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED)
  548. eaddr = be64_to_cpu(mce_log->effective_address);
  549. if (mce_log->sub_err_type & UE_LOGICAL_ADDR_PROVIDED) {
  550. paddr = be64_to_cpu(mce_log->logical_address);
  551. } else if (mce_log->sub_err_type & UE_EFFECTIVE_ADDR_PROVIDED) {
  552. unsigned long pfn;
  553. pfn = addr_to_pfn(regs, eaddr);
  554. if (pfn != ULONG_MAX)
  555. paddr = pfn << PAGE_SHIFT;
  556. }
  557. break;
  558. case MC_ERROR_TYPE_SLB:
  559. mce_err.error_type = MCE_ERROR_TYPE_SLB;
  560. switch (err_sub_type) {
  561. case MC_ERROR_SLB_PARITY:
  562. mce_err.u.slb_error_type = MCE_SLB_ERROR_PARITY;
  563. break;
  564. case MC_ERROR_SLB_MULTIHIT:
  565. mce_err.u.slb_error_type = MCE_SLB_ERROR_MULTIHIT;
  566. break;
  567. case MC_ERROR_SLB_INDETERMINATE:
  568. default:
  569. mce_err.u.slb_error_type = MCE_SLB_ERROR_INDETERMINATE;
  570. break;
  571. }
  572. if (mce_log->sub_err_type & MC_EFFECTIVE_ADDR_PROVIDED)
  573. eaddr = be64_to_cpu(mce_log->effective_address);
  574. break;
  575. case MC_ERROR_TYPE_ERAT:
  576. mce_err.error_type = MCE_ERROR_TYPE_ERAT;
  577. switch (err_sub_type) {
  578. case MC_ERROR_ERAT_PARITY:
  579. mce_err.u.erat_error_type = MCE_ERAT_ERROR_PARITY;
  580. break;
  581. case MC_ERROR_ERAT_MULTIHIT:
  582. mce_err.u.erat_error_type = MCE_ERAT_ERROR_MULTIHIT;
  583. break;
  584. case MC_ERROR_ERAT_INDETERMINATE:
  585. default:
  586. mce_err.u.erat_error_type = MCE_ERAT_ERROR_INDETERMINATE;
  587. break;
  588. }
  589. if (mce_log->sub_err_type & MC_EFFECTIVE_ADDR_PROVIDED)
  590. eaddr = be64_to_cpu(mce_log->effective_address);
  591. break;
  592. case MC_ERROR_TYPE_TLB:
  593. mce_err.error_type = MCE_ERROR_TYPE_TLB;
  594. switch (err_sub_type) {
  595. case MC_ERROR_TLB_PARITY:
  596. mce_err.u.tlb_error_type = MCE_TLB_ERROR_PARITY;
  597. break;
  598. case MC_ERROR_TLB_MULTIHIT:
  599. mce_err.u.tlb_error_type = MCE_TLB_ERROR_MULTIHIT;
  600. break;
  601. case MC_ERROR_TLB_INDETERMINATE:
  602. default:
  603. mce_err.u.tlb_error_type = MCE_TLB_ERROR_INDETERMINATE;
  604. break;
  605. }
  606. if (mce_log->sub_err_type & MC_EFFECTIVE_ADDR_PROVIDED)
  607. eaddr = be64_to_cpu(mce_log->effective_address);
  608. break;
  609. case MC_ERROR_TYPE_D_CACHE:
  610. mce_err.error_type = MCE_ERROR_TYPE_DCACHE;
  611. break;
  612. case MC_ERROR_TYPE_I_CACHE:
  613. mce_err.error_type = MCE_ERROR_TYPE_ICACHE;
  614. break;
  615. case MC_ERROR_TYPE_CTRL_MEM_ACCESS:
  616. mce_err.error_type = MCE_ERROR_TYPE_RA;
  617. switch (err_sub_type) {
  618. case MC_ERROR_CTRL_MEM_ACCESS_PTABLE_WALK:
  619. mce_err.u.ra_error_type =
  620. MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN;
  621. break;
  622. case MC_ERROR_CTRL_MEM_ACCESS_OP_ACCESS:
  623. mce_err.u.ra_error_type =
  624. MCE_RA_ERROR_LOAD_STORE_FOREIGN;
  625. break;
  626. }
  627. if (mce_log->sub_err_type & MC_EFFECTIVE_ADDR_PROVIDED)
  628. eaddr = be64_to_cpu(mce_log->effective_address);
  629. break;
  630. case MC_ERROR_TYPE_UNKNOWN:
  631. default:
  632. mce_err.error_type = MCE_ERROR_TYPE_UNKNOWN;
  633. break;
  634. }
  635. out:
  636. save_mce_event(regs, disposition == RTAS_DISP_FULLY_RECOVERED,
  637. &mce_err, regs->nip, eaddr, paddr);
  638. return disposition;
  639. }
  640. static int mce_handle_error(struct pt_regs *regs, struct rtas_error_log *errp)
  641. {
  642. struct pseries_errorlog *pseries_log;
  643. struct pseries_mc_errorlog *mce_log = NULL;
  644. int disposition = rtas_error_disposition(errp);
  645. u8 error_type;
  646. if (!rtas_error_extended(errp))
  647. goto out;
  648. pseries_log = get_pseries_errorlog(errp, PSERIES_ELOG_SECT_ID_MCE);
  649. if (!pseries_log)
  650. goto out;
  651. mce_log = (struct pseries_mc_errorlog *)pseries_log->data;
  652. error_type = mce_log->error_type;
  653. disposition = mce_handle_err_realmode(disposition, error_type);
  654. out:
  655. disposition = mce_handle_err_virtmode(regs, errp, mce_log,
  656. disposition);
  657. return disposition;
  658. }
  659. /*
  660. * Process MCE rtas errlog event.
  661. */
  662. void pSeries_machine_check_log_err(void)
  663. {
  664. struct rtas_error_log *err;
  665. err = fwnmi_get_errlog();
  666. log_error((char *)err, ERR_TYPE_RTAS_LOG, 0);
  667. }
  668. /*
  669. * See if we can recover from a machine check exception.
  670. * This is only called on power4 (or above) and only via
  671. * the Firmware Non-Maskable Interrupts (fwnmi) handler
  672. * which provides the error analysis for us.
  673. *
  674. * Return 1 if corrected (or delivered a signal).
  675. * Return 0 if there is nothing we can do.
  676. */
  677. static int recover_mce(struct pt_regs *regs, struct machine_check_event *evt)
  678. {
  679. int recovered = 0;
  680. if (regs_is_unrecoverable(regs)) {
  681. /* If MSR_RI isn't set, we cannot recover */
  682. pr_err("Machine check interrupt unrecoverable: MSR(RI=0)\n");
  683. recovered = 0;
  684. } else if (evt->disposition == MCE_DISPOSITION_RECOVERED) {
  685. /* Platform corrected itself */
  686. recovered = 1;
  687. } else if (evt->severity == MCE_SEV_FATAL) {
  688. /* Fatal machine check */
  689. pr_err("Machine check interrupt is fatal\n");
  690. recovered = 0;
  691. }
  692. if (!recovered && evt->sync_error) {
  693. /*
  694. * Try to kill processes if we get a synchronous machine check
  695. * (e.g., one caused by execution of this instruction). This
  696. * will devolve into a panic if we try to kill init or are in
  697. * an interrupt etc.
  698. *
  699. * TODO: Queue up this address for hwpoisioning later.
  700. * TODO: This is not quite right for d-side machine
  701. * checks ->nip is not necessarily the important
  702. * address.
  703. */
  704. if ((user_mode(regs))) {
  705. _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip);
  706. recovered = 1;
  707. } else if (die_will_crash()) {
  708. /*
  709. * die() would kill the kernel, so better to go via
  710. * the platform reboot code that will log the
  711. * machine check.
  712. */
  713. recovered = 0;
  714. } else {
  715. die_mce("Machine check", regs, SIGBUS);
  716. recovered = 1;
  717. }
  718. }
  719. return recovered;
  720. }
  721. /*
  722. * Handle a machine check.
  723. *
  724. * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi)
  725. * should be present. If so the handler which called us tells us if the
  726. * error was recovered (never true if RI=0).
  727. *
  728. * On hardware prior to Power 4 these exceptions were asynchronous which
  729. * means we can't tell exactly where it occurred and so we can't recover.
  730. */
  731. int pSeries_machine_check_exception(struct pt_regs *regs)
  732. {
  733. struct machine_check_event evt;
  734. if (!get_mce_event(&evt, MCE_EVENT_RELEASE))
  735. return 0;
  736. /* Print things out */
  737. if (evt.version != MCE_V1) {
  738. pr_err("Machine Check Exception, Unknown event version %d !\n",
  739. evt.version);
  740. return 0;
  741. }
  742. machine_check_print_event_info(&evt, user_mode(regs), false);
  743. if (recover_mce(regs, &evt))
  744. return 1;
  745. return 0;
  746. }
  747. long pseries_machine_check_realmode(struct pt_regs *regs)
  748. {
  749. struct rtas_error_log *errp;
  750. int disposition;
  751. if (fwnmi_active) {
  752. errp = fwnmi_get_errinfo(regs);
  753. /*
  754. * Call to fwnmi_release_errinfo() in real mode causes kernel
  755. * to panic. Hence we will call it as soon as we go into
  756. * virtual mode.
  757. */
  758. disposition = mce_handle_error(regs, errp);
  759. fwnmi_release_errinfo();
  760. if (disposition == RTAS_DISP_FULLY_RECOVERED)
  761. return 1;
  762. }
  763. return 0;
  764. }