Kconfig 8.1 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. menu "Platform support"
  3. source "arch/powerpc/platforms/powernv/Kconfig"
  4. source "arch/powerpc/platforms/pseries/Kconfig"
  5. source "arch/powerpc/platforms/chrp/Kconfig"
  6. source "arch/powerpc/platforms/512x/Kconfig"
  7. source "arch/powerpc/platforms/52xx/Kconfig"
  8. source "arch/powerpc/platforms/powermac/Kconfig"
  9. source "arch/powerpc/platforms/maple/Kconfig"
  10. source "arch/powerpc/platforms/pasemi/Kconfig"
  11. source "arch/powerpc/platforms/ps3/Kconfig"
  12. source "arch/powerpc/platforms/cell/Kconfig"
  13. source "arch/powerpc/platforms/8xx/Kconfig"
  14. source "arch/powerpc/platforms/82xx/Kconfig"
  15. source "arch/powerpc/platforms/83xx/Kconfig"
  16. source "arch/powerpc/platforms/85xx/Kconfig"
  17. source "arch/powerpc/platforms/86xx/Kconfig"
  18. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  19. source "arch/powerpc/platforms/44x/Kconfig"
  20. source "arch/powerpc/platforms/40x/Kconfig"
  21. source "arch/powerpc/platforms/amigaone/Kconfig"
  22. source "arch/powerpc/platforms/book3s/Kconfig"
  23. source "arch/powerpc/platforms/microwatt/Kconfig"
  24. config KVM_GUEST
  25. bool "KVM Guest support"
  26. select EPAPR_PARAVIRT
  27. help
  28. This option enables various optimizations for running under the KVM
  29. hypervisor. Overhead for the kernel when not running inside KVM should
  30. be minimal.
  31. In case of doubt, say Y
  32. config EPAPR_PARAVIRT
  33. bool "ePAPR para-virtualization support"
  34. help
  35. Enables ePAPR para-virtualization support for guests.
  36. In case of doubt, say Y
  37. config PPC_HASH_MMU_NATIVE
  38. bool
  39. depends on PPC_BOOK3S
  40. help
  41. Support for running natively on the hardware, i.e. without
  42. a hypervisor. This option is not user-selectable but should
  43. be selected by all platforms that need it.
  44. config PPC_OF_BOOT_TRAMPOLINE
  45. bool "Support booting from Open Firmware or yaboot"
  46. depends on PPC_BOOK3S_32 || PPC64
  47. select RELOCATABLE if PPC64
  48. default y
  49. help
  50. Support from booting from Open Firmware or yaboot using an
  51. Open Firmware client interface. This enables the kernel to
  52. communicate with open firmware to retrieve system information
  53. such as the device tree.
  54. In case of doubt, say Y
  55. config PPC_DT_CPU_FTRS
  56. bool "Device-tree based CPU feature discovery & setup"
  57. depends on PPC_BOOK3S_64
  58. default y
  59. help
  60. This enables code to use a new device tree binding for describing CPU
  61. compatibility and features. Saying Y here will attempt to use the new
  62. binding if the firmware provides it. Currently only the skiboot
  63. firmware provides this binding.
  64. If you're not sure say Y.
  65. config UDBG_RTAS_CONSOLE
  66. bool "RTAS based debug console"
  67. depends on PPC_RTAS
  68. config PPC_SMP_MUXED_IPI
  69. bool
  70. help
  71. Select this option if your platform supports SMP and your
  72. interrupt controller provides less than 4 interrupts to each
  73. cpu. This will enable the generic code to multiplex the 4
  74. messages on to one ipi.
  75. config IPIC
  76. bool
  77. config MPIC
  78. bool
  79. config MPIC_TIMER
  80. bool "MPIC Global Timer"
  81. depends on MPIC && FSL_SOC
  82. help
  83. The MPIC global timer is a hardware timer inside the
  84. Freescale PIC complying with OpenPIC standard. When the
  85. specified interval times out, the hardware timer generates
  86. an interrupt. The driver currently is only tested on fsl
  87. chip, but it can potentially support other global timers
  88. complying with the OpenPIC standard.
  89. config FSL_MPIC_TIMER_WAKEUP
  90. tristate "Freescale MPIC global timer wakeup driver"
  91. depends on FSL_SOC && MPIC_TIMER && PM
  92. help
  93. The driver provides a way to wake up the system by MPIC
  94. timer.
  95. e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
  96. config PPC_EPAPR_HV_PIC
  97. bool
  98. select EPAPR_PARAVIRT
  99. config MPIC_WEIRD
  100. bool
  101. config MPIC_MSGR
  102. bool "MPIC message register support"
  103. depends on MPIC
  104. help
  105. Enables support for the MPIC message registers. These
  106. registers are used for inter-processor communication.
  107. config PPC_I8259
  108. bool
  109. config U3_DART
  110. bool
  111. depends on PPC64
  112. config PPC_RTAS
  113. bool
  114. config RTAS_ERROR_LOGGING
  115. bool
  116. depends on PPC_RTAS
  117. config PPC_RTAS_DAEMON
  118. bool
  119. depends on PPC_RTAS
  120. config RTAS_PROC
  121. bool "Proc interface to RTAS"
  122. depends on PPC_RTAS && PROC_FS
  123. default y
  124. config RTAS_FLASH
  125. tristate "Firmware flash interface"
  126. depends on PPC64 && RTAS_PROC
  127. config MMIO_NVRAM
  128. bool
  129. config MPIC_U3_HT_IRQS
  130. bool
  131. config MPIC_BROKEN_REGREAD
  132. bool
  133. depends on MPIC
  134. help
  135. This option enables a MPIC driver workaround for some chips
  136. that have a bug that causes some interrupt source information
  137. to not read back properly. It is safe to use on other chips as
  138. well, but enabling it uses about 8KB of memory to keep copies
  139. of the register contents in software.
  140. config EEH
  141. bool
  142. depends on (PPC_POWERNV || PPC_PSERIES) && PCI
  143. default y
  144. config PPC_MPC106
  145. bool
  146. config PPC_970_NAP
  147. bool
  148. config PPC_P7_NAP
  149. bool
  150. config PPC_BOOK3S_IDLE
  151. def_bool y
  152. depends on (PPC_970_NAP || PPC_P7_NAP)
  153. config PPC_INDIRECT_PIO
  154. bool
  155. select GENERIC_IOMAP
  156. config PPC_INDIRECT_MMIO
  157. bool
  158. config PPC_IO_WORKAROUNDS
  159. bool
  160. source "drivers/cpufreq/Kconfig"
  161. menu "CPUIdle driver"
  162. source "drivers/cpuidle/Kconfig"
  163. endmenu
  164. config TAU
  165. bool "On-chip CPU temperature sensor support"
  166. depends on PPC_BOOK3S_32
  167. help
  168. G3 and G4 processors have an on-chip temperature sensor called the
  169. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  170. temperature within 2-4 degrees Celsius. This option shows the current
  171. on-die temperature in /proc/cpuinfo if the cpu supports it.
  172. Unfortunately, this sensor is very inaccurate when uncalibrated, so
  173. don't assume the cpu temp is actually what /proc/cpuinfo says it is.
  174. config TAU_INT
  175. bool "Interrupt driven TAU driver (EXPERIMENTAL)"
  176. depends on TAU
  177. help
  178. The TAU supports an interrupt driven mode which causes an interrupt
  179. whenever the temperature goes out of range. This is the fastest way
  180. to get notified the temp has exceeded a range. With this option off,
  181. a timer is used to re-check the temperature periodically.
  182. If in doubt, say N here.
  183. config TAU_AVERAGE
  184. bool "Average high and low temp"
  185. depends on TAU
  186. help
  187. The TAU hardware can compare the temperature to an upper and lower
  188. bound. The default behavior is to show both the upper and lower
  189. bound in /proc/cpuinfo. If the range is large, the temperature is
  190. either changing a lot, or the TAU hardware is broken (likely on some
  191. G4's). If the range is small (around 4 degrees), the temperature is
  192. relatively stable. If you say Y here, a single temperature value,
  193. halfway between the upper and lower bounds, will be reported in
  194. /proc/cpuinfo.
  195. If in doubt, say N here.
  196. config QE_GPIO
  197. bool "QE GPIO support"
  198. depends on QUICC_ENGINE
  199. select GPIOLIB
  200. help
  201. Say Y here if you're going to use hardware that connects to the
  202. QE GPIOs.
  203. config CPM2
  204. bool "Enable support for the CPM2 (Communications Processor Module)"
  205. depends on (FSL_SOC_BOOKE && PPC32) || 8260
  206. select CPM
  207. select HAVE_PCI
  208. select GPIOLIB
  209. help
  210. The CPM2 (Communications Processor Module) is a coprocessor on
  211. embedded CPUs made by Freescale. Selecting this option means that
  212. you wish to build a kernel for a machine with a CPM2 coprocessor
  213. on it (826x, 827x, 8560).
  214. config FSL_ULI1575
  215. bool
  216. select GENERIC_ISA_DMA
  217. help
  218. Supports for the ULI1575 PCIe south bridge that exists on some
  219. Freescale reference boards. The boards all use the ULI in pretty
  220. much the same way.
  221. config CPM
  222. bool
  223. select GENERIC_ALLOCATOR
  224. config OF_RTC
  225. bool
  226. help
  227. Uses information from the OF or flattened device tree to instantiate
  228. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  229. config GEN_RTC
  230. bool "Use the platform RTC operations from user space"
  231. select RTC_CLASS
  232. select RTC_DRV_GENERIC
  233. help
  234. This option provides backwards compatibility with the old gen_rtc.ko
  235. module that was traditionally used for old PowerPC machines.
  236. Platforms should migrate to enabling the RTC_DRV_GENERIC by hand
  237. replacing their get_rtc_time/set_rtc_time callbacks with
  238. a proper RTC device driver.
  239. config MCU_MPC8349EMITX
  240. bool "MPC8349E-mITX MCU driver"
  241. depends on I2C=y && PPC_83xx
  242. select GPIOLIB
  243. help
  244. Say Y here to enable soft power-off functionality on the Freescale
  245. boards with the MPC8349E-mITX-compatible MCU chips. This driver will
  246. also register MCU GPIOs with the generic GPIO API, so you'll able
  247. to use MCU pins as GPIOs.
  248. endmenu