Kconfig 4.6 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. config CPM1
  3. bool
  4. select CPM
  5. choice
  6. prompt "8xx Machine Type"
  7. depends on PPC_8xx
  8. default MPC885ADS
  9. config MPC8XXFADS
  10. bool "FADS"
  11. config MPC86XADS
  12. bool "MPC86XADS"
  13. select CPM1
  14. help
  15. MPC86x Application Development System by Freescale Semiconductor.
  16. The MPC86xADS is meant to serve as a platform for s/w and h/w
  17. development around the MPC86X processor families.
  18. config MPC885ADS
  19. bool "MPC885ADS"
  20. select CPM1
  21. select OF_DYNAMIC
  22. help
  23. Freescale Semiconductor MPC885 Application Development System (ADS).
  24. Also known as DUET.
  25. The MPC885ADS is meant to serve as a platform for s/w and h/w
  26. development around the MPC885 processor family.
  27. config PPC_EP88XC
  28. bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)"
  29. select CPM1
  30. help
  31. This enables support for the Embedded Planet EP88xC board.
  32. This board is also resold by Freescale as the QUICCStart
  33. MPC885 Evaluation System and/or the CWH-PPC-885XN-VE.
  34. config PPC_ADDER875
  35. bool "Analogue & Micro Adder 875"
  36. select CPM1
  37. help
  38. This enables support for the Analogue & Micro Adder 875
  39. board.
  40. config TQM8XX
  41. bool "TQM8XX"
  42. select CPM1
  43. help
  44. support for the mpc8xx based boards from TQM.
  45. endchoice
  46. menu "Freescale Ethernet driver platform-specific options"
  47. depends on (FS_ENET && MPC885ADS)
  48. config MPC8xx_SECOND_ETH
  49. bool "Second Ethernet channel"
  50. depends on MPC885ADS
  51. default y
  52. help
  53. This enables support for second Ethernet on MPC885ADS and MPC86xADS boards.
  54. The latter will use SCC1, for 885ADS you can select it below.
  55. choice
  56. prompt "Second Ethernet channel"
  57. depends on MPC8xx_SECOND_ETH
  58. default MPC8xx_SECOND_ETH_FEC2
  59. config MPC8xx_SECOND_ETH_FEC2
  60. bool "FEC2"
  61. depends on MPC885ADS
  62. help
  63. Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2
  64. (often 2-nd UART) will not work if this is enabled.
  65. config MPC8xx_SECOND_ETH_SCC3
  66. bool "SCC3"
  67. depends on MPC885ADS
  68. help
  69. Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1
  70. (often 1-nd UART) will not work if this is enabled.
  71. endchoice
  72. endmenu
  73. #
  74. # MPC8xx Communication options
  75. #
  76. menu "MPC8xx CPM Options"
  77. depends on PPC_8xx
  78. # This doesn't really belong here, but it is convenient to ask
  79. # 8xx specific questions.
  80. comment "Generic MPC8xx Options"
  81. config 8xx_GPIO
  82. bool "GPIO API Support"
  83. select GPIOLIB
  84. help
  85. Saying Y here will cause the ports on an MPC8xx processor to be used
  86. with the GPIO API. If you say N here, the kernel needs less memory.
  87. If in doubt, say Y here.
  88. config 8xx_CPU15
  89. bool "CPU15 Silicon Errata"
  90. depends on !HUGETLB_PAGE
  91. default y
  92. help
  93. This enables a workaround for erratum CPU15 on MPC8xx chips.
  94. This bug can cause incorrect code execution under certain
  95. circumstances. This workaround adds some overhead (a TLB miss
  96. every time execution crosses a page boundary), and you may wish
  97. to disable it if you have worked around the bug in the compiler
  98. (by not placing conditional branches or branches to LR or CTR
  99. in the last word of a page, with a target of the last cache
  100. line in the next page), or if you have used some other
  101. workaround.
  102. If in doubt, say Y here.
  103. choice
  104. prompt "Microcode patch selection"
  105. default NO_UCODE_PATCH
  106. help
  107. Help not implemented yet, coming soon.
  108. config NO_UCODE_PATCH
  109. bool "None"
  110. config USB_SOF_UCODE_PATCH
  111. bool "USB SOF patch"
  112. help
  113. Help not implemented yet, coming soon.
  114. config I2C_SPI_UCODE_PATCH
  115. bool "I2C/SPI relocation patch"
  116. help
  117. Help not implemented yet, coming soon.
  118. config I2C_SPI_SMC1_UCODE_PATCH
  119. bool "I2C/SPI/SMC1 relocation patch"
  120. help
  121. Help not implemented yet, coming soon.
  122. config SMC_UCODE_PATCH
  123. bool "SMC relocation patch"
  124. help
  125. This microcode relocates SMC1 and SMC2 parameter RAMs at
  126. offset 0x1ec0 and 0x1fc0 to allow extended parameter RAM
  127. for SCC3 and SCC4.
  128. endchoice
  129. config UCODE_PATCH
  130. bool
  131. default y
  132. depends on !NO_UCODE_PATCH
  133. menu "8xx advanced setup"
  134. depends on PPC_8xx
  135. config PIN_TLB
  136. bool "Pinned Kernel TLBs"
  137. depends on ADVANCED_OPTIONS
  138. help
  139. On the 8xx, we have 32 instruction TLBs and 32 data TLBs. In each
  140. table 4 TLBs can be pinned.
  141. It reduces the amount of usable TLBs to 28 (ie by 12%). That's the
  142. reason why we make it selectable.
  143. This option does nothing, it just activate the selection of what
  144. to pin.
  145. config PIN_TLB_DATA
  146. bool "Pinned TLB for DATA"
  147. depends on PIN_TLB
  148. default y
  149. help
  150. This pins the first 32 Mbytes of memory with 8M pages.
  151. config PIN_TLB_IMMR
  152. bool "Pinned TLB for IMMR"
  153. depends on PIN_TLB
  154. default y
  155. help
  156. This pins the IMMR area with a 512kbytes page. In case
  157. CONFIG_PIN_TLB_DATA is also selected, it will reduce
  158. CONFIG_PIN_TLB_DATA to 24 Mbytes.
  159. endmenu
  160. endmenu