pgtable.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * This file contains common routines for dealing with free of page tables
  4. * Along with common page table handling code
  5. *
  6. * Derived from arch/powerpc/mm/tlb_64.c:
  7. * Copyright (C) 1995-1996 Gary Thomas ([email protected])
  8. *
  9. * Modifications by Paul Mackerras (PowerMac) ([email protected])
  10. * and Cort Dougan (PReP) ([email protected])
  11. * Copyright (C) 1996 Paul Mackerras
  12. *
  13. * Derived from "arch/i386/mm/init.c"
  14. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  15. *
  16. * Dave Engebretsen <[email protected]>
  17. * Rework for PPC64 port.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/gfp.h>
  21. #include <linux/mm.h>
  22. #include <linux/percpu.h>
  23. #include <linux/hardirq.h>
  24. #include <linux/hugetlb.h>
  25. #include <asm/tlbflush.h>
  26. #include <asm/tlb.h>
  27. #include <asm/hugetlb.h>
  28. #include <asm/pte-walk.h>
  29. #ifdef CONFIG_PPC64
  30. #define PGD_ALIGN (sizeof(pgd_t) * MAX_PTRS_PER_PGD)
  31. #else
  32. #define PGD_ALIGN PAGE_SIZE
  33. #endif
  34. pgd_t swapper_pg_dir[MAX_PTRS_PER_PGD] __section(".bss..page_aligned") __aligned(PGD_ALIGN);
  35. static inline int is_exec_fault(void)
  36. {
  37. return current->thread.regs && TRAP(current->thread.regs) == 0x400;
  38. }
  39. /* We only try to do i/d cache coherency on stuff that looks like
  40. * reasonably "normal" PTEs. We currently require a PTE to be present
  41. * and we avoid _PAGE_SPECIAL and cache inhibited pte. We also only do that
  42. * on userspace PTEs
  43. */
  44. static inline int pte_looks_normal(pte_t pte)
  45. {
  46. if (pte_present(pte) && !pte_special(pte)) {
  47. if (pte_ci(pte))
  48. return 0;
  49. if (pte_user(pte))
  50. return 1;
  51. }
  52. return 0;
  53. }
  54. static struct page *maybe_pte_to_page(pte_t pte)
  55. {
  56. unsigned long pfn = pte_pfn(pte);
  57. struct page *page;
  58. if (unlikely(!pfn_valid(pfn)))
  59. return NULL;
  60. page = pfn_to_page(pfn);
  61. if (PageReserved(page))
  62. return NULL;
  63. return page;
  64. }
  65. #ifdef CONFIG_PPC_BOOK3S
  66. /* Server-style MMU handles coherency when hashing if HW exec permission
  67. * is supposed per page (currently 64-bit only). If not, then, we always
  68. * flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec
  69. * support falls into the same category.
  70. */
  71. static pte_t set_pte_filter_hash(pte_t pte)
  72. {
  73. pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
  74. if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
  75. cpu_has_feature(CPU_FTR_NOEXECUTE))) {
  76. struct page *pg = maybe_pte_to_page(pte);
  77. if (!pg)
  78. return pte;
  79. if (!test_bit(PG_dcache_clean, &pg->flags)) {
  80. flush_dcache_icache_page(pg);
  81. set_bit(PG_dcache_clean, &pg->flags);
  82. }
  83. }
  84. return pte;
  85. }
  86. #else /* CONFIG_PPC_BOOK3S */
  87. static pte_t set_pte_filter_hash(pte_t pte) { return pte; }
  88. #endif /* CONFIG_PPC_BOOK3S */
  89. /* Embedded type MMU with HW exec support. This is a bit more complicated
  90. * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
  91. * instead we "filter out" the exec permission for non clean pages.
  92. */
  93. static inline pte_t set_pte_filter(pte_t pte)
  94. {
  95. struct page *pg;
  96. if (radix_enabled())
  97. return pte;
  98. if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
  99. return set_pte_filter_hash(pte);
  100. /* No exec permission in the first place, move on */
  101. if (!pte_exec(pte) || !pte_looks_normal(pte))
  102. return pte;
  103. /* If you set _PAGE_EXEC on weird pages you're on your own */
  104. pg = maybe_pte_to_page(pte);
  105. if (unlikely(!pg))
  106. return pte;
  107. /* If the page clean, we move on */
  108. if (test_bit(PG_dcache_clean, &pg->flags))
  109. return pte;
  110. /* If it's an exec fault, we flush the cache and make it clean */
  111. if (is_exec_fault()) {
  112. flush_dcache_icache_page(pg);
  113. set_bit(PG_dcache_clean, &pg->flags);
  114. return pte;
  115. }
  116. /* Else, we filter out _PAGE_EXEC */
  117. return pte_exprotect(pte);
  118. }
  119. static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
  120. int dirty)
  121. {
  122. struct page *pg;
  123. if (IS_ENABLED(CONFIG_PPC_BOOK3S_64))
  124. return pte;
  125. if (mmu_has_feature(MMU_FTR_HPTE_TABLE))
  126. return pte;
  127. /* So here, we only care about exec faults, as we use them
  128. * to recover lost _PAGE_EXEC and perform I$/D$ coherency
  129. * if necessary. Also if _PAGE_EXEC is already set, same deal,
  130. * we just bail out
  131. */
  132. if (dirty || pte_exec(pte) || !is_exec_fault())
  133. return pte;
  134. #ifdef CONFIG_DEBUG_VM
  135. /* So this is an exec fault, _PAGE_EXEC is not set. If it was
  136. * an error we would have bailed out earlier in do_page_fault()
  137. * but let's make sure of it
  138. */
  139. if (WARN_ON(!(vma->vm_flags & VM_EXEC)))
  140. return pte;
  141. #endif /* CONFIG_DEBUG_VM */
  142. /* If you set _PAGE_EXEC on weird pages you're on your own */
  143. pg = maybe_pte_to_page(pte);
  144. if (unlikely(!pg))
  145. goto bail;
  146. /* If the page is already clean, we move on */
  147. if (test_bit(PG_dcache_clean, &pg->flags))
  148. goto bail;
  149. /* Clean the page and set PG_dcache_clean */
  150. flush_dcache_icache_page(pg);
  151. set_bit(PG_dcache_clean, &pg->flags);
  152. bail:
  153. return pte_mkexec(pte);
  154. }
  155. /*
  156. * set_pte stores a linux PTE into the linux page table.
  157. */
  158. void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
  159. pte_t pte)
  160. {
  161. /*
  162. * Make sure hardware valid bit is not set. We don't do
  163. * tlb flush for this update.
  164. */
  165. VM_WARN_ON(pte_hw_valid(*ptep) && !pte_protnone(*ptep));
  166. /* Note: mm->context.id might not yet have been assigned as
  167. * this context might not have been activated yet when this
  168. * is called.
  169. */
  170. pte = set_pte_filter(pte);
  171. /* Perform the setting of the PTE */
  172. __set_pte_at(mm, addr, ptep, pte, 0);
  173. }
  174. void unmap_kernel_page(unsigned long va)
  175. {
  176. pmd_t *pmdp = pmd_off_k(va);
  177. pte_t *ptep = pte_offset_kernel(pmdp, va);
  178. pte_clear(&init_mm, va, ptep);
  179. flush_tlb_kernel_range(va, va + PAGE_SIZE);
  180. }
  181. /*
  182. * This is called when relaxing access to a PTE. It's also called in the page
  183. * fault path when we don't hit any of the major fault cases, ie, a minor
  184. * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
  185. * handled those two for us, we additionally deal with missing execute
  186. * permission here on some processors
  187. */
  188. int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
  189. pte_t *ptep, pte_t entry, int dirty)
  190. {
  191. int changed;
  192. entry = set_access_flags_filter(entry, vma, dirty);
  193. changed = !pte_same(*(ptep), entry);
  194. if (changed) {
  195. assert_pte_locked(vma->vm_mm, address);
  196. __ptep_set_access_flags(vma, ptep, entry,
  197. address, mmu_virtual_psize);
  198. }
  199. return changed;
  200. }
  201. #ifdef CONFIG_HUGETLB_PAGE
  202. int huge_ptep_set_access_flags(struct vm_area_struct *vma,
  203. unsigned long addr, pte_t *ptep,
  204. pte_t pte, int dirty)
  205. {
  206. #ifdef HUGETLB_NEED_PRELOAD
  207. /*
  208. * The "return 1" forces a call of update_mmu_cache, which will write a
  209. * TLB entry. Without this, platforms that don't do a write of the TLB
  210. * entry in the TLB miss handler asm will fault ad infinitum.
  211. */
  212. ptep_set_access_flags(vma, addr, ptep, pte, dirty);
  213. return 1;
  214. #else
  215. int changed, psize;
  216. pte = set_access_flags_filter(pte, vma, dirty);
  217. changed = !pte_same(*(ptep), pte);
  218. if (changed) {
  219. #ifdef CONFIG_PPC_BOOK3S_64
  220. struct hstate *h = hstate_vma(vma);
  221. psize = hstate_get_psize(h);
  222. #ifdef CONFIG_DEBUG_VM
  223. assert_spin_locked(huge_pte_lockptr(h, vma->vm_mm, ptep));
  224. #endif
  225. #else
  226. /*
  227. * Not used on non book3s64 platforms.
  228. * 8xx compares it with mmu_virtual_psize to
  229. * know if it is a huge page or not.
  230. */
  231. psize = MMU_PAGE_COUNT;
  232. #endif
  233. __ptep_set_access_flags(vma, ptep, pte, addr, psize);
  234. }
  235. return changed;
  236. #endif
  237. }
  238. #if defined(CONFIG_PPC_8xx)
  239. void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
  240. {
  241. pmd_t *pmd = pmd_off(mm, addr);
  242. pte_basic_t val;
  243. pte_basic_t *entry = (pte_basic_t *)ptep;
  244. int num, i;
  245. /*
  246. * Make sure hardware valid bit is not set. We don't do
  247. * tlb flush for this update.
  248. */
  249. VM_WARN_ON(pte_hw_valid(*ptep) && !pte_protnone(*ptep));
  250. pte = set_pte_filter(pte);
  251. val = pte_val(pte);
  252. num = number_of_cells_per_pte(pmd, val, 1);
  253. for (i = 0; i < num; i++, entry++, val += SZ_4K)
  254. *entry = val;
  255. }
  256. #endif
  257. #endif /* CONFIG_HUGETLB_PAGE */
  258. #ifdef CONFIG_DEBUG_VM
  259. void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
  260. {
  261. pgd_t *pgd;
  262. p4d_t *p4d;
  263. pud_t *pud;
  264. pmd_t *pmd;
  265. if (mm == &init_mm)
  266. return;
  267. pgd = mm->pgd + pgd_index(addr);
  268. BUG_ON(pgd_none(*pgd));
  269. p4d = p4d_offset(pgd, addr);
  270. BUG_ON(p4d_none(*p4d));
  271. pud = pud_offset(p4d, addr);
  272. BUG_ON(pud_none(*pud));
  273. pmd = pmd_offset(pud, addr);
  274. /*
  275. * khugepaged to collapse normal pages to hugepage, first set
  276. * pmd to none to force page fault/gup to take mmap_lock. After
  277. * pmd is set to none, we do a pte_clear which does this assertion
  278. * so if we find pmd none, return.
  279. */
  280. if (pmd_none(*pmd))
  281. return;
  282. BUG_ON(!pmd_present(*pmd));
  283. assert_spin_locked(pte_lockptr(mm, pmd));
  284. }
  285. #endif /* CONFIG_DEBUG_VM */
  286. unsigned long vmalloc_to_phys(void *va)
  287. {
  288. unsigned long pfn = vmalloc_to_pfn(va);
  289. BUG_ON(!pfn);
  290. return __pa(pfn_to_kaddr(pfn)) + offset_in_page(va);
  291. }
  292. EXPORT_SYMBOL_GPL(vmalloc_to_phys);
  293. /*
  294. * We have 4 cases for pgds and pmds:
  295. * (1) invalid (all zeroes)
  296. * (2) pointer to next table, as normal; bottom 6 bits == 0
  297. * (3) leaf pte for huge page _PAGE_PTE set
  298. * (4) hugepd pointer, _PAGE_PTE = 0 and bits [2..6] indicate size of table
  299. *
  300. * So long as we atomically load page table pointers we are safe against teardown,
  301. * we can follow the address down to the page and take a ref on it.
  302. * This function need to be called with interrupts disabled. We use this variant
  303. * when we have MSR[EE] = 0 but the paca->irq_soft_mask = IRQS_ENABLED
  304. */
  305. pte_t *__find_linux_pte(pgd_t *pgdir, unsigned long ea,
  306. bool *is_thp, unsigned *hpage_shift)
  307. {
  308. pgd_t *pgdp;
  309. p4d_t p4d, *p4dp;
  310. pud_t pud, *pudp;
  311. pmd_t pmd, *pmdp;
  312. pte_t *ret_pte;
  313. hugepd_t *hpdp = NULL;
  314. unsigned pdshift;
  315. if (hpage_shift)
  316. *hpage_shift = 0;
  317. if (is_thp)
  318. *is_thp = false;
  319. /*
  320. * Always operate on the local stack value. This make sure the
  321. * value don't get updated by a parallel THP split/collapse,
  322. * page fault or a page unmap. The return pte_t * is still not
  323. * stable. So should be checked there for above conditions.
  324. * Top level is an exception because it is folded into p4d.
  325. */
  326. pgdp = pgdir + pgd_index(ea);
  327. p4dp = p4d_offset(pgdp, ea);
  328. p4d = READ_ONCE(*p4dp);
  329. pdshift = P4D_SHIFT;
  330. if (p4d_none(p4d))
  331. return NULL;
  332. if (p4d_is_leaf(p4d)) {
  333. ret_pte = (pte_t *)p4dp;
  334. goto out;
  335. }
  336. if (is_hugepd(__hugepd(p4d_val(p4d)))) {
  337. hpdp = (hugepd_t *)&p4d;
  338. goto out_huge;
  339. }
  340. /*
  341. * Even if we end up with an unmap, the pgtable will not
  342. * be freed, because we do an rcu free and here we are
  343. * irq disabled
  344. */
  345. pdshift = PUD_SHIFT;
  346. pudp = pud_offset(&p4d, ea);
  347. pud = READ_ONCE(*pudp);
  348. if (pud_none(pud))
  349. return NULL;
  350. if (pud_is_leaf(pud)) {
  351. ret_pte = (pte_t *)pudp;
  352. goto out;
  353. }
  354. if (is_hugepd(__hugepd(pud_val(pud)))) {
  355. hpdp = (hugepd_t *)&pud;
  356. goto out_huge;
  357. }
  358. pdshift = PMD_SHIFT;
  359. pmdp = pmd_offset(&pud, ea);
  360. pmd = READ_ONCE(*pmdp);
  361. /*
  362. * A hugepage collapse is captured by this condition, see
  363. * pmdp_collapse_flush.
  364. */
  365. if (pmd_none(pmd))
  366. return NULL;
  367. #ifdef CONFIG_PPC_BOOK3S_64
  368. /*
  369. * A hugepage split is captured by this condition, see
  370. * pmdp_invalidate.
  371. *
  372. * Huge page modification can be caught here too.
  373. */
  374. if (pmd_is_serializing(pmd))
  375. return NULL;
  376. #endif
  377. if (pmd_trans_huge(pmd) || pmd_devmap(pmd)) {
  378. if (is_thp)
  379. *is_thp = true;
  380. ret_pte = (pte_t *)pmdp;
  381. goto out;
  382. }
  383. if (pmd_is_leaf(pmd)) {
  384. ret_pte = (pte_t *)pmdp;
  385. goto out;
  386. }
  387. if (is_hugepd(__hugepd(pmd_val(pmd)))) {
  388. hpdp = (hugepd_t *)&pmd;
  389. goto out_huge;
  390. }
  391. return pte_offset_kernel(&pmd, ea);
  392. out_huge:
  393. if (!hpdp)
  394. return NULL;
  395. ret_pte = hugepte_offset(*hpdp, ea, pdshift);
  396. pdshift = hugepd_shift(*hpdp);
  397. out:
  398. if (hpage_shift)
  399. *hpage_shift = pdshift;
  400. return ret_pte;
  401. }
  402. EXPORT_SYMBOL_GPL(__find_linux_pte);
  403. /* Note due to the way vm flags are laid out, the bits are XWR */
  404. const pgprot_t protection_map[16] = {
  405. [VM_NONE] = PAGE_NONE,
  406. [VM_READ] = PAGE_READONLY,
  407. [VM_WRITE] = PAGE_COPY,
  408. [VM_WRITE | VM_READ] = PAGE_COPY,
  409. [VM_EXEC] = PAGE_READONLY_X,
  410. [VM_EXEC | VM_READ] = PAGE_READONLY_X,
  411. [VM_EXEC | VM_WRITE] = PAGE_COPY_X,
  412. [VM_EXEC | VM_WRITE | VM_READ] = PAGE_COPY_X,
  413. [VM_SHARED] = PAGE_NONE,
  414. [VM_SHARED | VM_READ] = PAGE_READONLY,
  415. [VM_SHARED | VM_WRITE] = PAGE_SHARED,
  416. [VM_SHARED | VM_WRITE | VM_READ] = PAGE_SHARED,
  417. [VM_SHARED | VM_EXEC] = PAGE_READONLY_X,
  418. [VM_SHARED | VM_EXEC | VM_READ] = PAGE_READONLY_X,
  419. [VM_SHARED | VM_EXEC | VM_WRITE] = PAGE_SHARED_X,
  420. [VM_SHARED | VM_EXEC | VM_WRITE | VM_READ] = PAGE_SHARED_X
  421. };
  422. #ifndef CONFIG_PPC_BOOK3S_64
  423. DECLARE_VM_GET_PAGE_PROT
  424. #endif