emulate.c 6.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. *
  4. * Copyright IBM Corp. 2007
  5. * Copyright 2011 Freescale Semiconductor, Inc.
  6. *
  7. * Authors: Hollis Blanchard <[email protected]>
  8. */
  9. #include <linux/jiffies.h>
  10. #include <linux/hrtimer.h>
  11. #include <linux/types.h>
  12. #include <linux/string.h>
  13. #include <linux/kvm_host.h>
  14. #include <linux/clockchips.h>
  15. #include <asm/reg.h>
  16. #include <asm/time.h>
  17. #include <asm/byteorder.h>
  18. #include <asm/kvm_ppc.h>
  19. #include <asm/disassemble.h>
  20. #include <asm/ppc-opcode.h>
  21. #include "timing.h"
  22. #include "trace.h"
  23. void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
  24. {
  25. unsigned long dec_nsec;
  26. unsigned long long dec_time;
  27. pr_debug("mtDEC: %lx\n", vcpu->arch.dec);
  28. hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
  29. #ifdef CONFIG_PPC_BOOK3S
  30. /* mtdec lowers the interrupt line when positive. */
  31. kvmppc_core_dequeue_dec(vcpu);
  32. #endif
  33. #ifdef CONFIG_BOOKE
  34. /* On BOOKE, DEC = 0 is as good as decrementer not enabled */
  35. if (vcpu->arch.dec == 0)
  36. return;
  37. #endif
  38. /*
  39. * The decrementer ticks at the same rate as the timebase, so
  40. * that's how we convert the guest DEC value to the number of
  41. * host ticks.
  42. */
  43. dec_time = vcpu->arch.dec;
  44. /*
  45. * Guest timebase ticks at the same frequency as host timebase.
  46. * So use the host timebase calculations for decrementer emulation.
  47. */
  48. dec_time = tb_to_ns(dec_time);
  49. dec_nsec = do_div(dec_time, NSEC_PER_SEC);
  50. hrtimer_start(&vcpu->arch.dec_timer,
  51. ktime_set(dec_time, dec_nsec), HRTIMER_MODE_REL);
  52. vcpu->arch.dec_jiffies = get_tb();
  53. }
  54. u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
  55. {
  56. u64 jd = tb - vcpu->arch.dec_jiffies;
  57. #ifdef CONFIG_BOOKE
  58. if (vcpu->arch.dec < jd)
  59. return 0;
  60. #endif
  61. return vcpu->arch.dec - jd;
  62. }
  63. static int kvmppc_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
  64. {
  65. enum emulation_result emulated = EMULATE_DONE;
  66. ulong spr_val = kvmppc_get_gpr(vcpu, rs);
  67. switch (sprn) {
  68. case SPRN_SRR0:
  69. kvmppc_set_srr0(vcpu, spr_val);
  70. break;
  71. case SPRN_SRR1:
  72. kvmppc_set_srr1(vcpu, spr_val);
  73. break;
  74. /* XXX We need to context-switch the timebase for
  75. * watchdog and FIT. */
  76. case SPRN_TBWL: break;
  77. case SPRN_TBWU: break;
  78. case SPRN_DEC:
  79. vcpu->arch.dec = (u32) spr_val;
  80. kvmppc_emulate_dec(vcpu);
  81. break;
  82. case SPRN_SPRG0:
  83. kvmppc_set_sprg0(vcpu, spr_val);
  84. break;
  85. case SPRN_SPRG1:
  86. kvmppc_set_sprg1(vcpu, spr_val);
  87. break;
  88. case SPRN_SPRG2:
  89. kvmppc_set_sprg2(vcpu, spr_val);
  90. break;
  91. case SPRN_SPRG3:
  92. kvmppc_set_sprg3(vcpu, spr_val);
  93. break;
  94. /* PIR can legally be written, but we ignore it */
  95. case SPRN_PIR: break;
  96. default:
  97. emulated = vcpu->kvm->arch.kvm_ops->emulate_mtspr(vcpu, sprn,
  98. spr_val);
  99. if (emulated == EMULATE_FAIL)
  100. printk(KERN_INFO "mtspr: unknown spr "
  101. "0x%x\n", sprn);
  102. break;
  103. }
  104. kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
  105. return emulated;
  106. }
  107. static int kvmppc_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
  108. {
  109. enum emulation_result emulated = EMULATE_DONE;
  110. ulong spr_val = 0;
  111. switch (sprn) {
  112. case SPRN_SRR0:
  113. spr_val = kvmppc_get_srr0(vcpu);
  114. break;
  115. case SPRN_SRR1:
  116. spr_val = kvmppc_get_srr1(vcpu);
  117. break;
  118. case SPRN_PVR:
  119. spr_val = vcpu->arch.pvr;
  120. break;
  121. case SPRN_PIR:
  122. spr_val = vcpu->vcpu_id;
  123. break;
  124. /* Note: mftb and TBRL/TBWL are user-accessible, so
  125. * the guest can always access the real TB anyways.
  126. * In fact, we probably will never see these traps. */
  127. case SPRN_TBWL:
  128. spr_val = get_tb() >> 32;
  129. break;
  130. case SPRN_TBWU:
  131. spr_val = get_tb();
  132. break;
  133. case SPRN_SPRG0:
  134. spr_val = kvmppc_get_sprg0(vcpu);
  135. break;
  136. case SPRN_SPRG1:
  137. spr_val = kvmppc_get_sprg1(vcpu);
  138. break;
  139. case SPRN_SPRG2:
  140. spr_val = kvmppc_get_sprg2(vcpu);
  141. break;
  142. case SPRN_SPRG3:
  143. spr_val = kvmppc_get_sprg3(vcpu);
  144. break;
  145. /* Note: SPRG4-7 are user-readable, so we don't get
  146. * a trap. */
  147. case SPRN_DEC:
  148. spr_val = kvmppc_get_dec(vcpu, get_tb());
  149. break;
  150. default:
  151. emulated = vcpu->kvm->arch.kvm_ops->emulate_mfspr(vcpu, sprn,
  152. &spr_val);
  153. if (unlikely(emulated == EMULATE_FAIL)) {
  154. printk(KERN_INFO "mfspr: unknown spr "
  155. "0x%x\n", sprn);
  156. }
  157. break;
  158. }
  159. if (emulated == EMULATE_DONE)
  160. kvmppc_set_gpr(vcpu, rt, spr_val);
  161. kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
  162. return emulated;
  163. }
  164. /* XXX Should probably auto-generate instruction decoding for a particular core
  165. * from opcode tables in the future. */
  166. int kvmppc_emulate_instruction(struct kvm_vcpu *vcpu)
  167. {
  168. u32 inst;
  169. int rs, rt, sprn;
  170. enum emulation_result emulated;
  171. int advance = 1;
  172. /* this default type might be overwritten by subcategories */
  173. kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
  174. emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst);
  175. if (emulated != EMULATE_DONE)
  176. return emulated;
  177. pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));
  178. rs = get_rs(inst);
  179. rt = get_rt(inst);
  180. sprn = get_sprn(inst);
  181. switch (get_op(inst)) {
  182. case OP_TRAP:
  183. #ifdef CONFIG_PPC_BOOK3S
  184. case OP_TRAP_64:
  185. kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
  186. #else
  187. kvmppc_core_queue_program(vcpu,
  188. vcpu->arch.shared->esr | ESR_PTR);
  189. #endif
  190. advance = 0;
  191. break;
  192. case 31:
  193. switch (get_xop(inst)) {
  194. case OP_31_XOP_TRAP:
  195. #ifdef CONFIG_64BIT
  196. case OP_31_XOP_TRAP_64:
  197. #endif
  198. #ifdef CONFIG_PPC_BOOK3S
  199. kvmppc_core_queue_program(vcpu, SRR1_PROGTRAP);
  200. #else
  201. kvmppc_core_queue_program(vcpu,
  202. vcpu->arch.shared->esr | ESR_PTR);
  203. #endif
  204. advance = 0;
  205. break;
  206. case OP_31_XOP_MFSPR:
  207. emulated = kvmppc_emulate_mfspr(vcpu, sprn, rt);
  208. if (emulated == EMULATE_AGAIN) {
  209. emulated = EMULATE_DONE;
  210. advance = 0;
  211. }
  212. break;
  213. case OP_31_XOP_MTSPR:
  214. emulated = kvmppc_emulate_mtspr(vcpu, sprn, rs);
  215. if (emulated == EMULATE_AGAIN) {
  216. emulated = EMULATE_DONE;
  217. advance = 0;
  218. }
  219. break;
  220. case OP_31_XOP_TLBSYNC:
  221. break;
  222. default:
  223. /* Attempt core-specific emulation below. */
  224. emulated = EMULATE_FAIL;
  225. }
  226. break;
  227. case 0:
  228. /*
  229. * Instruction with primary opcode 0. Based on PowerISA
  230. * these are illegal instructions.
  231. */
  232. if (inst == KVMPPC_INST_SW_BREAKPOINT) {
  233. vcpu->run->exit_reason = KVM_EXIT_DEBUG;
  234. vcpu->run->debug.arch.status = 0;
  235. vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu);
  236. emulated = EMULATE_EXIT_USER;
  237. advance = 0;
  238. } else
  239. emulated = EMULATE_FAIL;
  240. break;
  241. default:
  242. emulated = EMULATE_FAIL;
  243. }
  244. if (emulated == EMULATE_FAIL) {
  245. emulated = vcpu->kvm->arch.kvm_ops->emulate_op(vcpu, inst,
  246. &advance);
  247. if (emulated == EMULATE_AGAIN) {
  248. advance = 0;
  249. } else if (emulated == EMULATE_FAIL) {
  250. advance = 0;
  251. printk(KERN_ERR "Couldn't emulate instruction 0x%08x "
  252. "(op %d xop %d)\n", inst, get_op(inst), get_xop(inst));
  253. }
  254. }
  255. trace_kvm_ppc_instr(inst, kvmppc_get_pc(vcpu), emulated);
  256. /* Advance past emulated instruction. */
  257. if (advance)
  258. kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
  259. return emulated;
  260. }
  261. EXPORT_SYMBOL_GPL(kvmppc_emulate_instruction);