book3s.c 28 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
  4. *
  5. * Authors:
  6. * Alexander Graf <[email protected]>
  7. * Kevin Wolf <[email protected]>
  8. *
  9. * Description:
  10. * This file is derived from arch/powerpc/kvm/44x.c,
  11. * by Hollis Blanchard <[email protected]>.
  12. */
  13. #include <linux/kvm_host.h>
  14. #include <linux/err.h>
  15. #include <linux/export.h>
  16. #include <linux/slab.h>
  17. #include <linux/module.h>
  18. #include <linux/miscdevice.h>
  19. #include <linux/gfp.h>
  20. #include <linux/sched.h>
  21. #include <linux/vmalloc.h>
  22. #include <linux/highmem.h>
  23. #include <asm/reg.h>
  24. #include <asm/cputable.h>
  25. #include <asm/cacheflush.h>
  26. #include <linux/uaccess.h>
  27. #include <asm/io.h>
  28. #include <asm/kvm_ppc.h>
  29. #include <asm/kvm_book3s.h>
  30. #include <asm/mmu_context.h>
  31. #include <asm/page.h>
  32. #include <asm/xive.h>
  33. #include "book3s.h"
  34. #include "trace.h"
  35. /* #define EXIT_DEBUG */
  36. const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
  37. KVM_GENERIC_VM_STATS(),
  38. STATS_DESC_ICOUNTER(VM, num_2M_pages),
  39. STATS_DESC_ICOUNTER(VM, num_1G_pages)
  40. };
  41. const struct kvm_stats_header kvm_vm_stats_header = {
  42. .name_size = KVM_STATS_NAME_SIZE,
  43. .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
  44. .id_offset = sizeof(struct kvm_stats_header),
  45. .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
  46. .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
  47. sizeof(kvm_vm_stats_desc),
  48. };
  49. const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
  50. KVM_GENERIC_VCPU_STATS(),
  51. STATS_DESC_COUNTER(VCPU, sum_exits),
  52. STATS_DESC_COUNTER(VCPU, mmio_exits),
  53. STATS_DESC_COUNTER(VCPU, signal_exits),
  54. STATS_DESC_COUNTER(VCPU, light_exits),
  55. STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits),
  56. STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits),
  57. STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits),
  58. STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits),
  59. STATS_DESC_COUNTER(VCPU, syscall_exits),
  60. STATS_DESC_COUNTER(VCPU, isi_exits),
  61. STATS_DESC_COUNTER(VCPU, dsi_exits),
  62. STATS_DESC_COUNTER(VCPU, emulated_inst_exits),
  63. STATS_DESC_COUNTER(VCPU, dec_exits),
  64. STATS_DESC_COUNTER(VCPU, ext_intr_exits),
  65. STATS_DESC_COUNTER(VCPU, halt_successful_wait),
  66. STATS_DESC_COUNTER(VCPU, dbell_exits),
  67. STATS_DESC_COUNTER(VCPU, gdbell_exits),
  68. STATS_DESC_COUNTER(VCPU, ld),
  69. STATS_DESC_COUNTER(VCPU, st),
  70. STATS_DESC_COUNTER(VCPU, pf_storage),
  71. STATS_DESC_COUNTER(VCPU, pf_instruc),
  72. STATS_DESC_COUNTER(VCPU, sp_storage),
  73. STATS_DESC_COUNTER(VCPU, sp_instruc),
  74. STATS_DESC_COUNTER(VCPU, queue_intr),
  75. STATS_DESC_COUNTER(VCPU, ld_slow),
  76. STATS_DESC_COUNTER(VCPU, st_slow),
  77. STATS_DESC_COUNTER(VCPU, pthru_all),
  78. STATS_DESC_COUNTER(VCPU, pthru_host),
  79. STATS_DESC_COUNTER(VCPU, pthru_bad_aff)
  80. };
  81. const struct kvm_stats_header kvm_vcpu_stats_header = {
  82. .name_size = KVM_STATS_NAME_SIZE,
  83. .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
  84. .id_offset = sizeof(struct kvm_stats_header),
  85. .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
  86. .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
  87. sizeof(kvm_vcpu_stats_desc),
  88. };
  89. static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
  90. unsigned long pending_now, unsigned long old_pending)
  91. {
  92. if (is_kvmppc_hv_enabled(vcpu->kvm))
  93. return;
  94. if (pending_now)
  95. kvmppc_set_int_pending(vcpu, 1);
  96. else if (old_pending)
  97. kvmppc_set_int_pending(vcpu, 0);
  98. }
  99. static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
  100. {
  101. ulong crit_raw;
  102. ulong crit_r1;
  103. bool crit;
  104. if (is_kvmppc_hv_enabled(vcpu->kvm))
  105. return false;
  106. crit_raw = kvmppc_get_critical(vcpu);
  107. crit_r1 = kvmppc_get_gpr(vcpu, 1);
  108. /* Truncate crit indicators in 32 bit mode */
  109. if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
  110. crit_raw &= 0xffffffff;
  111. crit_r1 &= 0xffffffff;
  112. }
  113. /* Critical section when crit == r1 */
  114. crit = (crit_raw == crit_r1);
  115. /* ... and we're in supervisor mode */
  116. crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
  117. return crit;
  118. }
  119. void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
  120. {
  121. vcpu->kvm->arch.kvm_ops->inject_interrupt(vcpu, vec, flags);
  122. }
  123. static int kvmppc_book3s_vec2irqprio(unsigned int vec)
  124. {
  125. unsigned int prio;
  126. switch (vec) {
  127. case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
  128. case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
  129. case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
  130. case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
  131. case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
  132. case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
  133. case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
  134. case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
  135. case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
  136. case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
  137. case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
  138. case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
  139. case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
  140. case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
  141. case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
  142. case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
  143. default: prio = BOOK3S_IRQPRIO_MAX; break;
  144. }
  145. return prio;
  146. }
  147. void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
  148. unsigned int vec)
  149. {
  150. unsigned long old_pending = vcpu->arch.pending_exceptions;
  151. clear_bit(kvmppc_book3s_vec2irqprio(vec),
  152. &vcpu->arch.pending_exceptions);
  153. kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
  154. old_pending);
  155. }
  156. void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
  157. {
  158. vcpu->stat.queue_intr++;
  159. set_bit(kvmppc_book3s_vec2irqprio(vec),
  160. &vcpu->arch.pending_exceptions);
  161. #ifdef EXIT_DEBUG
  162. printk(KERN_INFO "Queueing interrupt %x\n", vec);
  163. #endif
  164. }
  165. EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
  166. void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags)
  167. {
  168. /* might as well deliver this straight away */
  169. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags);
  170. }
  171. EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check);
  172. void kvmppc_core_queue_syscall(struct kvm_vcpu *vcpu)
  173. {
  174. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_SYSCALL, 0);
  175. }
  176. EXPORT_SYMBOL(kvmppc_core_queue_syscall);
  177. void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
  178. {
  179. /* might as well deliver this straight away */
  180. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
  181. }
  182. EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
  183. void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
  184. {
  185. /* might as well deliver this straight away */
  186. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
  187. }
  188. void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
  189. {
  190. /* might as well deliver this straight away */
  191. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
  192. }
  193. void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
  194. {
  195. /* might as well deliver this straight away */
  196. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
  197. }
  198. void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
  199. {
  200. kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
  201. }
  202. EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
  203. int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
  204. {
  205. return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
  206. }
  207. EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
  208. void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
  209. {
  210. kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
  211. }
  212. EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
  213. void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
  214. struct kvm_interrupt *irq)
  215. {
  216. /*
  217. * This case (KVM_INTERRUPT_SET) should never actually arise for
  218. * a pseries guest (because pseries guests expect their interrupt
  219. * controllers to continue asserting an external interrupt request
  220. * until it is acknowledged at the interrupt controller), but is
  221. * included to avoid ABI breakage and potentially for other
  222. * sorts of guest.
  223. *
  224. * There is a subtlety here: HV KVM does not test the
  225. * external_oneshot flag in the code that synthesizes
  226. * external interrupts for the guest just before entering
  227. * the guest. That is OK even if userspace did do a
  228. * KVM_INTERRUPT_SET on a pseries guest vcpu, because the
  229. * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick()
  230. * which ends up doing a smp_send_reschedule(), which will
  231. * pull the guest all the way out to the host, meaning that
  232. * we will call kvmppc_core_prepare_to_enter() before entering
  233. * the guest again, and that will handle the external_oneshot
  234. * flag correctly.
  235. */
  236. if (irq->irq == KVM_INTERRUPT_SET)
  237. vcpu->arch.external_oneshot = 1;
  238. kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
  239. }
  240. void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
  241. {
  242. kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
  243. }
  244. void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
  245. ulong flags)
  246. {
  247. kvmppc_set_dar(vcpu, dar);
  248. kvmppc_set_dsisr(vcpu, flags);
  249. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
  250. }
  251. EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
  252. void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
  253. {
  254. kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
  255. }
  256. EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
  257. static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
  258. unsigned int priority)
  259. {
  260. int deliver = 1;
  261. int vec = 0;
  262. bool crit = kvmppc_critical_section(vcpu);
  263. switch (priority) {
  264. case BOOK3S_IRQPRIO_DECREMENTER:
  265. deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
  266. vec = BOOK3S_INTERRUPT_DECREMENTER;
  267. break;
  268. case BOOK3S_IRQPRIO_EXTERNAL:
  269. deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
  270. vec = BOOK3S_INTERRUPT_EXTERNAL;
  271. break;
  272. case BOOK3S_IRQPRIO_SYSTEM_RESET:
  273. vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
  274. break;
  275. case BOOK3S_IRQPRIO_MACHINE_CHECK:
  276. vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
  277. break;
  278. case BOOK3S_IRQPRIO_DATA_STORAGE:
  279. vec = BOOK3S_INTERRUPT_DATA_STORAGE;
  280. break;
  281. case BOOK3S_IRQPRIO_INST_STORAGE:
  282. vec = BOOK3S_INTERRUPT_INST_STORAGE;
  283. break;
  284. case BOOK3S_IRQPRIO_DATA_SEGMENT:
  285. vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
  286. break;
  287. case BOOK3S_IRQPRIO_INST_SEGMENT:
  288. vec = BOOK3S_INTERRUPT_INST_SEGMENT;
  289. break;
  290. case BOOK3S_IRQPRIO_ALIGNMENT:
  291. vec = BOOK3S_INTERRUPT_ALIGNMENT;
  292. break;
  293. case BOOK3S_IRQPRIO_PROGRAM:
  294. vec = BOOK3S_INTERRUPT_PROGRAM;
  295. break;
  296. case BOOK3S_IRQPRIO_VSX:
  297. vec = BOOK3S_INTERRUPT_VSX;
  298. break;
  299. case BOOK3S_IRQPRIO_ALTIVEC:
  300. vec = BOOK3S_INTERRUPT_ALTIVEC;
  301. break;
  302. case BOOK3S_IRQPRIO_FP_UNAVAIL:
  303. vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
  304. break;
  305. case BOOK3S_IRQPRIO_SYSCALL:
  306. vec = BOOK3S_INTERRUPT_SYSCALL;
  307. break;
  308. case BOOK3S_IRQPRIO_DEBUG:
  309. vec = BOOK3S_INTERRUPT_TRACE;
  310. break;
  311. case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
  312. vec = BOOK3S_INTERRUPT_PERFMON;
  313. break;
  314. case BOOK3S_IRQPRIO_FAC_UNAVAIL:
  315. vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
  316. break;
  317. default:
  318. deliver = 0;
  319. printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
  320. break;
  321. }
  322. #if 0
  323. printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
  324. #endif
  325. if (deliver)
  326. kvmppc_inject_interrupt(vcpu, vec, 0);
  327. return deliver;
  328. }
  329. /*
  330. * This function determines if an irqprio should be cleared once issued.
  331. */
  332. static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
  333. {
  334. switch (priority) {
  335. case BOOK3S_IRQPRIO_DECREMENTER:
  336. /* DEC interrupts get cleared by mtdec */
  337. return false;
  338. case BOOK3S_IRQPRIO_EXTERNAL:
  339. /*
  340. * External interrupts get cleared by userspace
  341. * except when set by the KVM_INTERRUPT ioctl with
  342. * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL).
  343. */
  344. if (vcpu->arch.external_oneshot) {
  345. vcpu->arch.external_oneshot = 0;
  346. return true;
  347. }
  348. return false;
  349. }
  350. return true;
  351. }
  352. int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
  353. {
  354. unsigned long *pending = &vcpu->arch.pending_exceptions;
  355. unsigned long old_pending = vcpu->arch.pending_exceptions;
  356. unsigned int priority;
  357. #ifdef EXIT_DEBUG
  358. if (vcpu->arch.pending_exceptions)
  359. printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
  360. #endif
  361. priority = __ffs(*pending);
  362. while (priority < BOOK3S_IRQPRIO_MAX) {
  363. if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
  364. clear_irqprio(vcpu, priority)) {
  365. clear_bit(priority, &vcpu->arch.pending_exceptions);
  366. break;
  367. }
  368. priority = find_next_bit(pending,
  369. BITS_PER_BYTE * sizeof(*pending),
  370. priority + 1);
  371. }
  372. /* Tell the guest about our interrupt status */
  373. kvmppc_update_int_pending(vcpu, *pending, old_pending);
  374. return 0;
  375. }
  376. EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
  377. kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
  378. bool *writable)
  379. {
  380. ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
  381. gfn_t gfn = gpa >> PAGE_SHIFT;
  382. if (!(kvmppc_get_msr(vcpu) & MSR_SF))
  383. mp_pa = (uint32_t)mp_pa;
  384. /* Magic page override */
  385. gpa &= ~0xFFFULL;
  386. if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
  387. ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
  388. kvm_pfn_t pfn;
  389. pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
  390. get_page(pfn_to_page(pfn));
  391. if (writable)
  392. *writable = true;
  393. return pfn;
  394. }
  395. return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
  396. }
  397. EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
  398. int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
  399. enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
  400. {
  401. bool data = (xlid == XLATE_DATA);
  402. bool iswrite = (xlrw == XLATE_WRITE);
  403. int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
  404. int r;
  405. if (relocated) {
  406. r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
  407. } else {
  408. pte->eaddr = eaddr;
  409. pte->raddr = eaddr & KVM_PAM;
  410. pte->vpage = VSID_REAL | eaddr >> 12;
  411. pte->may_read = true;
  412. pte->may_write = true;
  413. pte->may_execute = true;
  414. r = 0;
  415. if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
  416. !data) {
  417. if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
  418. ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
  419. pte->raddr &= ~SPLIT_HACK_MASK;
  420. }
  421. }
  422. return r;
  423. }
  424. int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
  425. enum instruction_fetch_type type, u32 *inst)
  426. {
  427. ulong pc = kvmppc_get_pc(vcpu);
  428. int r;
  429. if (type == INST_SC)
  430. pc -= 4;
  431. r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
  432. if (r == EMULATE_DONE)
  433. return r;
  434. else
  435. return EMULATE_AGAIN;
  436. }
  437. EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
  438. int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
  439. {
  440. return 0;
  441. }
  442. void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
  443. {
  444. }
  445. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  446. struct kvm_sregs *sregs)
  447. {
  448. int ret;
  449. vcpu_load(vcpu);
  450. ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
  451. vcpu_put(vcpu);
  452. return ret;
  453. }
  454. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  455. struct kvm_sregs *sregs)
  456. {
  457. int ret;
  458. vcpu_load(vcpu);
  459. ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
  460. vcpu_put(vcpu);
  461. return ret;
  462. }
  463. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  464. {
  465. int i;
  466. regs->pc = kvmppc_get_pc(vcpu);
  467. regs->cr = kvmppc_get_cr(vcpu);
  468. regs->ctr = kvmppc_get_ctr(vcpu);
  469. regs->lr = kvmppc_get_lr(vcpu);
  470. regs->xer = kvmppc_get_xer(vcpu);
  471. regs->msr = kvmppc_get_msr(vcpu);
  472. regs->srr0 = kvmppc_get_srr0(vcpu);
  473. regs->srr1 = kvmppc_get_srr1(vcpu);
  474. regs->pid = vcpu->arch.pid;
  475. regs->sprg0 = kvmppc_get_sprg0(vcpu);
  476. regs->sprg1 = kvmppc_get_sprg1(vcpu);
  477. regs->sprg2 = kvmppc_get_sprg2(vcpu);
  478. regs->sprg3 = kvmppc_get_sprg3(vcpu);
  479. regs->sprg4 = kvmppc_get_sprg4(vcpu);
  480. regs->sprg5 = kvmppc_get_sprg5(vcpu);
  481. regs->sprg6 = kvmppc_get_sprg6(vcpu);
  482. regs->sprg7 = kvmppc_get_sprg7(vcpu);
  483. for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
  484. regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
  485. return 0;
  486. }
  487. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  488. {
  489. int i;
  490. kvmppc_set_pc(vcpu, regs->pc);
  491. kvmppc_set_cr(vcpu, regs->cr);
  492. kvmppc_set_ctr(vcpu, regs->ctr);
  493. kvmppc_set_lr(vcpu, regs->lr);
  494. kvmppc_set_xer(vcpu, regs->xer);
  495. kvmppc_set_msr(vcpu, regs->msr);
  496. kvmppc_set_srr0(vcpu, regs->srr0);
  497. kvmppc_set_srr1(vcpu, regs->srr1);
  498. kvmppc_set_sprg0(vcpu, regs->sprg0);
  499. kvmppc_set_sprg1(vcpu, regs->sprg1);
  500. kvmppc_set_sprg2(vcpu, regs->sprg2);
  501. kvmppc_set_sprg3(vcpu, regs->sprg3);
  502. kvmppc_set_sprg4(vcpu, regs->sprg4);
  503. kvmppc_set_sprg5(vcpu, regs->sprg5);
  504. kvmppc_set_sprg6(vcpu, regs->sprg6);
  505. kvmppc_set_sprg7(vcpu, regs->sprg7);
  506. for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
  507. kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
  508. return 0;
  509. }
  510. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  511. {
  512. return -EOPNOTSUPP;
  513. }
  514. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  515. {
  516. return -EOPNOTSUPP;
  517. }
  518. int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
  519. union kvmppc_one_reg *val)
  520. {
  521. int r = 0;
  522. long int i;
  523. r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
  524. if (r == -EINVAL) {
  525. r = 0;
  526. switch (id) {
  527. case KVM_REG_PPC_DAR:
  528. *val = get_reg_val(id, kvmppc_get_dar(vcpu));
  529. break;
  530. case KVM_REG_PPC_DSISR:
  531. *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
  532. break;
  533. case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
  534. i = id - KVM_REG_PPC_FPR0;
  535. *val = get_reg_val(id, VCPU_FPR(vcpu, i));
  536. break;
  537. case KVM_REG_PPC_FPSCR:
  538. *val = get_reg_val(id, vcpu->arch.fp.fpscr);
  539. break;
  540. #ifdef CONFIG_VSX
  541. case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
  542. if (cpu_has_feature(CPU_FTR_VSX)) {
  543. i = id - KVM_REG_PPC_VSR0;
  544. val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
  545. val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
  546. } else {
  547. r = -ENXIO;
  548. }
  549. break;
  550. #endif /* CONFIG_VSX */
  551. case KVM_REG_PPC_DEBUG_INST:
  552. *val = get_reg_val(id, INS_TW);
  553. break;
  554. #ifdef CONFIG_KVM_XICS
  555. case KVM_REG_PPC_ICP_STATE:
  556. if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
  557. r = -ENXIO;
  558. break;
  559. }
  560. if (xics_on_xive())
  561. *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
  562. else
  563. *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
  564. break;
  565. #endif /* CONFIG_KVM_XICS */
  566. #ifdef CONFIG_KVM_XIVE
  567. case KVM_REG_PPC_VP_STATE:
  568. if (!vcpu->arch.xive_vcpu) {
  569. r = -ENXIO;
  570. break;
  571. }
  572. if (xive_enabled())
  573. r = kvmppc_xive_native_get_vp(vcpu, val);
  574. else
  575. r = -ENXIO;
  576. break;
  577. #endif /* CONFIG_KVM_XIVE */
  578. case KVM_REG_PPC_FSCR:
  579. *val = get_reg_val(id, vcpu->arch.fscr);
  580. break;
  581. case KVM_REG_PPC_TAR:
  582. *val = get_reg_val(id, vcpu->arch.tar);
  583. break;
  584. case KVM_REG_PPC_EBBHR:
  585. *val = get_reg_val(id, vcpu->arch.ebbhr);
  586. break;
  587. case KVM_REG_PPC_EBBRR:
  588. *val = get_reg_val(id, vcpu->arch.ebbrr);
  589. break;
  590. case KVM_REG_PPC_BESCR:
  591. *val = get_reg_val(id, vcpu->arch.bescr);
  592. break;
  593. case KVM_REG_PPC_IC:
  594. *val = get_reg_val(id, vcpu->arch.ic);
  595. break;
  596. default:
  597. r = -EINVAL;
  598. break;
  599. }
  600. }
  601. return r;
  602. }
  603. int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
  604. union kvmppc_one_reg *val)
  605. {
  606. int r = 0;
  607. long int i;
  608. r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
  609. if (r == -EINVAL) {
  610. r = 0;
  611. switch (id) {
  612. case KVM_REG_PPC_DAR:
  613. kvmppc_set_dar(vcpu, set_reg_val(id, *val));
  614. break;
  615. case KVM_REG_PPC_DSISR:
  616. kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
  617. break;
  618. case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
  619. i = id - KVM_REG_PPC_FPR0;
  620. VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
  621. break;
  622. case KVM_REG_PPC_FPSCR:
  623. vcpu->arch.fp.fpscr = set_reg_val(id, *val);
  624. break;
  625. #ifdef CONFIG_VSX
  626. case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
  627. if (cpu_has_feature(CPU_FTR_VSX)) {
  628. i = id - KVM_REG_PPC_VSR0;
  629. vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
  630. vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
  631. } else {
  632. r = -ENXIO;
  633. }
  634. break;
  635. #endif /* CONFIG_VSX */
  636. #ifdef CONFIG_KVM_XICS
  637. case KVM_REG_PPC_ICP_STATE:
  638. if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
  639. r = -ENXIO;
  640. break;
  641. }
  642. if (xics_on_xive())
  643. r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
  644. else
  645. r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
  646. break;
  647. #endif /* CONFIG_KVM_XICS */
  648. #ifdef CONFIG_KVM_XIVE
  649. case KVM_REG_PPC_VP_STATE:
  650. if (!vcpu->arch.xive_vcpu) {
  651. r = -ENXIO;
  652. break;
  653. }
  654. if (xive_enabled())
  655. r = kvmppc_xive_native_set_vp(vcpu, val);
  656. else
  657. r = -ENXIO;
  658. break;
  659. #endif /* CONFIG_KVM_XIVE */
  660. case KVM_REG_PPC_FSCR:
  661. vcpu->arch.fscr = set_reg_val(id, *val);
  662. break;
  663. case KVM_REG_PPC_TAR:
  664. vcpu->arch.tar = set_reg_val(id, *val);
  665. break;
  666. case KVM_REG_PPC_EBBHR:
  667. vcpu->arch.ebbhr = set_reg_val(id, *val);
  668. break;
  669. case KVM_REG_PPC_EBBRR:
  670. vcpu->arch.ebbrr = set_reg_val(id, *val);
  671. break;
  672. case KVM_REG_PPC_BESCR:
  673. vcpu->arch.bescr = set_reg_val(id, *val);
  674. break;
  675. case KVM_REG_PPC_IC:
  676. vcpu->arch.ic = set_reg_val(id, *val);
  677. break;
  678. default:
  679. r = -EINVAL;
  680. break;
  681. }
  682. }
  683. return r;
  684. }
  685. void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  686. {
  687. vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
  688. }
  689. void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
  690. {
  691. vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
  692. }
  693. void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
  694. {
  695. vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
  696. }
  697. EXPORT_SYMBOL_GPL(kvmppc_set_msr);
  698. int kvmppc_vcpu_run(struct kvm_vcpu *vcpu)
  699. {
  700. return vcpu->kvm->arch.kvm_ops->vcpu_run(vcpu);
  701. }
  702. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  703. struct kvm_translation *tr)
  704. {
  705. return 0;
  706. }
  707. int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
  708. struct kvm_guest_debug *dbg)
  709. {
  710. vcpu_load(vcpu);
  711. vcpu->guest_debug = dbg->control;
  712. vcpu_put(vcpu);
  713. return 0;
  714. }
  715. void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
  716. {
  717. kvmppc_core_queue_dec(vcpu);
  718. kvm_vcpu_kick(vcpu);
  719. }
  720. int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu)
  721. {
  722. return vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu);
  723. }
  724. void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
  725. {
  726. vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
  727. }
  728. int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
  729. {
  730. return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
  731. }
  732. void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
  733. {
  734. }
  735. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
  736. {
  737. return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
  738. }
  739. void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
  740. {
  741. kvm->arch.kvm_ops->free_memslot(slot);
  742. }
  743. void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
  744. {
  745. kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
  746. }
  747. int kvmppc_core_prepare_memory_region(struct kvm *kvm,
  748. const struct kvm_memory_slot *old,
  749. struct kvm_memory_slot *new,
  750. enum kvm_mr_change change)
  751. {
  752. return kvm->arch.kvm_ops->prepare_memory_region(kvm, old, new, change);
  753. }
  754. void kvmppc_core_commit_memory_region(struct kvm *kvm,
  755. struct kvm_memory_slot *old,
  756. const struct kvm_memory_slot *new,
  757. enum kvm_mr_change change)
  758. {
  759. kvm->arch.kvm_ops->commit_memory_region(kvm, old, new, change);
  760. }
  761. bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
  762. {
  763. return kvm->arch.kvm_ops->unmap_gfn_range(kvm, range);
  764. }
  765. bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
  766. {
  767. return kvm->arch.kvm_ops->age_gfn(kvm, range);
  768. }
  769. bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
  770. {
  771. return kvm->arch.kvm_ops->test_age_gfn(kvm, range);
  772. }
  773. bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
  774. {
  775. return kvm->arch.kvm_ops->set_spte_gfn(kvm, range);
  776. }
  777. int kvmppc_core_init_vm(struct kvm *kvm)
  778. {
  779. #ifdef CONFIG_PPC64
  780. INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
  781. INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
  782. mutex_init(&kvm->arch.rtas_token_lock);
  783. #endif
  784. return kvm->arch.kvm_ops->init_vm(kvm);
  785. }
  786. void kvmppc_core_destroy_vm(struct kvm *kvm)
  787. {
  788. kvm->arch.kvm_ops->destroy_vm(kvm);
  789. #ifdef CONFIG_PPC64
  790. kvmppc_rtas_tokens_free(kvm);
  791. WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
  792. #endif
  793. #ifdef CONFIG_KVM_XICS
  794. /*
  795. * Free the XIVE and XICS devices which are not directly freed by the
  796. * device 'release' method
  797. */
  798. kfree(kvm->arch.xive_devices.native);
  799. kvm->arch.xive_devices.native = NULL;
  800. kfree(kvm->arch.xive_devices.xics_on_xive);
  801. kvm->arch.xive_devices.xics_on_xive = NULL;
  802. kfree(kvm->arch.xics_device);
  803. kvm->arch.xics_device = NULL;
  804. #endif /* CONFIG_KVM_XICS */
  805. }
  806. int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
  807. {
  808. unsigned long size = kvmppc_get_gpr(vcpu, 4);
  809. unsigned long addr = kvmppc_get_gpr(vcpu, 5);
  810. u64 buf;
  811. int srcu_idx;
  812. int ret;
  813. if (!is_power_of_2(size) || (size > sizeof(buf)))
  814. return H_TOO_HARD;
  815. srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
  816. ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
  817. srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
  818. if (ret != 0)
  819. return H_TOO_HARD;
  820. switch (size) {
  821. case 1:
  822. kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
  823. break;
  824. case 2:
  825. kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
  826. break;
  827. case 4:
  828. kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
  829. break;
  830. case 8:
  831. kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
  832. break;
  833. default:
  834. BUG();
  835. }
  836. return H_SUCCESS;
  837. }
  838. EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
  839. int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
  840. {
  841. unsigned long size = kvmppc_get_gpr(vcpu, 4);
  842. unsigned long addr = kvmppc_get_gpr(vcpu, 5);
  843. unsigned long val = kvmppc_get_gpr(vcpu, 6);
  844. u64 buf;
  845. int srcu_idx;
  846. int ret;
  847. switch (size) {
  848. case 1:
  849. *(u8 *)&buf = val;
  850. break;
  851. case 2:
  852. *(__be16 *)&buf = cpu_to_be16(val);
  853. break;
  854. case 4:
  855. *(__be32 *)&buf = cpu_to_be32(val);
  856. break;
  857. case 8:
  858. *(__be64 *)&buf = cpu_to_be64(val);
  859. break;
  860. default:
  861. return H_TOO_HARD;
  862. }
  863. srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
  864. ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
  865. srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
  866. if (ret != 0)
  867. return H_TOO_HARD;
  868. return H_SUCCESS;
  869. }
  870. EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
  871. int kvmppc_core_check_processor_compat(void)
  872. {
  873. /*
  874. * We always return 0 for book3s. We check
  875. * for compatibility while loading the HV
  876. * or PR module
  877. */
  878. return 0;
  879. }
  880. int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
  881. {
  882. return kvm->arch.kvm_ops->hcall_implemented(hcall);
  883. }
  884. #ifdef CONFIG_KVM_XICS
  885. int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
  886. bool line_status)
  887. {
  888. if (xics_on_xive())
  889. return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
  890. line_status);
  891. else
  892. return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
  893. line_status);
  894. }
  895. int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
  896. struct kvm *kvm, int irq_source_id,
  897. int level, bool line_status)
  898. {
  899. return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
  900. level, line_status);
  901. }
  902. static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
  903. struct kvm *kvm, int irq_source_id, int level,
  904. bool line_status)
  905. {
  906. return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
  907. }
  908. int kvm_irq_map_gsi(struct kvm *kvm,
  909. struct kvm_kernel_irq_routing_entry *entries, int gsi)
  910. {
  911. entries->gsi = gsi;
  912. entries->type = KVM_IRQ_ROUTING_IRQCHIP;
  913. entries->set = kvmppc_book3s_set_irq;
  914. entries->irqchip.irqchip = 0;
  915. entries->irqchip.pin = gsi;
  916. return 1;
  917. }
  918. int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
  919. {
  920. return pin;
  921. }
  922. #endif /* CONFIG_KVM_XICS */
  923. static int kvmppc_book3s_init(void)
  924. {
  925. int r;
  926. r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
  927. if (r)
  928. return r;
  929. #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
  930. r = kvmppc_book3s_init_pr();
  931. #endif
  932. #ifdef CONFIG_KVM_XICS
  933. #ifdef CONFIG_KVM_XIVE
  934. if (xics_on_xive()) {
  935. kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
  936. if (kvmppc_xive_native_supported())
  937. kvm_register_device_ops(&kvm_xive_native_ops,
  938. KVM_DEV_TYPE_XIVE);
  939. } else
  940. #endif
  941. kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
  942. #endif
  943. return r;
  944. }
  945. static void kvmppc_book3s_exit(void)
  946. {
  947. #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
  948. kvmppc_book3s_exit_pr();
  949. #endif
  950. kvm_exit();
  951. }
  952. module_init(kvmppc_book3s_init);
  953. module_exit(kvmppc_book3s_exit);
  954. /* On 32bit this is our one and only kernel module */
  955. #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
  956. MODULE_ALIAS_MISCDEV(KVM_MINOR);
  957. MODULE_ALIAS("devname:kvm");
  958. #endif