dma-iommu.c 5.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corporation
  4. *
  5. * Provide default implementations of the DMA mapping callbacks for
  6. * busses using the iommu infrastructure
  7. */
  8. #include <linux/dma-direct.h>
  9. #include <linux/pci.h>
  10. #include <asm/iommu.h>
  11. #ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT
  12. #define can_map_direct(dev, addr) \
  13. ((dev)->bus_dma_limit >= phys_to_dma((dev), (addr)))
  14. bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr)
  15. {
  16. if (likely(!dev->bus_dma_limit))
  17. return false;
  18. return can_map_direct(dev, addr);
  19. }
  20. #define is_direct_handle(dev, h) ((h) >= (dev)->archdata.dma_offset)
  21. bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle)
  22. {
  23. if (likely(!dev->bus_dma_limit))
  24. return false;
  25. return is_direct_handle(dev, dma_handle);
  26. }
  27. bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg,
  28. int nents)
  29. {
  30. struct scatterlist *s;
  31. int i;
  32. if (likely(!dev->bus_dma_limit))
  33. return false;
  34. for_each_sg(sg, s, nents, i) {
  35. if (!can_map_direct(dev, sg_phys(s) + s->offset + s->length))
  36. return false;
  37. }
  38. return true;
  39. }
  40. bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg,
  41. int nents)
  42. {
  43. struct scatterlist *s;
  44. int i;
  45. if (likely(!dev->bus_dma_limit))
  46. return false;
  47. for_each_sg(sg, s, nents, i) {
  48. if (!is_direct_handle(dev, s->dma_address + s->length))
  49. return false;
  50. }
  51. return true;
  52. }
  53. #endif /* CONFIG_ARCH_HAS_DMA_MAP_DIRECT */
  54. /*
  55. * Generic iommu implementation
  56. */
  57. /* Allocates a contiguous real buffer and creates mappings over it.
  58. * Returns the virtual address of the buffer and sets dma_handle
  59. * to the dma address (mapping) of the first page.
  60. */
  61. static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
  62. dma_addr_t *dma_handle, gfp_t flag,
  63. unsigned long attrs)
  64. {
  65. return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size,
  66. dma_handle, dev->coherent_dma_mask, flag,
  67. dev_to_node(dev));
  68. }
  69. static void dma_iommu_free_coherent(struct device *dev, size_t size,
  70. void *vaddr, dma_addr_t dma_handle,
  71. unsigned long attrs)
  72. {
  73. iommu_free_coherent(get_iommu_table_base(dev), size, vaddr, dma_handle);
  74. }
  75. /* Creates TCEs for a user provided buffer. The user buffer must be
  76. * contiguous real kernel storage (not vmalloc). The address passed here
  77. * comprises a page address and offset into that page. The dma_addr_t
  78. * returned will point to the same byte within the page as was passed in.
  79. */
  80. static dma_addr_t dma_iommu_map_page(struct device *dev, struct page *page,
  81. unsigned long offset, size_t size,
  82. enum dma_data_direction direction,
  83. unsigned long attrs)
  84. {
  85. return iommu_map_page(dev, get_iommu_table_base(dev), page, offset,
  86. size, dma_get_mask(dev), direction, attrs);
  87. }
  88. static void dma_iommu_unmap_page(struct device *dev, dma_addr_t dma_handle,
  89. size_t size, enum dma_data_direction direction,
  90. unsigned long attrs)
  91. {
  92. iommu_unmap_page(get_iommu_table_base(dev), dma_handle, size, direction,
  93. attrs);
  94. }
  95. static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,
  96. int nelems, enum dma_data_direction direction,
  97. unsigned long attrs)
  98. {
  99. return ppc_iommu_map_sg(dev, get_iommu_table_base(dev), sglist, nelems,
  100. dma_get_mask(dev), direction, attrs);
  101. }
  102. static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist,
  103. int nelems, enum dma_data_direction direction,
  104. unsigned long attrs)
  105. {
  106. ppc_iommu_unmap_sg(get_iommu_table_base(dev), sglist, nelems,
  107. direction, attrs);
  108. }
  109. static bool dma_iommu_bypass_supported(struct device *dev, u64 mask)
  110. {
  111. struct pci_dev *pdev = to_pci_dev(dev);
  112. struct pci_controller *phb = pci_bus_to_host(pdev->bus);
  113. if (iommu_fixed_is_weak || !phb->controller_ops.iommu_bypass_supported)
  114. return false;
  115. return phb->controller_ops.iommu_bypass_supported(pdev, mask);
  116. }
  117. /* We support DMA to/from any memory page via the iommu */
  118. int dma_iommu_dma_supported(struct device *dev, u64 mask)
  119. {
  120. struct iommu_table *tbl;
  121. if (dev_is_pci(dev) && dma_iommu_bypass_supported(dev, mask)) {
  122. /*
  123. * dma_iommu_bypass_supported() sets dma_max when there is
  124. * 1:1 mapping but it is somehow limited.
  125. * ibm,pmemory is one example.
  126. */
  127. dev->dma_ops_bypass = dev->bus_dma_limit == 0;
  128. if (!dev->dma_ops_bypass)
  129. dev_warn(dev,
  130. "iommu: 64-bit OK but direct DMA is limited by %llx\n",
  131. dev->bus_dma_limit);
  132. else
  133. dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n");
  134. return 1;
  135. }
  136. tbl = get_iommu_table_base(dev);
  137. if (!tbl) {
  138. dev_err(dev, "Warning: IOMMU dma not supported: mask 0x%08llx, table unavailable\n", mask);
  139. return 0;
  140. }
  141. if (tbl->it_offset > (mask >> tbl->it_page_shift)) {
  142. dev_info(dev, "Warning: IOMMU offset too big for device mask\n");
  143. dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n",
  144. mask, tbl->it_offset << tbl->it_page_shift);
  145. return 0;
  146. }
  147. dev_dbg(dev, "iommu: not 64-bit, using default ops\n");
  148. dev->dma_ops_bypass = false;
  149. return 1;
  150. }
  151. u64 dma_iommu_get_required_mask(struct device *dev)
  152. {
  153. struct iommu_table *tbl = get_iommu_table_base(dev);
  154. u64 mask;
  155. if (dev_is_pci(dev)) {
  156. u64 bypass_mask = dma_direct_get_required_mask(dev);
  157. if (dma_iommu_dma_supported(dev, bypass_mask)) {
  158. dev_info(dev, "%s: returning bypass mask 0x%llx\n", __func__, bypass_mask);
  159. return bypass_mask;
  160. }
  161. }
  162. if (!tbl)
  163. return 0;
  164. mask = 1ULL << (fls_long(tbl->it_offset + tbl->it_size) +
  165. tbl->it_page_shift - 1);
  166. mask += mask - 1;
  167. return mask;
  168. }
  169. const struct dma_map_ops dma_iommu_ops = {
  170. .alloc = dma_iommu_alloc_coherent,
  171. .free = dma_iommu_free_coherent,
  172. .map_sg = dma_iommu_map_sg,
  173. .unmap_sg = dma_iommu_unmap_sg,
  174. .dma_supported = dma_iommu_dma_supported,
  175. .map_page = dma_iommu_map_page,
  176. .unmap_page = dma_iommu_unmap_page,
  177. .get_required_mask = dma_iommu_get_required_mask,
  178. .mmap = dma_common_mmap,
  179. .get_sgtable = dma_common_get_sgtable,
  180. .alloc_pages = dma_common_alloc_pages,
  181. .free_pages = dma_common_free_pages,
  182. };