cpu_specs_40x.h 8.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Copyright (C) 2001 Ben. Herrenschmidt ([email protected])
  4. */
  5. static struct cpu_spec cpu_specs[] __initdata = {
  6. { /* STB 04xxx */
  7. .pvr_mask = 0xffff0000,
  8. .pvr_value = 0x41810000,
  9. .cpu_name = "STB04xxx",
  10. .cpu_features = CPU_FTRS_40X,
  11. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  12. PPC_FEATURE_HAS_4xxMAC,
  13. .mmu_features = MMU_FTR_TYPE_40x,
  14. .icache_bsize = 32,
  15. .dcache_bsize = 32,
  16. .machine_check = machine_check_4xx,
  17. .platform = "ppc405",
  18. },
  19. { /* NP405L */
  20. .pvr_mask = 0xffff0000,
  21. .pvr_value = 0x41610000,
  22. .cpu_name = "NP405L",
  23. .cpu_features = CPU_FTRS_40X,
  24. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  25. PPC_FEATURE_HAS_4xxMAC,
  26. .mmu_features = MMU_FTR_TYPE_40x,
  27. .icache_bsize = 32,
  28. .dcache_bsize = 32,
  29. .machine_check = machine_check_4xx,
  30. .platform = "ppc405",
  31. },
  32. { /* NP4GS3 */
  33. .pvr_mask = 0xffff0000,
  34. .pvr_value = 0x40B10000,
  35. .cpu_name = "NP4GS3",
  36. .cpu_features = CPU_FTRS_40X,
  37. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  38. PPC_FEATURE_HAS_4xxMAC,
  39. .mmu_features = MMU_FTR_TYPE_40x,
  40. .icache_bsize = 32,
  41. .dcache_bsize = 32,
  42. .machine_check = machine_check_4xx,
  43. .platform = "ppc405",
  44. },
  45. { /* NP405H */
  46. .pvr_mask = 0xffff0000,
  47. .pvr_value = 0x41410000,
  48. .cpu_name = "NP405H",
  49. .cpu_features = CPU_FTRS_40X,
  50. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  51. PPC_FEATURE_HAS_4xxMAC,
  52. .mmu_features = MMU_FTR_TYPE_40x,
  53. .icache_bsize = 32,
  54. .dcache_bsize = 32,
  55. .machine_check = machine_check_4xx,
  56. .platform = "ppc405",
  57. },
  58. { /* 405GPr */
  59. .pvr_mask = 0xffff0000,
  60. .pvr_value = 0x50910000,
  61. .cpu_name = "405GPr",
  62. .cpu_features = CPU_FTRS_40X,
  63. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  64. PPC_FEATURE_HAS_4xxMAC,
  65. .mmu_features = MMU_FTR_TYPE_40x,
  66. .icache_bsize = 32,
  67. .dcache_bsize = 32,
  68. .machine_check = machine_check_4xx,
  69. .platform = "ppc405",
  70. },
  71. { /* STBx25xx */
  72. .pvr_mask = 0xffff0000,
  73. .pvr_value = 0x51510000,
  74. .cpu_name = "STBx25xx",
  75. .cpu_features = CPU_FTRS_40X,
  76. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  77. PPC_FEATURE_HAS_4xxMAC,
  78. .mmu_features = MMU_FTR_TYPE_40x,
  79. .icache_bsize = 32,
  80. .dcache_bsize = 32,
  81. .machine_check = machine_check_4xx,
  82. .platform = "ppc405",
  83. },
  84. { /* 405LP */
  85. .pvr_mask = 0xffff0000,
  86. .pvr_value = 0x41F10000,
  87. .cpu_name = "405LP",
  88. .cpu_features = CPU_FTRS_40X,
  89. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  90. .mmu_features = MMU_FTR_TYPE_40x,
  91. .icache_bsize = 32,
  92. .dcache_bsize = 32,
  93. .machine_check = machine_check_4xx,
  94. .platform = "ppc405",
  95. },
  96. { /* 405EP */
  97. .pvr_mask = 0xffff0000,
  98. .pvr_value = 0x51210000,
  99. .cpu_name = "405EP",
  100. .cpu_features = CPU_FTRS_40X,
  101. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  102. PPC_FEATURE_HAS_4xxMAC,
  103. .mmu_features = MMU_FTR_TYPE_40x,
  104. .icache_bsize = 32,
  105. .dcache_bsize = 32,
  106. .machine_check = machine_check_4xx,
  107. .platform = "ppc405",
  108. },
  109. { /* 405EX Rev. A/B with Security */
  110. .pvr_mask = 0xffff000f,
  111. .pvr_value = 0x12910007,
  112. .cpu_name = "405EX Rev. A/B",
  113. .cpu_features = CPU_FTRS_40X,
  114. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  115. PPC_FEATURE_HAS_4xxMAC,
  116. .mmu_features = MMU_FTR_TYPE_40x,
  117. .icache_bsize = 32,
  118. .dcache_bsize = 32,
  119. .machine_check = machine_check_4xx,
  120. .platform = "ppc405",
  121. },
  122. { /* 405EX Rev. C without Security */
  123. .pvr_mask = 0xffff000f,
  124. .pvr_value = 0x1291000d,
  125. .cpu_name = "405EX Rev. C",
  126. .cpu_features = CPU_FTRS_40X,
  127. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  128. PPC_FEATURE_HAS_4xxMAC,
  129. .mmu_features = MMU_FTR_TYPE_40x,
  130. .icache_bsize = 32,
  131. .dcache_bsize = 32,
  132. .machine_check = machine_check_4xx,
  133. .platform = "ppc405",
  134. },
  135. { /* 405EX Rev. C with Security */
  136. .pvr_mask = 0xffff000f,
  137. .pvr_value = 0x1291000f,
  138. .cpu_name = "405EX Rev. C",
  139. .cpu_features = CPU_FTRS_40X,
  140. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  141. PPC_FEATURE_HAS_4xxMAC,
  142. .mmu_features = MMU_FTR_TYPE_40x,
  143. .icache_bsize = 32,
  144. .dcache_bsize = 32,
  145. .machine_check = machine_check_4xx,
  146. .platform = "ppc405",
  147. },
  148. { /* 405EX Rev. D without Security */
  149. .pvr_mask = 0xffff000f,
  150. .pvr_value = 0x12910003,
  151. .cpu_name = "405EX Rev. D",
  152. .cpu_features = CPU_FTRS_40X,
  153. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  154. PPC_FEATURE_HAS_4xxMAC,
  155. .mmu_features = MMU_FTR_TYPE_40x,
  156. .icache_bsize = 32,
  157. .dcache_bsize = 32,
  158. .machine_check = machine_check_4xx,
  159. .platform = "ppc405",
  160. },
  161. { /* 405EX Rev. D with Security */
  162. .pvr_mask = 0xffff000f,
  163. .pvr_value = 0x12910005,
  164. .cpu_name = "405EX Rev. D",
  165. .cpu_features = CPU_FTRS_40X,
  166. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  167. PPC_FEATURE_HAS_4xxMAC,
  168. .mmu_features = MMU_FTR_TYPE_40x,
  169. .icache_bsize = 32,
  170. .dcache_bsize = 32,
  171. .machine_check = machine_check_4xx,
  172. .platform = "ppc405",
  173. },
  174. { /* 405EXr Rev. A/B without Security */
  175. .pvr_mask = 0xffff000f,
  176. .pvr_value = 0x12910001,
  177. .cpu_name = "405EXr Rev. A/B",
  178. .cpu_features = CPU_FTRS_40X,
  179. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  180. PPC_FEATURE_HAS_4xxMAC,
  181. .mmu_features = MMU_FTR_TYPE_40x,
  182. .icache_bsize = 32,
  183. .dcache_bsize = 32,
  184. .machine_check = machine_check_4xx,
  185. .platform = "ppc405",
  186. },
  187. { /* 405EXr Rev. C without Security */
  188. .pvr_mask = 0xffff000f,
  189. .pvr_value = 0x12910009,
  190. .cpu_name = "405EXr Rev. C",
  191. .cpu_features = CPU_FTRS_40X,
  192. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  193. PPC_FEATURE_HAS_4xxMAC,
  194. .mmu_features = MMU_FTR_TYPE_40x,
  195. .icache_bsize = 32,
  196. .dcache_bsize = 32,
  197. .machine_check = machine_check_4xx,
  198. .platform = "ppc405",
  199. },
  200. { /* 405EXr Rev. C with Security */
  201. .pvr_mask = 0xffff000f,
  202. .pvr_value = 0x1291000b,
  203. .cpu_name = "405EXr Rev. C",
  204. .cpu_features = CPU_FTRS_40X,
  205. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  206. PPC_FEATURE_HAS_4xxMAC,
  207. .mmu_features = MMU_FTR_TYPE_40x,
  208. .icache_bsize = 32,
  209. .dcache_bsize = 32,
  210. .machine_check = machine_check_4xx,
  211. .platform = "ppc405",
  212. },
  213. { /* 405EXr Rev. D without Security */
  214. .pvr_mask = 0xffff000f,
  215. .pvr_value = 0x12910000,
  216. .cpu_name = "405EXr Rev. D",
  217. .cpu_features = CPU_FTRS_40X,
  218. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  219. PPC_FEATURE_HAS_4xxMAC,
  220. .mmu_features = MMU_FTR_TYPE_40x,
  221. .icache_bsize = 32,
  222. .dcache_bsize = 32,
  223. .machine_check = machine_check_4xx,
  224. .platform = "ppc405",
  225. },
  226. { /* 405EXr Rev. D with Security */
  227. .pvr_mask = 0xffff000f,
  228. .pvr_value = 0x12910002,
  229. .cpu_name = "405EXr Rev. D",
  230. .cpu_features = CPU_FTRS_40X,
  231. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  232. PPC_FEATURE_HAS_4xxMAC,
  233. .mmu_features = MMU_FTR_TYPE_40x,
  234. .icache_bsize = 32,
  235. .dcache_bsize = 32,
  236. .machine_check = machine_check_4xx,
  237. .platform = "ppc405",
  238. },
  239. {
  240. /* 405EZ */
  241. .pvr_mask = 0xffff0000,
  242. .pvr_value = 0x41510000,
  243. .cpu_name = "405EZ",
  244. .cpu_features = CPU_FTRS_40X,
  245. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  246. PPC_FEATURE_HAS_4xxMAC,
  247. .mmu_features = MMU_FTR_TYPE_40x,
  248. .icache_bsize = 32,
  249. .dcache_bsize = 32,
  250. .machine_check = machine_check_4xx,
  251. .platform = "ppc405",
  252. },
  253. { /* APM8018X */
  254. .pvr_mask = 0xffff0000,
  255. .pvr_value = 0x7ff11432,
  256. .cpu_name = "APM8018X",
  257. .cpu_features = CPU_FTRS_40X,
  258. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  259. PPC_FEATURE_HAS_4xxMAC,
  260. .mmu_features = MMU_FTR_TYPE_40x,
  261. .icache_bsize = 32,
  262. .dcache_bsize = 32,
  263. .machine_check = machine_check_4xx,
  264. .platform = "ppc405",
  265. },
  266. { /* default match */
  267. .pvr_mask = 0x00000000,
  268. .pvr_value = 0x00000000,
  269. .cpu_name = "(generic 40x PPC)",
  270. .cpu_features = CPU_FTRS_40X,
  271. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU |
  272. PPC_FEATURE_HAS_4xxMAC,
  273. .mmu_features = MMU_FTR_TYPE_40x,
  274. .icache_bsize = 32,
  275. .dcache_bsize = 32,
  276. .machine_check = machine_check_4xx,
  277. .platform = "ppc405",
  278. }
  279. };