page_64.h 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106
  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. #ifndef _ASM_POWERPC_PAGE_64_H
  3. #define _ASM_POWERPC_PAGE_64_H
  4. /*
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. */
  7. #include <asm/asm-const.h>
  8. /*
  9. * We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux
  10. * specific, every notion of page number shared with the firmware, TCEs,
  11. * iommu, etc... still uses a page size of 4K.
  12. */
  13. #define HW_PAGE_SHIFT 12
  14. #define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT)
  15. #define HW_PAGE_MASK (~(HW_PAGE_SIZE-1))
  16. /*
  17. * PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
  18. * HW_PAGE_SHIFT, that is 4K pages.
  19. */
  20. #define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
  21. /* Segment size; normal 256M segments */
  22. #define SID_SHIFT 28
  23. #define SID_MASK ASM_CONST(0xfffffffff)
  24. #define ESID_MASK 0xfffffffff0000000UL
  25. #define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
  26. /* 1T segments */
  27. #define SID_SHIFT_1T 40
  28. #define SID_MASK_1T 0xffffffUL
  29. #define ESID_MASK_1T 0xffffff0000000000UL
  30. #define GET_ESID_1T(x) (((x) >> SID_SHIFT_1T) & SID_MASK_1T)
  31. #ifndef __ASSEMBLY__
  32. #include <asm/cache.h>
  33. typedef unsigned long pte_basic_t;
  34. static inline void clear_page(void *addr)
  35. {
  36. unsigned long iterations;
  37. unsigned long onex, twox, fourx, eightx;
  38. iterations = ppc64_caches.l1d.blocks_per_page / 8;
  39. /*
  40. * Some verisions of gcc use multiply instructions to
  41. * calculate the offsets so lets give it a hand to
  42. * do better.
  43. */
  44. onex = ppc64_caches.l1d.block_size;
  45. twox = onex << 1;
  46. fourx = onex << 2;
  47. eightx = onex << 3;
  48. asm volatile(
  49. "mtctr %1 # clear_page\n\
  50. .balign 16\n\
  51. 1: dcbz 0,%0\n\
  52. dcbz %3,%0\n\
  53. dcbz %4,%0\n\
  54. dcbz %5,%0\n\
  55. dcbz %6,%0\n\
  56. dcbz %7,%0\n\
  57. dcbz %8,%0\n\
  58. dcbz %9,%0\n\
  59. add %0,%0,%10\n\
  60. bdnz+ 1b"
  61. : "=&r" (addr)
  62. : "r" (iterations), "0" (addr), "b" (onex), "b" (twox),
  63. "b" (twox+onex), "b" (fourx), "b" (fourx+onex),
  64. "b" (twox+fourx), "b" (eightx-onex), "r" (eightx)
  65. : "ctr", "memory");
  66. }
  67. extern void copy_page(void *to, void *from);
  68. /* Log 2 of page table size */
  69. extern u64 ppc64_pft_size;
  70. #endif /* __ASSEMBLY__ */
  71. #define VM_DATA_DEFAULT_FLAGS \
  72. (is_32bit_task() ? \
  73. VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
  74. /*
  75. * This is the default if a program doesn't have a PT_GNU_STACK
  76. * program header entry. The PPC64 ELF ABI has a non executable stack
  77. * stack by default, so in the absence of a PT_GNU_STACK program header
  78. * we turn execute permission off.
  79. */
  80. #define VM_STACK_DEFAULT_FLAGS32 VM_DATA_FLAGS_EXEC
  81. #define VM_STACK_DEFAULT_FLAGS64 VM_DATA_FLAGS_NON_EXEC
  82. #define VM_STACK_DEFAULT_FLAGS \
  83. (is_32bit_task() ? \
  84. VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
  85. #include <asm-generic/getorder.h>
  86. #endif /* _ASM_POWERPC_PAGE_64_H */