ohare.h 1.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _ASM_POWERPC_OHARE_H
  3. #define _ASM_POWERPC_OHARE_H
  4. #ifdef __KERNEL__
  5. /*
  6. * ohare.h: definitions for using the "O'Hare" I/O controller chip.
  7. *
  8. * Copyright (C) 1997 Paul Mackerras.
  9. *
  10. * BenH: Changed to match those of heathrow (but not all of them). Please
  11. * check if I didn't break anything (especially the media bay).
  12. */
  13. /* offset from ohare base for feature control register */
  14. #define OHARE_MBCR 0x34
  15. #define OHARE_FCR 0x38
  16. /*
  17. * Bits in feature control register.
  18. * These were mostly derived by experiment on a powerbook 3400
  19. * and may differ for other machines.
  20. */
  21. #define OH_SCC_RESET 1
  22. #define OH_BAY_POWER_N 2 /* a guess */
  23. #define OH_BAY_PCI_ENABLE 4 /* a guess */
  24. #define OH_BAY_IDE_ENABLE 8
  25. #define OH_BAY_FLOPPY_ENABLE 0x10
  26. #define OH_IDE0_ENABLE 0x20
  27. #define OH_IDE0_RESET_N 0x40 /* a guess */
  28. #define OH_BAY_DEV_MASK 0x1c
  29. #define OH_BAY_RESET_N 0x80
  30. #define OH_IOBUS_ENABLE 0x100 /* IOBUS seems to be IDE */
  31. #define OH_SCC_ENABLE 0x200
  32. #define OH_MESH_ENABLE 0x400
  33. #define OH_FLOPPY_ENABLE 0x800
  34. #define OH_SCCA_IO 0x4000
  35. #define OH_SCCB_IO 0x8000
  36. #define OH_VIA_ENABLE 0x10000 /* Is apparently wrong, to be verified */
  37. #define OH_IDE1_RESET_N 0x800000
  38. /*
  39. * Bits to set in the feature control register on PowerBooks.
  40. */
  41. #define PBOOK_FEATURES (OH_IDE_ENABLE | OH_SCC_ENABLE | \
  42. OH_MESH_ENABLE | OH_SCCA_IO | OH_SCCB_IO)
  43. /*
  44. * A magic value to put into the feature control register of the
  45. * "ohare" I/O controller on Starmaxes to enable the IDE CD interface.
  46. * Contributed by Harry Eaton.
  47. */
  48. #define STARMAX_FEATURES 0xbeff7a
  49. #endif /* __KERNEL__ */
  50. #endif /* _ASM_POWERPC_OHARE_H */