mce.h 6.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * Machine check exception header file.
  4. *
  5. * Copyright 2013 IBM Corporation
  6. * Author: Mahesh Salgaonkar <[email protected]>
  7. */
  8. #ifndef __ASM_PPC64_MCE_H__
  9. #define __ASM_PPC64_MCE_H__
  10. #include <linux/bitops.h>
  11. enum MCE_Version {
  12. MCE_V1 = 1,
  13. };
  14. enum MCE_Severity {
  15. MCE_SEV_NO_ERROR = 0,
  16. MCE_SEV_WARNING = 1,
  17. MCE_SEV_SEVERE = 2,
  18. MCE_SEV_FATAL = 3,
  19. };
  20. enum MCE_Disposition {
  21. MCE_DISPOSITION_RECOVERED = 0,
  22. MCE_DISPOSITION_NOT_RECOVERED = 1,
  23. };
  24. enum MCE_Initiator {
  25. MCE_INITIATOR_UNKNOWN = 0,
  26. MCE_INITIATOR_CPU = 1,
  27. MCE_INITIATOR_PCI = 2,
  28. MCE_INITIATOR_ISA = 3,
  29. MCE_INITIATOR_MEMORY= 4,
  30. MCE_INITIATOR_POWERMGM = 5,
  31. };
  32. enum MCE_ErrorType {
  33. MCE_ERROR_TYPE_UNKNOWN = 0,
  34. MCE_ERROR_TYPE_UE = 1,
  35. MCE_ERROR_TYPE_SLB = 2,
  36. MCE_ERROR_TYPE_ERAT = 3,
  37. MCE_ERROR_TYPE_TLB = 4,
  38. MCE_ERROR_TYPE_USER = 5,
  39. MCE_ERROR_TYPE_RA = 6,
  40. MCE_ERROR_TYPE_LINK = 7,
  41. MCE_ERROR_TYPE_DCACHE = 8,
  42. MCE_ERROR_TYPE_ICACHE = 9,
  43. };
  44. enum MCE_ErrorClass {
  45. MCE_ECLASS_UNKNOWN = 0,
  46. MCE_ECLASS_HARDWARE,
  47. MCE_ECLASS_HARD_INDETERMINATE,
  48. MCE_ECLASS_SOFTWARE,
  49. MCE_ECLASS_SOFT_INDETERMINATE,
  50. };
  51. enum MCE_UeErrorType {
  52. MCE_UE_ERROR_INDETERMINATE = 0,
  53. MCE_UE_ERROR_IFETCH = 1,
  54. MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH = 2,
  55. MCE_UE_ERROR_LOAD_STORE = 3,
  56. MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 4,
  57. };
  58. enum MCE_SlbErrorType {
  59. MCE_SLB_ERROR_INDETERMINATE = 0,
  60. MCE_SLB_ERROR_PARITY = 1,
  61. MCE_SLB_ERROR_MULTIHIT = 2,
  62. };
  63. enum MCE_EratErrorType {
  64. MCE_ERAT_ERROR_INDETERMINATE = 0,
  65. MCE_ERAT_ERROR_PARITY = 1,
  66. MCE_ERAT_ERROR_MULTIHIT = 2,
  67. };
  68. enum MCE_TlbErrorType {
  69. MCE_TLB_ERROR_INDETERMINATE = 0,
  70. MCE_TLB_ERROR_PARITY = 1,
  71. MCE_TLB_ERROR_MULTIHIT = 2,
  72. };
  73. enum MCE_UserErrorType {
  74. MCE_USER_ERROR_INDETERMINATE = 0,
  75. MCE_USER_ERROR_TLBIE = 1,
  76. MCE_USER_ERROR_SCV = 2,
  77. };
  78. enum MCE_RaErrorType {
  79. MCE_RA_ERROR_INDETERMINATE = 0,
  80. MCE_RA_ERROR_IFETCH = 1,
  81. MCE_RA_ERROR_IFETCH_FOREIGN = 2,
  82. MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH = 3,
  83. MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH_FOREIGN = 4,
  84. MCE_RA_ERROR_LOAD = 5,
  85. MCE_RA_ERROR_STORE = 6,
  86. MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE = 7,
  87. MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN = 8,
  88. MCE_RA_ERROR_LOAD_STORE_FOREIGN = 9,
  89. };
  90. enum MCE_LinkErrorType {
  91. MCE_LINK_ERROR_INDETERMINATE = 0,
  92. MCE_LINK_ERROR_IFETCH_TIMEOUT = 1,
  93. MCE_LINK_ERROR_PAGE_TABLE_WALK_IFETCH_TIMEOUT = 2,
  94. MCE_LINK_ERROR_LOAD_TIMEOUT = 3,
  95. MCE_LINK_ERROR_STORE_TIMEOUT = 4,
  96. MCE_LINK_ERROR_PAGE_TABLE_WALK_LOAD_STORE_TIMEOUT = 5,
  97. };
  98. struct machine_check_event {
  99. enum MCE_Version version:8;
  100. u8 in_use;
  101. enum MCE_Severity severity:8;
  102. enum MCE_Initiator initiator:8;
  103. enum MCE_ErrorType error_type:8;
  104. enum MCE_ErrorClass error_class:8;
  105. enum MCE_Disposition disposition:8;
  106. bool sync_error;
  107. u16 cpu;
  108. u64 gpr3;
  109. u64 srr0;
  110. u64 srr1;
  111. union {
  112. struct {
  113. enum MCE_UeErrorType ue_error_type:8;
  114. u8 effective_address_provided;
  115. u8 physical_address_provided;
  116. u8 ignore_event;
  117. u8 reserved_1[4];
  118. u64 effective_address;
  119. u64 physical_address;
  120. u8 reserved_2[8];
  121. } ue_error;
  122. struct {
  123. enum MCE_SlbErrorType slb_error_type:8;
  124. u8 effective_address_provided;
  125. u8 reserved_1[6];
  126. u64 effective_address;
  127. u8 reserved_2[16];
  128. } slb_error;
  129. struct {
  130. enum MCE_EratErrorType erat_error_type:8;
  131. u8 effective_address_provided;
  132. u8 reserved_1[6];
  133. u64 effective_address;
  134. u8 reserved_2[16];
  135. } erat_error;
  136. struct {
  137. enum MCE_TlbErrorType tlb_error_type:8;
  138. u8 effective_address_provided;
  139. u8 reserved_1[6];
  140. u64 effective_address;
  141. u8 reserved_2[16];
  142. } tlb_error;
  143. struct {
  144. enum MCE_UserErrorType user_error_type:8;
  145. u8 effective_address_provided;
  146. u8 reserved_1[6];
  147. u64 effective_address;
  148. u8 reserved_2[16];
  149. } user_error;
  150. struct {
  151. enum MCE_RaErrorType ra_error_type:8;
  152. u8 effective_address_provided;
  153. u8 reserved_1[6];
  154. u64 effective_address;
  155. u8 reserved_2[16];
  156. } ra_error;
  157. struct {
  158. enum MCE_LinkErrorType link_error_type:8;
  159. u8 effective_address_provided;
  160. u8 reserved_1[6];
  161. u64 effective_address;
  162. u8 reserved_2[16];
  163. } link_error;
  164. } u;
  165. };
  166. struct mce_error_info {
  167. enum MCE_ErrorType error_type:8;
  168. union {
  169. enum MCE_UeErrorType ue_error_type:8;
  170. enum MCE_SlbErrorType slb_error_type:8;
  171. enum MCE_EratErrorType erat_error_type:8;
  172. enum MCE_TlbErrorType tlb_error_type:8;
  173. enum MCE_UserErrorType user_error_type:8;
  174. enum MCE_RaErrorType ra_error_type:8;
  175. enum MCE_LinkErrorType link_error_type:8;
  176. } u;
  177. enum MCE_Severity severity:8;
  178. enum MCE_Initiator initiator:8;
  179. enum MCE_ErrorClass error_class:8;
  180. bool sync_error;
  181. bool ignore_event;
  182. };
  183. #define MAX_MC_EVT 10
  184. struct mce_info {
  185. int mce_nest_count;
  186. struct machine_check_event mce_event[MAX_MC_EVT];
  187. /* Queue for delayed MCE events. */
  188. int mce_queue_count;
  189. struct machine_check_event mce_event_queue[MAX_MC_EVT];
  190. /* Queue for delayed MCE UE events. */
  191. int mce_ue_count;
  192. struct machine_check_event mce_ue_event_queue[MAX_MC_EVT];
  193. };
  194. /* Release flags for get_mce_event() */
  195. #define MCE_EVENT_RELEASE true
  196. #define MCE_EVENT_DONTRELEASE false
  197. struct pt_regs;
  198. struct notifier_block;
  199. extern void save_mce_event(struct pt_regs *regs, long handled,
  200. struct mce_error_info *mce_err, uint64_t nip,
  201. uint64_t addr, uint64_t phys_addr);
  202. extern int get_mce_event(struct machine_check_event *mce, bool release);
  203. extern void release_mce_event(void);
  204. extern void machine_check_queue_event(void);
  205. extern void machine_check_print_event_info(struct machine_check_event *evt,
  206. bool user_mode, bool in_guest);
  207. unsigned long addr_to_pfn(struct pt_regs *regs, unsigned long addr);
  208. extern void mce_common_process_ue(struct pt_regs *regs,
  209. struct mce_error_info *mce_err);
  210. void mce_irq_work_queue(void);
  211. int mce_register_notifier(struct notifier_block *nb);
  212. int mce_unregister_notifier(struct notifier_block *nb);
  213. #ifdef CONFIG_PPC_BOOK3S_64
  214. void mce_run_irq_context_handlers(void);
  215. #else
  216. static inline void mce_run_irq_context_handlers(void) { };
  217. #endif /* CONFIG_PPC_BOOK3S_64 */
  218. #ifdef CONFIG_PPC_BOOK3S_64
  219. void set_mce_pending_irq_work(void);
  220. void clear_mce_pending_irq_work(void);
  221. #endif /* CONFIG_PPC_BOOK3S_64 */
  222. #ifdef CONFIG_PPC_BOOK3S_64
  223. void flush_and_reload_slb(void);
  224. void flush_erat(void);
  225. long __machine_check_early_realmode_p7(struct pt_regs *regs);
  226. long __machine_check_early_realmode_p8(struct pt_regs *regs);
  227. long __machine_check_early_realmode_p9(struct pt_regs *regs);
  228. long __machine_check_early_realmode_p10(struct pt_regs *regs);
  229. #endif /* CONFIG_PPC_BOOK3S_64 */
  230. #ifdef CONFIG_PPC_BOOK3S_64
  231. void mce_init(void);
  232. #else
  233. static inline void mce_init(void) { };
  234. #endif /* CONFIG_PPC_BOOK3S_64 */
  235. #endif /* __ASM_PPC64_MCE_H__ */