interrupt.h 20 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. #ifndef _ASM_POWERPC_INTERRUPT_H
  3. #define _ASM_POWERPC_INTERRUPT_H
  4. /* BookE/4xx */
  5. #define INTERRUPT_CRITICAL_INPUT 0x100
  6. /* BookE */
  7. #define INTERRUPT_DEBUG 0xd00
  8. #ifdef CONFIG_BOOKE
  9. #define INTERRUPT_PERFMON 0x260
  10. #define INTERRUPT_DOORBELL 0x280
  11. #endif
  12. /* BookS/4xx/8xx */
  13. #define INTERRUPT_MACHINE_CHECK 0x200
  14. /* BookS/8xx */
  15. #define INTERRUPT_SYSTEM_RESET 0x100
  16. /* BookS */
  17. #define INTERRUPT_DATA_SEGMENT 0x380
  18. #define INTERRUPT_INST_SEGMENT 0x480
  19. #define INTERRUPT_TRACE 0xd00
  20. #define INTERRUPT_H_DATA_STORAGE 0xe00
  21. #define INTERRUPT_HMI 0xe60
  22. #define INTERRUPT_H_FAC_UNAVAIL 0xf80
  23. #ifdef CONFIG_PPC_BOOK3S
  24. #define INTERRUPT_DOORBELL 0xa00
  25. #define INTERRUPT_PERFMON 0xf00
  26. #define INTERRUPT_ALTIVEC_UNAVAIL 0xf20
  27. #endif
  28. /* BookE/BookS/4xx/8xx */
  29. #define INTERRUPT_DATA_STORAGE 0x300
  30. #define INTERRUPT_INST_STORAGE 0x400
  31. #define INTERRUPT_EXTERNAL 0x500
  32. #define INTERRUPT_ALIGNMENT 0x600
  33. #define INTERRUPT_PROGRAM 0x700
  34. #define INTERRUPT_SYSCALL 0xc00
  35. #define INTERRUPT_TRACE 0xd00
  36. /* BookE/BookS/44x */
  37. #define INTERRUPT_FP_UNAVAIL 0x800
  38. /* BookE/BookS/44x/8xx */
  39. #define INTERRUPT_DECREMENTER 0x900
  40. #ifndef INTERRUPT_PERFMON
  41. #define INTERRUPT_PERFMON 0x0
  42. #endif
  43. /* 8xx */
  44. #define INTERRUPT_SOFT_EMU_8xx 0x1000
  45. #define INTERRUPT_INST_TLB_MISS_8xx 0x1100
  46. #define INTERRUPT_DATA_TLB_MISS_8xx 0x1200
  47. #define INTERRUPT_INST_TLB_ERROR_8xx 0x1300
  48. #define INTERRUPT_DATA_TLB_ERROR_8xx 0x1400
  49. #define INTERRUPT_DATA_BREAKPOINT_8xx 0x1c00
  50. #define INTERRUPT_INST_BREAKPOINT_8xx 0x1d00
  51. /* 603 */
  52. #define INTERRUPT_INST_TLB_MISS_603 0x1000
  53. #define INTERRUPT_DATA_LOAD_TLB_MISS_603 0x1100
  54. #define INTERRUPT_DATA_STORE_TLB_MISS_603 0x1200
  55. #ifndef __ASSEMBLY__
  56. #include <linux/context_tracking.h>
  57. #include <linux/hardirq.h>
  58. #include <asm/cputime.h>
  59. #include <asm/firmware.h>
  60. #include <asm/ftrace.h>
  61. #include <asm/kprobes.h>
  62. #include <asm/runlatch.h>
  63. #ifdef CONFIG_PPC64
  64. /*
  65. * WARN/BUG is handled with a program interrupt so minimise checks here to
  66. * avoid recursion and maximise the chance of getting the first oops handled.
  67. */
  68. #define INT_SOFT_MASK_BUG_ON(regs, cond) \
  69. do { \
  70. if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG) && \
  71. (user_mode(regs) || (TRAP(regs) != INTERRUPT_PROGRAM))) \
  72. BUG_ON(cond); \
  73. } while (0)
  74. #endif
  75. #ifdef CONFIG_PPC_BOOK3S_64
  76. extern char __end_soft_masked[];
  77. bool search_kernel_soft_mask_table(unsigned long addr);
  78. unsigned long search_kernel_restart_table(unsigned long addr);
  79. DECLARE_STATIC_KEY_FALSE(interrupt_exit_not_reentrant);
  80. static inline bool is_implicit_soft_masked(struct pt_regs *regs)
  81. {
  82. if (regs->msr & MSR_PR)
  83. return false;
  84. if (regs->nip >= (unsigned long)__end_soft_masked)
  85. return false;
  86. return search_kernel_soft_mask_table(regs->nip);
  87. }
  88. static inline void srr_regs_clobbered(void)
  89. {
  90. local_paca->srr_valid = 0;
  91. local_paca->hsrr_valid = 0;
  92. }
  93. #else
  94. static inline unsigned long search_kernel_restart_table(unsigned long addr)
  95. {
  96. return 0;
  97. }
  98. static inline bool is_implicit_soft_masked(struct pt_regs *regs)
  99. {
  100. return false;
  101. }
  102. static inline void srr_regs_clobbered(void)
  103. {
  104. }
  105. #endif
  106. static inline void nap_adjust_return(struct pt_regs *regs)
  107. {
  108. #ifdef CONFIG_PPC_970_NAP
  109. if (unlikely(test_thread_local_flags(_TLF_NAPPING))) {
  110. /* Can avoid a test-and-clear because NMIs do not call this */
  111. clear_thread_local_flags(_TLF_NAPPING);
  112. regs_set_return_ip(regs, (unsigned long)power4_idle_nap_return);
  113. }
  114. #endif
  115. }
  116. static inline void booke_restore_dbcr0(void)
  117. {
  118. #ifdef CONFIG_PPC_ADV_DEBUG_REGS
  119. unsigned long dbcr0 = current->thread.debug.dbcr0;
  120. if (IS_ENABLED(CONFIG_PPC32) && unlikely(dbcr0 & DBCR0_IDM)) {
  121. mtspr(SPRN_DBSR, -1);
  122. mtspr(SPRN_DBCR0, global_dbcr0[smp_processor_id()]);
  123. }
  124. #endif
  125. }
  126. static inline void interrupt_enter_prepare(struct pt_regs *regs)
  127. {
  128. #ifdef CONFIG_PPC32
  129. if (!arch_irq_disabled_regs(regs))
  130. trace_hardirqs_off();
  131. if (user_mode(regs))
  132. kuap_lock();
  133. else
  134. kuap_save_and_lock(regs);
  135. if (user_mode(regs))
  136. account_cpu_user_entry();
  137. #endif
  138. #ifdef CONFIG_PPC64
  139. bool trace_enable = false;
  140. if (IS_ENABLED(CONFIG_TRACE_IRQFLAGS)) {
  141. if (irq_soft_mask_set_return(IRQS_ALL_DISABLED) == IRQS_ENABLED)
  142. trace_enable = true;
  143. } else {
  144. irq_soft_mask_set(IRQS_ALL_DISABLED);
  145. }
  146. /*
  147. * If the interrupt was taken with HARD_DIS clear, then enable MSR[EE].
  148. * Asynchronous interrupts get here with HARD_DIS set (see below), so
  149. * this enables MSR[EE] for synchronous interrupts. IRQs remain
  150. * soft-masked. The interrupt handler may later call
  151. * interrupt_cond_local_irq_enable() to achieve a regular process
  152. * context.
  153. */
  154. if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) {
  155. INT_SOFT_MASK_BUG_ON(regs, !(regs->msr & MSR_EE));
  156. __hard_irq_enable();
  157. } else {
  158. __hard_RI_enable();
  159. }
  160. /* Do this when RI=1 because it can cause SLB faults */
  161. if (trace_enable)
  162. trace_hardirqs_off();
  163. if (user_mode(regs)) {
  164. kuap_lock();
  165. CT_WARN_ON(ct_state() != CONTEXT_USER);
  166. user_exit_irqoff();
  167. account_cpu_user_entry();
  168. account_stolen_time();
  169. } else {
  170. kuap_save_and_lock(regs);
  171. /*
  172. * CT_WARN_ON comes here via program_check_exception,
  173. * so avoid recursion.
  174. */
  175. if (TRAP(regs) != INTERRUPT_PROGRAM)
  176. CT_WARN_ON(ct_state() != CONTEXT_KERNEL &&
  177. ct_state() != CONTEXT_IDLE);
  178. INT_SOFT_MASK_BUG_ON(regs, is_implicit_soft_masked(regs));
  179. INT_SOFT_MASK_BUG_ON(regs, arch_irq_disabled_regs(regs) &&
  180. search_kernel_restart_table(regs->nip));
  181. }
  182. INT_SOFT_MASK_BUG_ON(regs, !arch_irq_disabled_regs(regs) &&
  183. !(regs->msr & MSR_EE));
  184. #endif
  185. booke_restore_dbcr0();
  186. }
  187. /*
  188. * Care should be taken to note that interrupt_exit_prepare and
  189. * interrupt_async_exit_prepare do not necessarily return immediately to
  190. * regs context (e.g., if regs is usermode, we don't necessarily return to
  191. * user mode). Other interrupts might be taken between here and return,
  192. * context switch / preemption may occur in the exit path after this, or a
  193. * signal may be delivered, etc.
  194. *
  195. * The real interrupt exit code is platform specific, e.g.,
  196. * interrupt_exit_user_prepare / interrupt_exit_kernel_prepare for 64s.
  197. *
  198. * However interrupt_nmi_exit_prepare does return directly to regs, because
  199. * NMIs do not do "exit work" or replay soft-masked interrupts.
  200. */
  201. static inline void interrupt_exit_prepare(struct pt_regs *regs)
  202. {
  203. }
  204. static inline void interrupt_async_enter_prepare(struct pt_regs *regs)
  205. {
  206. #ifdef CONFIG_PPC64
  207. /* Ensure interrupt_enter_prepare does not enable MSR[EE] */
  208. local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
  209. #endif
  210. interrupt_enter_prepare(regs);
  211. #ifdef CONFIG_PPC_BOOK3S_64
  212. /*
  213. * RI=1 is set by interrupt_enter_prepare, so this thread flags access
  214. * has to come afterward (it can cause SLB faults).
  215. */
  216. if (cpu_has_feature(CPU_FTR_CTRL) &&
  217. !test_thread_local_flags(_TLF_RUNLATCH))
  218. __ppc64_runlatch_on();
  219. #endif
  220. irq_enter();
  221. }
  222. static inline void interrupt_async_exit_prepare(struct pt_regs *regs)
  223. {
  224. /*
  225. * Adjust at exit so the main handler sees the true NIA. This must
  226. * come before irq_exit() because irq_exit can enable interrupts, and
  227. * if another interrupt is taken before nap_adjust_return has run
  228. * here, then that interrupt would return directly to idle nap return.
  229. */
  230. nap_adjust_return(regs);
  231. irq_exit();
  232. interrupt_exit_prepare(regs);
  233. }
  234. struct interrupt_nmi_state {
  235. #ifdef CONFIG_PPC64
  236. u8 irq_soft_mask;
  237. u8 irq_happened;
  238. u8 ftrace_enabled;
  239. u64 softe;
  240. #endif
  241. };
  242. static inline bool nmi_disables_ftrace(struct pt_regs *regs)
  243. {
  244. /* Allow DEC and PMI to be traced when they are soft-NMI */
  245. if (IS_ENABLED(CONFIG_PPC_BOOK3S_64)) {
  246. if (TRAP(regs) == INTERRUPT_DECREMENTER)
  247. return false;
  248. if (TRAP(regs) == INTERRUPT_PERFMON)
  249. return false;
  250. }
  251. if (IS_ENABLED(CONFIG_PPC_BOOK3E_64)) {
  252. if (TRAP(regs) == INTERRUPT_PERFMON)
  253. return false;
  254. }
  255. return true;
  256. }
  257. static inline void interrupt_nmi_enter_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state)
  258. {
  259. #ifdef CONFIG_PPC64
  260. state->irq_soft_mask = local_paca->irq_soft_mask;
  261. state->irq_happened = local_paca->irq_happened;
  262. state->softe = regs->softe;
  263. /*
  264. * Set IRQS_ALL_DISABLED unconditionally so irqs_disabled() does
  265. * the right thing, and set IRQ_HARD_DIS. We do not want to reconcile
  266. * because that goes through irq tracing which we don't want in NMI.
  267. */
  268. local_paca->irq_soft_mask = IRQS_ALL_DISABLED;
  269. local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
  270. if (!(regs->msr & MSR_EE) || is_implicit_soft_masked(regs)) {
  271. /*
  272. * Adjust regs->softe to be soft-masked if it had not been
  273. * reconcied (e.g., interrupt entry with MSR[EE]=0 but softe
  274. * not yet set disabled), or if it was in an implicit soft
  275. * masked state. This makes arch_irq_disabled_regs(regs)
  276. * behave as expected.
  277. */
  278. regs->softe = IRQS_ALL_DISABLED;
  279. }
  280. __hard_RI_enable();
  281. /* Don't do any per-CPU operations until interrupt state is fixed */
  282. if (nmi_disables_ftrace(regs)) {
  283. state->ftrace_enabled = this_cpu_get_ftrace_enabled();
  284. this_cpu_set_ftrace_enabled(0);
  285. }
  286. #endif
  287. /* If data relocations are enabled, it's safe to use nmi_enter() */
  288. if (mfmsr() & MSR_DR) {
  289. nmi_enter();
  290. return;
  291. }
  292. /*
  293. * But do not use nmi_enter() for pseries hash guest taking a real-mode
  294. * NMI because not everything it touches is within the RMA limit.
  295. */
  296. if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) &&
  297. firmware_has_feature(FW_FEATURE_LPAR) &&
  298. !radix_enabled())
  299. return;
  300. /*
  301. * Likewise, don't use it if we have some form of instrumentation (like
  302. * KASAN shadow) that is not safe to access in real mode (even on radix)
  303. */
  304. if (IS_ENABLED(CONFIG_KASAN))
  305. return;
  306. /* Otherwise, it should be safe to call it */
  307. nmi_enter();
  308. }
  309. static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state)
  310. {
  311. if (mfmsr() & MSR_DR) {
  312. // nmi_exit if relocations are on
  313. nmi_exit();
  314. } else if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) &&
  315. firmware_has_feature(FW_FEATURE_LPAR) &&
  316. !radix_enabled()) {
  317. // no nmi_exit for a pseries hash guest taking a real mode exception
  318. } else if (IS_ENABLED(CONFIG_KASAN)) {
  319. // no nmi_exit for KASAN in real mode
  320. } else {
  321. nmi_exit();
  322. }
  323. /*
  324. * nmi does not call nap_adjust_return because nmi should not create
  325. * new work to do (must use irq_work for that).
  326. */
  327. #ifdef CONFIG_PPC64
  328. #ifdef CONFIG_PPC_BOOK3S
  329. if (arch_irq_disabled_regs(regs)) {
  330. unsigned long rst = search_kernel_restart_table(regs->nip);
  331. if (rst)
  332. regs_set_return_ip(regs, rst);
  333. }
  334. #endif
  335. if (nmi_disables_ftrace(regs))
  336. this_cpu_set_ftrace_enabled(state->ftrace_enabled);
  337. /* Check we didn't change the pending interrupt mask. */
  338. WARN_ON_ONCE((state->irq_happened | PACA_IRQ_HARD_DIS) != local_paca->irq_happened);
  339. regs->softe = state->softe;
  340. local_paca->irq_happened = state->irq_happened;
  341. local_paca->irq_soft_mask = state->irq_soft_mask;
  342. #endif
  343. }
  344. /*
  345. * Don't use noinstr here like x86, but rather add NOKPROBE_SYMBOL to each
  346. * function definition. The reason for this is the noinstr section is placed
  347. * after the main text section, i.e., very far away from the interrupt entry
  348. * asm. That creates problems with fitting linker stubs when building large
  349. * kernels.
  350. */
  351. #define interrupt_handler __visible noinline notrace __no_kcsan __no_sanitize_address
  352. /**
  353. * DECLARE_INTERRUPT_HANDLER_RAW - Declare raw interrupt handler function
  354. * @func: Function name of the entry point
  355. * @returns: Returns a value back to asm caller
  356. */
  357. #define DECLARE_INTERRUPT_HANDLER_RAW(func) \
  358. __visible long func(struct pt_regs *regs)
  359. /**
  360. * DEFINE_INTERRUPT_HANDLER_RAW - Define raw interrupt handler function
  361. * @func: Function name of the entry point
  362. * @returns: Returns a value back to asm caller
  363. *
  364. * @func is called from ASM entry code.
  365. *
  366. * This is a plain function which does no tracing, reconciling, etc.
  367. * The macro is written so it acts as function definition. Append the
  368. * body with a pair of curly brackets.
  369. *
  370. * raw interrupt handlers must not enable or disable interrupts, or
  371. * schedule, tracing and instrumentation (ftrace, lockdep, etc) would
  372. * not be advisable either, although may be possible in a pinch, the
  373. * trace will look odd at least.
  374. *
  375. * A raw handler may call one of the other interrupt handler functions
  376. * to be converted into that interrupt context without these restrictions.
  377. *
  378. * On PPC64, _RAW handlers may return with fast_interrupt_return.
  379. *
  380. * Specific handlers may have additional restrictions.
  381. */
  382. #define DEFINE_INTERRUPT_HANDLER_RAW(func) \
  383. static __always_inline __no_sanitize_address __no_kcsan long \
  384. ____##func(struct pt_regs *regs); \
  385. \
  386. interrupt_handler long func(struct pt_regs *regs) \
  387. { \
  388. long ret; \
  389. \
  390. __hard_RI_enable(); \
  391. \
  392. ret = ____##func (regs); \
  393. \
  394. return ret; \
  395. } \
  396. NOKPROBE_SYMBOL(func); \
  397. \
  398. static __always_inline __no_sanitize_address __no_kcsan long \
  399. ____##func(struct pt_regs *regs)
  400. /**
  401. * DECLARE_INTERRUPT_HANDLER - Declare synchronous interrupt handler function
  402. * @func: Function name of the entry point
  403. */
  404. #define DECLARE_INTERRUPT_HANDLER(func) \
  405. __visible void func(struct pt_regs *regs)
  406. /**
  407. * DEFINE_INTERRUPT_HANDLER - Define synchronous interrupt handler function
  408. * @func: Function name of the entry point
  409. *
  410. * @func is called from ASM entry code.
  411. *
  412. * The macro is written so it acts as function definition. Append the
  413. * body with a pair of curly brackets.
  414. */
  415. #define DEFINE_INTERRUPT_HANDLER(func) \
  416. static __always_inline void ____##func(struct pt_regs *regs); \
  417. \
  418. interrupt_handler void func(struct pt_regs *regs) \
  419. { \
  420. interrupt_enter_prepare(regs); \
  421. \
  422. ____##func (regs); \
  423. \
  424. interrupt_exit_prepare(regs); \
  425. } \
  426. NOKPROBE_SYMBOL(func); \
  427. \
  428. static __always_inline void ____##func(struct pt_regs *regs)
  429. /**
  430. * DECLARE_INTERRUPT_HANDLER_RET - Declare synchronous interrupt handler function
  431. * @func: Function name of the entry point
  432. * @returns: Returns a value back to asm caller
  433. */
  434. #define DECLARE_INTERRUPT_HANDLER_RET(func) \
  435. __visible long func(struct pt_regs *regs)
  436. /**
  437. * DEFINE_INTERRUPT_HANDLER_RET - Define synchronous interrupt handler function
  438. * @func: Function name of the entry point
  439. * @returns: Returns a value back to asm caller
  440. *
  441. * @func is called from ASM entry code.
  442. *
  443. * The macro is written so it acts as function definition. Append the
  444. * body with a pair of curly brackets.
  445. */
  446. #define DEFINE_INTERRUPT_HANDLER_RET(func) \
  447. static __always_inline long ____##func(struct pt_regs *regs); \
  448. \
  449. interrupt_handler long func(struct pt_regs *regs) \
  450. { \
  451. long ret; \
  452. \
  453. interrupt_enter_prepare(regs); \
  454. \
  455. ret = ____##func (regs); \
  456. \
  457. interrupt_exit_prepare(regs); \
  458. \
  459. return ret; \
  460. } \
  461. NOKPROBE_SYMBOL(func); \
  462. \
  463. static __always_inline long ____##func(struct pt_regs *regs)
  464. /**
  465. * DECLARE_INTERRUPT_HANDLER_ASYNC - Declare asynchronous interrupt handler function
  466. * @func: Function name of the entry point
  467. */
  468. #define DECLARE_INTERRUPT_HANDLER_ASYNC(func) \
  469. __visible void func(struct pt_regs *regs)
  470. /**
  471. * DEFINE_INTERRUPT_HANDLER_ASYNC - Define asynchronous interrupt handler function
  472. * @func: Function name of the entry point
  473. *
  474. * @func is called from ASM entry code.
  475. *
  476. * The macro is written so it acts as function definition. Append the
  477. * body with a pair of curly brackets.
  478. */
  479. #define DEFINE_INTERRUPT_HANDLER_ASYNC(func) \
  480. static __always_inline void ____##func(struct pt_regs *regs); \
  481. \
  482. interrupt_handler void func(struct pt_regs *regs) \
  483. { \
  484. interrupt_async_enter_prepare(regs); \
  485. \
  486. ____##func (regs); \
  487. \
  488. interrupt_async_exit_prepare(regs); \
  489. } \
  490. NOKPROBE_SYMBOL(func); \
  491. \
  492. static __always_inline void ____##func(struct pt_regs *regs)
  493. /**
  494. * DECLARE_INTERRUPT_HANDLER_NMI - Declare NMI interrupt handler function
  495. * @func: Function name of the entry point
  496. * @returns: Returns a value back to asm caller
  497. */
  498. #define DECLARE_INTERRUPT_HANDLER_NMI(func) \
  499. __visible long func(struct pt_regs *regs)
  500. /**
  501. * DEFINE_INTERRUPT_HANDLER_NMI - Define NMI interrupt handler function
  502. * @func: Function name of the entry point
  503. * @returns: Returns a value back to asm caller
  504. *
  505. * @func is called from ASM entry code.
  506. *
  507. * The macro is written so it acts as function definition. Append the
  508. * body with a pair of curly brackets.
  509. */
  510. #define DEFINE_INTERRUPT_HANDLER_NMI(func) \
  511. static __always_inline __no_sanitize_address __no_kcsan long \
  512. ____##func(struct pt_regs *regs); \
  513. \
  514. interrupt_handler long func(struct pt_regs *regs) \
  515. { \
  516. struct interrupt_nmi_state state; \
  517. long ret; \
  518. \
  519. interrupt_nmi_enter_prepare(regs, &state); \
  520. \
  521. ret = ____##func (regs); \
  522. \
  523. interrupt_nmi_exit_prepare(regs, &state); \
  524. \
  525. return ret; \
  526. } \
  527. NOKPROBE_SYMBOL(func); \
  528. \
  529. static __always_inline __no_sanitize_address __no_kcsan long \
  530. ____##func(struct pt_regs *regs)
  531. /* Interrupt handlers */
  532. /* kernel/traps.c */
  533. DECLARE_INTERRUPT_HANDLER_NMI(system_reset_exception);
  534. #ifdef CONFIG_PPC_BOOK3S_64
  535. DECLARE_INTERRUPT_HANDLER_RAW(machine_check_early_boot);
  536. DECLARE_INTERRUPT_HANDLER_ASYNC(machine_check_exception_async);
  537. #endif
  538. DECLARE_INTERRUPT_HANDLER_NMI(machine_check_exception);
  539. DECLARE_INTERRUPT_HANDLER(SMIException);
  540. DECLARE_INTERRUPT_HANDLER(handle_hmi_exception);
  541. DECLARE_INTERRUPT_HANDLER(unknown_exception);
  542. DECLARE_INTERRUPT_HANDLER_ASYNC(unknown_async_exception);
  543. DECLARE_INTERRUPT_HANDLER_NMI(unknown_nmi_exception);
  544. DECLARE_INTERRUPT_HANDLER(instruction_breakpoint_exception);
  545. DECLARE_INTERRUPT_HANDLER(RunModeException);
  546. DECLARE_INTERRUPT_HANDLER(single_step_exception);
  547. DECLARE_INTERRUPT_HANDLER(program_check_exception);
  548. DECLARE_INTERRUPT_HANDLER(emulation_assist_interrupt);
  549. DECLARE_INTERRUPT_HANDLER(alignment_exception);
  550. DECLARE_INTERRUPT_HANDLER(StackOverflow);
  551. DECLARE_INTERRUPT_HANDLER(stack_overflow_exception);
  552. DECLARE_INTERRUPT_HANDLER(kernel_fp_unavailable_exception);
  553. DECLARE_INTERRUPT_HANDLER(altivec_unavailable_exception);
  554. DECLARE_INTERRUPT_HANDLER(vsx_unavailable_exception);
  555. DECLARE_INTERRUPT_HANDLER(facility_unavailable_exception);
  556. DECLARE_INTERRUPT_HANDLER(fp_unavailable_tm);
  557. DECLARE_INTERRUPT_HANDLER(altivec_unavailable_tm);
  558. DECLARE_INTERRUPT_HANDLER(vsx_unavailable_tm);
  559. DECLARE_INTERRUPT_HANDLER_NMI(performance_monitor_exception_nmi);
  560. DECLARE_INTERRUPT_HANDLER_ASYNC(performance_monitor_exception_async);
  561. DECLARE_INTERRUPT_HANDLER_RAW(performance_monitor_exception);
  562. DECLARE_INTERRUPT_HANDLER(DebugException);
  563. DECLARE_INTERRUPT_HANDLER(altivec_assist_exception);
  564. DECLARE_INTERRUPT_HANDLER(CacheLockingException);
  565. DECLARE_INTERRUPT_HANDLER(SPEFloatingPointException);
  566. DECLARE_INTERRUPT_HANDLER(SPEFloatingPointRoundException);
  567. DECLARE_INTERRUPT_HANDLER_NMI(WatchdogException);
  568. DECLARE_INTERRUPT_HANDLER(kernel_bad_stack);
  569. /* slb.c */
  570. DECLARE_INTERRUPT_HANDLER_RAW(do_slb_fault);
  571. DECLARE_INTERRUPT_HANDLER(do_bad_segment_interrupt);
  572. /* hash_utils.c */
  573. DECLARE_INTERRUPT_HANDLER(do_hash_fault);
  574. /* fault.c */
  575. DECLARE_INTERRUPT_HANDLER(do_page_fault);
  576. DECLARE_INTERRUPT_HANDLER(do_bad_page_fault_segv);
  577. /* process.c */
  578. DECLARE_INTERRUPT_HANDLER(do_break);
  579. /* time.c */
  580. DECLARE_INTERRUPT_HANDLER_ASYNC(timer_interrupt);
  581. /* mce.c */
  582. DECLARE_INTERRUPT_HANDLER_NMI(machine_check_early);
  583. DECLARE_INTERRUPT_HANDLER_NMI(hmi_exception_realmode);
  584. DECLARE_INTERRUPT_HANDLER_ASYNC(TAUException);
  585. /* irq.c */
  586. DECLARE_INTERRUPT_HANDLER_ASYNC(do_IRQ);
  587. void __noreturn unrecoverable_exception(struct pt_regs *regs);
  588. void replay_system_reset(void);
  589. void replay_soft_interrupts(void);
  590. static inline void interrupt_cond_local_irq_enable(struct pt_regs *regs)
  591. {
  592. if (!arch_irq_disabled_regs(regs))
  593. local_irq_enable();
  594. }
  595. long system_call_exception(struct pt_regs *regs, unsigned long r0);
  596. notrace unsigned long syscall_exit_prepare(unsigned long r3, struct pt_regs *regs, long scv);
  597. notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs);
  598. notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs);
  599. #ifdef CONFIG_PPC64
  600. unsigned long syscall_exit_restart(unsigned long r3, struct pt_regs *regs);
  601. unsigned long interrupt_exit_user_restart(struct pt_regs *regs);
  602. unsigned long interrupt_exit_kernel_restart(struct pt_regs *regs);
  603. #endif
  604. #endif /* __ASSEMBLY__ */
  605. #endif /* _ASM_POWERPC_INTERRUPT_H */