ps3.dts 1.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * PS3 Game Console device tree.
  4. *
  5. * Copyright (C) 2007 Sony Computer Entertainment Inc.
  6. * Copyright 2007 Sony Corp.
  7. */
  8. /dts-v1/;
  9. / {
  10. model = "SonyPS3";
  11. compatible = "sony,ps3";
  12. #size-cells = <2>;
  13. #address-cells = <2>;
  14. chosen {
  15. };
  16. /*
  17. * We'll get the size of the bootmem block from lv1 after startup,
  18. * so we'll put a null entry here.
  19. */
  20. memory {
  21. device_type = "memory";
  22. reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
  23. };
  24. /*
  25. * The boot cpu is always zero for PS3.
  26. *
  27. * dtc expects a clock-frequency and timebase-frequency entries, so
  28. * we'll put a null entries here. These will be initialized after
  29. * startup with data from lv1.
  30. *
  31. * Seems the only way currently to indicate a processor has multiple
  32. * threads is with an ibm,ppc-interrupt-server#s entry. We'll put one
  33. * here so we can bring up both of ours. See smp_setup_cpu_maps().
  34. */
  35. cpus {
  36. #size-cells = <0>;
  37. #address-cells = <1>;
  38. cpu@0 {
  39. device_type = "cpu";
  40. reg = <0x00000000>;
  41. ibm,ppc-interrupt-server#s = <0x0 0x1>;
  42. clock-frequency = <0>;
  43. timebase-frequency = <0>;
  44. i-cache-size = <32768>;
  45. d-cache-size = <32768>;
  46. i-cache-line-size = <128>;
  47. d-cache-line-size = <128>;
  48. };
  49. };
  50. };