mpc7448hpc2.dts 4.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * MPC7448HPC2 (Taiga) board Device Tree Source
  4. *
  5. * Copyright 2006, 2008 Freescale Semiconductor Inc.
  6. * 2006 Roy Zang <Roy Zang at freescale.com>.
  7. */
  8. /dts-v1/;
  9. / {
  10. model = "mpc7448hpc2";
  11. compatible = "mpc74xx";
  12. #address-cells = <1>;
  13. #size-cells = <1>;
  14. aliases {
  15. ethernet0 = &enet0;
  16. ethernet1 = &enet1;
  17. serial0 = &serial0;
  18. serial1 = &serial1;
  19. pci0 = &pci0;
  20. };
  21. cpus {
  22. #address-cells = <1>;
  23. #size-cells =<0>;
  24. PowerPC,7448@0 {
  25. device_type = "cpu";
  26. reg = <0x0>;
  27. d-cache-line-size = <32>; // 32 bytes
  28. i-cache-line-size = <32>; // 32 bytes
  29. d-cache-size = <0x8000>; // L1, 32K bytes
  30. i-cache-size = <0x8000>; // L1, 32K bytes
  31. timebase-frequency = <0>; // 33 MHz, from uboot
  32. clock-frequency = <0>; // From U-Boot
  33. bus-frequency = <0>; // From U-Boot
  34. };
  35. };
  36. memory {
  37. device_type = "memory";
  38. reg = <0x0 0x20000000 // DDR2 512M at 0
  39. >;
  40. };
  41. tsi108@c0000000 {
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. device_type = "tsi-bridge";
  45. ranges = <0x0 0xc0000000 0x10000>;
  46. reg = <0xc0000000 0x10000>;
  47. bus-frequency = <0>;
  48. i2c@7000 {
  49. interrupt-parent = <&mpic>;
  50. interrupts = <14 0>;
  51. reg = <0x7000 0x400>;
  52. device_type = "i2c";
  53. compatible = "tsi108-i2c";
  54. };
  55. MDIO: mdio@6000 {
  56. compatible = "tsi108-mdio";
  57. reg = <0x6000 0x50>;
  58. #address-cells = <1>;
  59. #size-cells = <0>;
  60. phy8: ethernet-phy@8 {
  61. interrupt-parent = <&mpic>;
  62. interrupts = <2 1>;
  63. reg = <0x8>;
  64. };
  65. phy9: ethernet-phy@9 {
  66. interrupt-parent = <&mpic>;
  67. interrupts = <2 1>;
  68. reg = <0x9>;
  69. };
  70. };
  71. enet0: ethernet@6200 {
  72. linux,network-index = <0>;
  73. #size-cells = <0>;
  74. device_type = "network";
  75. compatible = "tsi108-ethernet";
  76. reg = <0x6000 0x200>;
  77. address = [ 00 06 D2 00 00 01 ];
  78. interrupts = <16 2>;
  79. interrupt-parent = <&mpic>;
  80. mdio-handle = <&MDIO>;
  81. phy-handle = <&phy8>;
  82. };
  83. enet1: ethernet@6600 {
  84. linux,network-index = <1>;
  85. #address-cells = <1>;
  86. #size-cells = <0>;
  87. device_type = "network";
  88. compatible = "tsi108-ethernet";
  89. reg = <0x6400 0x200>;
  90. address = [ 00 06 D2 00 00 02 ];
  91. interrupts = <17 2>;
  92. interrupt-parent = <&mpic>;
  93. mdio-handle = <&MDIO>;
  94. phy-handle = <&phy9>;
  95. };
  96. serial0: serial@7808 {
  97. device_type = "serial";
  98. compatible = "ns16550";
  99. reg = <0x7808 0x200>;
  100. clock-frequency = <1064000000>;
  101. interrupts = <12 0>;
  102. interrupt-parent = <&mpic>;
  103. };
  104. serial1: serial@7c08 {
  105. device_type = "serial";
  106. compatible = "ns16550";
  107. reg = <0x7c08 0x200>;
  108. clock-frequency = <1064000000>;
  109. interrupts = <13 0>;
  110. interrupt-parent = <&mpic>;
  111. };
  112. mpic: pic@7400 {
  113. interrupt-controller;
  114. #address-cells = <0>;
  115. #interrupt-cells = <2>;
  116. reg = <0x7400 0x400>;
  117. compatible = "chrp,open-pic";
  118. device_type = "open-pic";
  119. };
  120. pci0: pci@1000 {
  121. compatible = "tsi108-pci";
  122. device_type = "pci";
  123. #interrupt-cells = <1>;
  124. #size-cells = <2>;
  125. #address-cells = <3>;
  126. reg = <0x1000 0x1000>;
  127. bus-range = <0 0>;
  128. ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000
  129. 0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>;
  130. clock-frequency = <133333332>;
  131. interrupt-parent = <&mpic>;
  132. interrupts = <23 2>;
  133. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  134. interrupt-map = <
  135. /* IDSEL 0x11 */
  136. 0x800 0x0 0x0 0x1 &RT0 0x24 0x0
  137. 0x800 0x0 0x0 0x2 &RT0 0x25 0x0
  138. 0x800 0x0 0x0 0x3 &RT0 0x26 0x0
  139. 0x800 0x0 0x0 0x4 &RT0 0x27 0x0
  140. /* IDSEL 0x12 */
  141. 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
  142. 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
  143. 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
  144. 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
  145. /* IDSEL 0x13 */
  146. 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
  147. 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
  148. 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
  149. 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
  150. /* IDSEL 0x14 */
  151. 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
  152. 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
  153. 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
  154. 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
  155. >;
  156. RT0: router@1180 {
  157. clock-frequency = <0>;
  158. interrupt-controller;
  159. device_type = "pic-router";
  160. #address-cells = <0>;
  161. #interrupt-cells = <2>;
  162. big-endian;
  163. interrupts = <23 2>;
  164. interrupt-parent = <&mpic>;
  165. };
  166. };
  167. };
  168. };