microwatt.dts 3.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152
  1. /dts-v1/;
  2. / {
  3. #size-cells = <0x02>;
  4. #address-cells = <0x02>;
  5. model-name = "microwatt";
  6. compatible = "microwatt-soc";
  7. aliases {
  8. serial0 = &UART0;
  9. };
  10. reserved-memory {
  11. #size-cells = <0x02>;
  12. #address-cells = <0x02>;
  13. ranges;
  14. };
  15. memory@0 {
  16. device_type = "memory";
  17. reg = <0x00000000 0x00000000 0x00000000 0x10000000>;
  18. };
  19. cpus {
  20. #size-cells = <0x00>;
  21. #address-cells = <0x01>;
  22. ibm,powerpc-cpu-features {
  23. display-name = "Microwatt";
  24. isa = <3000>;
  25. device_type = "cpu-features";
  26. compatible = "ibm,powerpc-cpu-features";
  27. mmu-radix {
  28. isa = <3000>;
  29. usable-privilege = <2>;
  30. };
  31. little-endian {
  32. isa = <2050>;
  33. usable-privilege = <3>;
  34. hwcap-bit-nr = <1>;
  35. };
  36. cache-inhibited-large-page {
  37. isa = <2040>;
  38. usable-privilege = <2>;
  39. };
  40. fixed-point-v3 {
  41. isa = <3000>;
  42. usable-privilege = <3>;
  43. };
  44. no-execute {
  45. isa = <2010>;
  46. usable-privilege = <2>;
  47. };
  48. floating-point {
  49. hwcap-bit-nr = <27>;
  50. isa = <0>;
  51. usable-privilege = <3>;
  52. };
  53. };
  54. PowerPC,Microwatt@0 {
  55. i-cache-sets = <2>;
  56. ibm,dec-bits = <64>;
  57. reservation-granule-size = <64>;
  58. clock-frequency = <100000000>;
  59. timebase-frequency = <100000000>;
  60. i-tlb-sets = <1>;
  61. ibm,ppc-interrupt-server#s = <0>;
  62. i-cache-block-size = <64>;
  63. d-cache-block-size = <64>;
  64. d-cache-sets = <2>;
  65. i-tlb-size = <64>;
  66. cpu-version = <0x990000>;
  67. status = "okay";
  68. i-cache-size = <0x1000>;
  69. ibm,processor-radix-AP-encodings = <0x0c 0xa0000010 0x20000015 0x4000001e>;
  70. tlb-size = <0>;
  71. tlb-sets = <0>;
  72. device_type = "cpu";
  73. d-tlb-size = <128>;
  74. d-tlb-sets = <2>;
  75. reg = <0>;
  76. general-purpose;
  77. 64-bit;
  78. d-cache-size = <0x1000>;
  79. ibm,chip-id = <0>;
  80. ibm,mmu-lpid-bits = <12>;
  81. ibm,mmu-pid-bits = <20>;
  82. };
  83. };
  84. soc@c0000000 {
  85. compatible = "simple-bus";
  86. #address-cells = <1>;
  87. #size-cells = <1>;
  88. interrupt-parent = <&ICS>;
  89. ranges = <0 0 0xc0000000 0x40000000>;
  90. interrupt-controller@4000 {
  91. compatible = "openpower,xics-presentation", "ibm,ppc-xicp";
  92. ibm,interrupt-server-ranges = <0x0 0x1>;
  93. reg = <0x4000 0x100>;
  94. };
  95. ICS: interrupt-controller@5000 {
  96. compatible = "openpower,xics-sources";
  97. interrupt-controller;
  98. interrupt-ranges = <0x10 0x10>;
  99. reg = <0x5000 0x100>;
  100. #address-cells = <0>;
  101. #size-cells = <0>;
  102. #interrupt-cells = <2>;
  103. };
  104. UART0: serial@2000 {
  105. device_type = "serial";
  106. compatible = "ns16550";
  107. reg = <0x2000 0x8>;
  108. clock-frequency = <100000000>;
  109. current-speed = <115200>;
  110. reg-shift = <2>;
  111. fifo-size = <16>;
  112. interrupts = <0x10 0x1>;
  113. };
  114. ethernet@8020000 {
  115. compatible = "litex,liteeth";
  116. reg = <0x8021000 0x100
  117. 0x8020800 0x100
  118. 0x8030000 0x2000>;
  119. reg-names = "mac", "mido", "buffer";
  120. litex,rx-slots = <2>;
  121. litex,tx-slots = <2>;
  122. litex,slot-size = <0x800>;
  123. interrupts = <0x11 0x1>;
  124. };
  125. };
  126. chosen {
  127. bootargs = "";
  128. ibm,architecture-vec-5 = [19 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00
  129. 00 00 00 00 00 00 00 00 40 00 40];
  130. stdout-path = &UART0;
  131. };
  132. };