lite5200b.dts 3.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Lite5200B board Device Tree Source
  4. *
  5. * Copyright 2006-2007 Secret Lab Technologies Ltd.
  6. * Grant Likely <[email protected]>
  7. */
  8. /include/ "mpc5200b.dtsi"
  9. &gpt0 { fsl,has-wdt; };
  10. &gpt2 { gpio-controller; };
  11. &gpt3 { gpio-controller; };
  12. / {
  13. model = "fsl,lite5200b";
  14. compatible = "fsl,lite5200b";
  15. leds {
  16. compatible = "gpio-leds";
  17. tmr2 {
  18. gpios = <&gpt2 0 1>;
  19. };
  20. tmr3 {
  21. gpios = <&gpt3 0 1>;
  22. linux,default-trigger = "heartbeat";
  23. };
  24. led1 { gpios = <&gpio_wkup 2 1>; };
  25. led2 { gpios = <&gpio_simple 3 1>; };
  26. led3 { gpios = <&gpio_wkup 3 1>; };
  27. led4 { gpios = <&gpio_simple 2 1>; };
  28. };
  29. memory@0 {
  30. reg = <0x00000000 0x10000000>; // 256MB
  31. };
  32. soc5200@f0000000 {
  33. psc@2000 { // PSC1
  34. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  35. cell-index = <0>;
  36. };
  37. psc@2200 { // PSC2
  38. status = "disabled";
  39. };
  40. psc@2400 { // PSC3
  41. status = "disabled";
  42. };
  43. psc@2600 { // PSC4
  44. status = "disabled";
  45. };
  46. psc@2800 { // PSC5
  47. status = "disabled";
  48. };
  49. psc@2c00 { // PSC6
  50. status = "disabled";
  51. };
  52. // PSC2 in ac97 mode example
  53. //ac97@2200 { // PSC2
  54. // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
  55. // cell-index = <1>;
  56. //};
  57. // PSC3 in CODEC mode example
  58. //i2s@2400 { // PSC3
  59. // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
  60. // cell-index = <2>;
  61. //};
  62. // PSC6 in spi mode example
  63. //spi@2c00 { // PSC6
  64. // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
  65. // cell-index = <5>;
  66. //};
  67. ethernet@3000 {
  68. phy-handle = <&phy0>;
  69. };
  70. mdio@3000 {
  71. phy0: ethernet-phy@0 {
  72. reg = <0>;
  73. };
  74. };
  75. i2c@3d40 {
  76. eeprom@50 {
  77. compatible = "atmel,24c02";
  78. reg = <0x50>;
  79. };
  80. };
  81. sram@8000 {
  82. compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
  83. reg = <0x8000 0x4000>;
  84. };
  85. };
  86. pci@f0000d00 {
  87. interrupt-map-mask = <0xf800 0 0 7>;
  88. interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
  89. 0xc000 0 0 2 &mpc5200_pic 1 1 3
  90. 0xc000 0 0 3 &mpc5200_pic 1 2 3
  91. 0xc000 0 0 4 &mpc5200_pic 1 3 3
  92. 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
  93. 0xc800 0 0 2 &mpc5200_pic 1 2 3
  94. 0xc800 0 0 3 &mpc5200_pic 1 3 3
  95. 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
  96. clock-frequency = <0>; // From boot loader
  97. interrupts = <2 8 0 2 9 0 2 10 0>;
  98. bus-range = <0 0>;
  99. ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000>,
  100. <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000>,
  101. <0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
  102. };
  103. localbus {
  104. ranges = <0 0 0xfe000000 0x02000000>;
  105. flash@0,0 {
  106. compatible = "cfi-flash";
  107. reg = <0 0 0x02000000>;
  108. bank-width = <1>;
  109. #size-cells = <1>;
  110. #address-cells = <1>;
  111. partition@0 {
  112. label = "kernel";
  113. reg = <0x00000000 0x00200000>;
  114. };
  115. partition@200000 {
  116. label = "rootfs";
  117. reg = <0x00200000 0x01d00000>;
  118. };
  119. partition@1f00000 {
  120. label = "u-boot";
  121. reg = <0x01f00000 0x00060000>;
  122. };
  123. partition@1f60000 {
  124. label = "u-boot-env";
  125. reg = <0x01f60000 0x00020000>;
  126. };
  127. partition@1f80000 {
  128. label = "dtb";
  129. reg = <0x01f80000 0x00080000>;
  130. };
  131. };
  132. };
  133. };