a3m071.dts 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * a3m071 board Device Tree Source
  4. *
  5. * Copyright 2012 Stefan Roese <[email protected]>
  6. *
  7. * Copyright (C) 2011 DENX Software Engineering GmbH
  8. * Heiko Schocher <[email protected]>
  9. *
  10. * Copyright (C) 2007 Semihalf
  11. * Marian Balakowicz <[email protected]>
  12. */
  13. /include/ "mpc5200b.dtsi"
  14. &gpt0 { fsl,has-wdt; };
  15. / {
  16. model = "anonymous,a3m071";
  17. compatible = "anonymous,a3m071";
  18. soc5200@f0000000 {
  19. #address-cells = <1>;
  20. #size-cells = <1>;
  21. compatible = "fsl,mpc5200b-immr";
  22. ranges = <0 0xf0000000 0x0000c000>;
  23. reg = <0xf0000000 0x00000100>;
  24. bus-frequency = <0>; /* From boot loader */
  25. system-frequency = <0>; /* From boot loader */
  26. spi@f00 {
  27. status = "disabled";
  28. };
  29. usb: usb@1000 {
  30. status = "disabled";
  31. };
  32. psc@2000 {
  33. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  34. reg = <0x2000 0x100>;
  35. interrupts = <2 1 0>;
  36. };
  37. psc@2200 {
  38. status = "disabled";
  39. };
  40. psc@2400 {
  41. status = "disabled";
  42. };
  43. psc@2600 {
  44. status = "disabled";
  45. };
  46. psc@2800 {
  47. status = "disabled";
  48. };
  49. psc@2c00 { // PSC6
  50. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  51. reg = <0x2c00 0x100>;
  52. interrupts = <2 4 0>;
  53. };
  54. ethernet@3000 {
  55. phy-handle = <&phy0>;
  56. };
  57. mdio@3000 {
  58. phy0: ethernet-phy@3 {
  59. reg = <0x03>;
  60. };
  61. };
  62. ata@3a00 {
  63. status = "disabled";
  64. };
  65. i2c@3d00 {
  66. status = "disabled";
  67. };
  68. i2c@3d40 {
  69. status = "disabled";
  70. };
  71. };
  72. localbus {
  73. compatible = "fsl,mpc5200b-lpb","simple-bus";
  74. #address-cells = <2>;
  75. #size-cells = <1>;
  76. ranges = <0 0 0xfc000000 0x02000000
  77. 3 0 0xe9000000 0x00080000
  78. 5 0 0xe8000000 0x00010000>;
  79. flash@0,0 {
  80. #address-cells = <1>;
  81. #size-cells = <1>;
  82. reg = <0 0x0 0x02000000>;
  83. compatible = "cfi-flash";
  84. bank-width = <2>;
  85. partition@0 {
  86. label = "u-boot";
  87. reg = <0x00000000 0x00040000>;
  88. read-only;
  89. };
  90. partition@40000 {
  91. label = "env";
  92. reg = <0x00040000 0x00020000>;
  93. };
  94. partition@60000 {
  95. label = "dtb";
  96. reg = <0x00060000 0x00020000>;
  97. };
  98. partition@80000 {
  99. label = "kernel";
  100. reg = <0x00080000 0x00500000>;
  101. };
  102. partition@580000 {
  103. label = "root";
  104. reg = <0x00580000 0x00A80000>;
  105. };
  106. };
  107. fpga@3,0 {
  108. compatible = "anonymous,a3m071-fpga";
  109. reg = <3 0x0 0x00080000
  110. 5 0x0 0x00010000>;
  111. interrupts = <0 0 3>; /* level low */
  112. };
  113. };
  114. pci@f0000d00 {
  115. status = "disabled";
  116. };
  117. };