irq.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Code to handle x86 style IRQs plus some generic interrupt stuff.
  4. *
  5. * Copyright (C) 1992 Linus Torvalds
  6. * Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle
  7. * Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, [email protected])
  8. * Copyright (C) 1999-2000 Grant Grundler
  9. * Copyright (c) 2005 Matthew Wilcox
  10. */
  11. #include <linux/bitops.h>
  12. #include <linux/errno.h>
  13. #include <linux/init.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/kernel_stat.h>
  16. #include <linux/seq_file.h>
  17. #include <linux/types.h>
  18. #include <linux/sched/task_stack.h>
  19. #include <asm/io.h>
  20. #include <asm/softirq_stack.h>
  21. #include <asm/smp.h>
  22. #include <asm/ldcw.h>
  23. #undef PARISC_IRQ_CR16_COUNTS
  24. extern irqreturn_t timer_interrupt(int, void *);
  25. extern irqreturn_t ipi_interrupt(int, void *);
  26. #define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq))
  27. /* Bits in EIEM correlate with cpu_irq_action[].
  28. ** Numbered *Big Endian*! (ie bit 0 is MSB)
  29. */
  30. static volatile unsigned long cpu_eiem = 0;
  31. /*
  32. ** local ACK bitmap ... habitually set to 1, but reset to zero
  33. ** between ->ack() and ->end() of the interrupt to prevent
  34. ** re-interruption of a processing interrupt.
  35. */
  36. static DEFINE_PER_CPU(unsigned long, local_ack_eiem) = ~0UL;
  37. static void cpu_mask_irq(struct irq_data *d)
  38. {
  39. unsigned long eirr_bit = EIEM_MASK(d->irq);
  40. cpu_eiem &= ~eirr_bit;
  41. /* Do nothing on the other CPUs. If they get this interrupt,
  42. * The & cpu_eiem in the do_cpu_irq_mask() ensures they won't
  43. * handle it, and the set_eiem() at the bottom will ensure it
  44. * then gets disabled */
  45. }
  46. static void __cpu_unmask_irq(unsigned int irq)
  47. {
  48. unsigned long eirr_bit = EIEM_MASK(irq);
  49. cpu_eiem |= eirr_bit;
  50. /* This is just a simple NOP IPI. But what it does is cause
  51. * all the other CPUs to do a set_eiem(cpu_eiem) at the end
  52. * of the interrupt handler */
  53. smp_send_all_nop();
  54. }
  55. static void cpu_unmask_irq(struct irq_data *d)
  56. {
  57. __cpu_unmask_irq(d->irq);
  58. }
  59. void cpu_ack_irq(struct irq_data *d)
  60. {
  61. unsigned long mask = EIEM_MASK(d->irq);
  62. int cpu = smp_processor_id();
  63. /* Clear in EIEM so we can no longer process */
  64. per_cpu(local_ack_eiem, cpu) &= ~mask;
  65. /* disable the interrupt */
  66. set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
  67. /* and now ack it */
  68. mtctl(mask, 23);
  69. }
  70. void cpu_eoi_irq(struct irq_data *d)
  71. {
  72. unsigned long mask = EIEM_MASK(d->irq);
  73. int cpu = smp_processor_id();
  74. /* set it in the eiems---it's no longer in process */
  75. per_cpu(local_ack_eiem, cpu) |= mask;
  76. /* enable the interrupt */
  77. set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
  78. }
  79. #ifdef CONFIG_SMP
  80. int cpu_check_affinity(struct irq_data *d, const struct cpumask *dest)
  81. {
  82. int cpu_dest;
  83. /* timer and ipi have to always be received on all CPUs */
  84. if (irqd_is_per_cpu(d))
  85. return -EINVAL;
  86. cpu_dest = cpumask_first_and(dest, cpu_online_mask);
  87. if (cpu_dest >= nr_cpu_ids)
  88. cpu_dest = cpumask_first(cpu_online_mask);
  89. return cpu_dest;
  90. }
  91. #endif
  92. static struct irq_chip cpu_interrupt_type = {
  93. .name = "CPU",
  94. .irq_mask = cpu_mask_irq,
  95. .irq_unmask = cpu_unmask_irq,
  96. .irq_ack = cpu_ack_irq,
  97. .irq_eoi = cpu_eoi_irq,
  98. /* XXX: Needs to be written. We managed without it so far, but
  99. * we really ought to write it.
  100. */
  101. .irq_retrigger = NULL,
  102. };
  103. DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
  104. #define irq_stats(x) (&per_cpu(irq_stat, x))
  105. /*
  106. * /proc/interrupts printing for arch specific interrupts
  107. */
  108. int arch_show_interrupts(struct seq_file *p, int prec)
  109. {
  110. int j;
  111. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  112. seq_printf(p, "%*s: ", prec, "STK");
  113. for_each_online_cpu(j)
  114. seq_printf(p, "%10u ", irq_stats(j)->kernel_stack_usage);
  115. seq_puts(p, " Kernel stack usage\n");
  116. # ifdef CONFIG_IRQSTACKS
  117. seq_printf(p, "%*s: ", prec, "IST");
  118. for_each_online_cpu(j)
  119. seq_printf(p, "%10u ", irq_stats(j)->irq_stack_usage);
  120. seq_puts(p, " Interrupt stack usage\n");
  121. # endif
  122. #endif
  123. #ifdef CONFIG_SMP
  124. if (num_online_cpus() > 1) {
  125. seq_printf(p, "%*s: ", prec, "RES");
  126. for_each_online_cpu(j)
  127. seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
  128. seq_puts(p, " Rescheduling interrupts\n");
  129. seq_printf(p, "%*s: ", prec, "CAL");
  130. for_each_online_cpu(j)
  131. seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
  132. seq_puts(p, " Function call interrupts\n");
  133. }
  134. #endif
  135. seq_printf(p, "%*s: ", prec, "UAH");
  136. for_each_online_cpu(j)
  137. seq_printf(p, "%10u ", irq_stats(j)->irq_unaligned_count);
  138. seq_puts(p, " Unaligned access handler traps\n");
  139. seq_printf(p, "%*s: ", prec, "FPA");
  140. for_each_online_cpu(j)
  141. seq_printf(p, "%10u ", irq_stats(j)->irq_fpassist_count);
  142. seq_puts(p, " Floating point assist traps\n");
  143. seq_printf(p, "%*s: ", prec, "TLB");
  144. for_each_online_cpu(j)
  145. seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
  146. seq_puts(p, " TLB shootdowns\n");
  147. return 0;
  148. }
  149. int show_interrupts(struct seq_file *p, void *v)
  150. {
  151. int i = *(loff_t *) v, j;
  152. unsigned long flags;
  153. if (i == 0) {
  154. seq_puts(p, " ");
  155. for_each_online_cpu(j)
  156. seq_printf(p, " CPU%d", j);
  157. #ifdef PARISC_IRQ_CR16_COUNTS
  158. seq_printf(p, " [min/avg/max] (CPU cycle counts)");
  159. #endif
  160. seq_putc(p, '\n');
  161. }
  162. if (i < NR_IRQS) {
  163. struct irq_desc *desc = irq_to_desc(i);
  164. struct irqaction *action;
  165. raw_spin_lock_irqsave(&desc->lock, flags);
  166. action = desc->action;
  167. if (!action)
  168. goto skip;
  169. seq_printf(p, "%3d: ", i);
  170. for_each_online_cpu(j)
  171. seq_printf(p, "%10u ", irq_desc_kstat_cpu(desc, j));
  172. seq_printf(p, " %14s", irq_desc_get_chip(desc)->name);
  173. #ifndef PARISC_IRQ_CR16_COUNTS
  174. seq_printf(p, " %s", action->name);
  175. while ((action = action->next))
  176. seq_printf(p, ", %s", action->name);
  177. #else
  178. for ( ;action; action = action->next) {
  179. unsigned int k, avg, min, max;
  180. min = max = action->cr16_hist[0];
  181. for (avg = k = 0; k < PARISC_CR16_HIST_SIZE; k++) {
  182. int hist = action->cr16_hist[k];
  183. if (hist) {
  184. avg += hist;
  185. } else
  186. break;
  187. if (hist > max) max = hist;
  188. if (hist < min) min = hist;
  189. }
  190. avg /= k;
  191. seq_printf(p, " %s[%d/%d/%d]", action->name,
  192. min,avg,max);
  193. }
  194. #endif
  195. seq_putc(p, '\n');
  196. skip:
  197. raw_spin_unlock_irqrestore(&desc->lock, flags);
  198. }
  199. if (i == NR_IRQS)
  200. arch_show_interrupts(p, 3);
  201. return 0;
  202. }
  203. /*
  204. ** The following form a "set": Virtual IRQ, Transaction Address, Trans Data.
  205. ** Respectively, these map to IRQ region+EIRR, Processor HPA, EIRR bit.
  206. **
  207. ** To use txn_XXX() interfaces, get a Virtual IRQ first.
  208. ** Then use that to get the Transaction address and data.
  209. */
  210. int cpu_claim_irq(unsigned int irq, struct irq_chip *type, void *data)
  211. {
  212. if (irq_has_action(irq))
  213. return -EBUSY;
  214. if (irq_get_chip(irq) != &cpu_interrupt_type)
  215. return -EBUSY;
  216. /* for iosapic interrupts */
  217. if (type) {
  218. irq_set_chip_and_handler(irq, type, handle_percpu_irq);
  219. irq_set_chip_data(irq, data);
  220. __cpu_unmask_irq(irq);
  221. }
  222. return 0;
  223. }
  224. int txn_claim_irq(int irq)
  225. {
  226. return cpu_claim_irq(irq, NULL, NULL) ? -1 : irq;
  227. }
  228. /*
  229. * The bits_wide parameter accommodates the limitations of the HW/SW which
  230. * use these bits:
  231. * Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register)
  232. * V-class (EPIC): 6 bits
  233. * N/L/A-class (iosapic): 8 bits
  234. * PCI 2.2 MSI: 16 bits
  235. * Some PCI devices: 32 bits (Symbios SCSI/ATM/HyperFabric)
  236. *
  237. * On the service provider side:
  238. * o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register)
  239. * o PA 2.0 wide mode 6-bits (per processor)
  240. * o IA64 8-bits (0-256 total)
  241. *
  242. * So a Legacy PA I/O device on a PA 2.0 box can't use all the bits supported
  243. * by the processor...and the N/L-class I/O subsystem supports more bits than
  244. * PA2.0 has. The first case is the problem.
  245. */
  246. int txn_alloc_irq(unsigned int bits_wide)
  247. {
  248. int irq;
  249. /* never return irq 0 cause that's the interval timer */
  250. for (irq = CPU_IRQ_BASE + 1; irq <= CPU_IRQ_MAX; irq++) {
  251. if (cpu_claim_irq(irq, NULL, NULL) < 0)
  252. continue;
  253. if ((irq - CPU_IRQ_BASE) >= (1 << bits_wide))
  254. continue;
  255. return irq;
  256. }
  257. /* unlikely, but be prepared */
  258. return -1;
  259. }
  260. unsigned long txn_affinity_addr(unsigned int irq, int cpu)
  261. {
  262. #ifdef CONFIG_SMP
  263. struct irq_data *d = irq_get_irq_data(irq);
  264. irq_data_update_affinity(d, cpumask_of(cpu));
  265. #endif
  266. return per_cpu(cpu_data, cpu).txn_addr;
  267. }
  268. unsigned long txn_alloc_addr(unsigned int virt_irq)
  269. {
  270. static int next_cpu = -1;
  271. next_cpu++; /* assign to "next" CPU we want this bugger on */
  272. /* validate entry */
  273. while ((next_cpu < nr_cpu_ids) &&
  274. (!per_cpu(cpu_data, next_cpu).txn_addr ||
  275. !cpu_online(next_cpu)))
  276. next_cpu++;
  277. if (next_cpu >= nr_cpu_ids)
  278. next_cpu = 0; /* nothing else, assign monarch */
  279. return txn_affinity_addr(virt_irq, next_cpu);
  280. }
  281. unsigned int txn_alloc_data(unsigned int virt_irq)
  282. {
  283. return virt_irq - CPU_IRQ_BASE;
  284. }
  285. static inline int eirr_to_irq(unsigned long eirr)
  286. {
  287. int bit = fls_long(eirr);
  288. return (BITS_PER_LONG - bit) + TIMER_IRQ;
  289. }
  290. #ifdef CONFIG_IRQSTACKS
  291. /*
  292. * IRQ STACK - used for irq handler
  293. */
  294. #ifdef CONFIG_64BIT
  295. #define IRQ_STACK_SIZE (4096 << 4) /* 64k irq stack size */
  296. #else
  297. #define IRQ_STACK_SIZE (4096 << 3) /* 32k irq stack size */
  298. #endif
  299. union irq_stack_union {
  300. unsigned long stack[IRQ_STACK_SIZE/sizeof(unsigned long)];
  301. volatile unsigned int slock[4];
  302. volatile unsigned int lock[1];
  303. };
  304. static DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
  305. .slock = { 1,1,1,1 },
  306. };
  307. #endif
  308. int sysctl_panic_on_stackoverflow = 1;
  309. static inline void stack_overflow_check(struct pt_regs *regs)
  310. {
  311. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  312. #define STACK_MARGIN (256*6)
  313. unsigned long stack_start = (unsigned long) task_stack_page(current);
  314. unsigned long sp = regs->gr[30];
  315. unsigned long stack_usage;
  316. unsigned int *last_usage;
  317. int cpu = smp_processor_id();
  318. /* if sr7 != 0, we interrupted a userspace process which we do not want
  319. * to check for stack overflow. We will only check the kernel stack. */
  320. if (regs->sr[7])
  321. return;
  322. /* exit if already in panic */
  323. if (sysctl_panic_on_stackoverflow < 0)
  324. return;
  325. /* calculate kernel stack usage */
  326. stack_usage = sp - stack_start;
  327. #ifdef CONFIG_IRQSTACKS
  328. if (likely(stack_usage <= THREAD_SIZE))
  329. goto check_kernel_stack; /* found kernel stack */
  330. /* check irq stack usage */
  331. stack_start = (unsigned long) &per_cpu(irq_stack_union, cpu).stack;
  332. stack_usage = sp - stack_start;
  333. last_usage = &per_cpu(irq_stat.irq_stack_usage, cpu);
  334. if (unlikely(stack_usage > *last_usage))
  335. *last_usage = stack_usage;
  336. if (likely(stack_usage < (IRQ_STACK_SIZE - STACK_MARGIN)))
  337. return;
  338. pr_emerg("stackcheck: %s will most likely overflow irq stack "
  339. "(sp:%lx, stk bottom-top:%lx-%lx)\n",
  340. current->comm, sp, stack_start, stack_start + IRQ_STACK_SIZE);
  341. goto panic_check;
  342. check_kernel_stack:
  343. #endif
  344. /* check kernel stack usage */
  345. last_usage = &per_cpu(irq_stat.kernel_stack_usage, cpu);
  346. if (unlikely(stack_usage > *last_usage))
  347. *last_usage = stack_usage;
  348. if (likely(stack_usage < (THREAD_SIZE - STACK_MARGIN)))
  349. return;
  350. pr_emerg("stackcheck: %s will most likely overflow kernel stack "
  351. "(sp:%lx, stk bottom-top:%lx-%lx)\n",
  352. current->comm, sp, stack_start, stack_start + THREAD_SIZE);
  353. #ifdef CONFIG_IRQSTACKS
  354. panic_check:
  355. #endif
  356. if (sysctl_panic_on_stackoverflow) {
  357. sysctl_panic_on_stackoverflow = -1; /* disable further checks */
  358. panic("low stack detected by irq handler - check messages\n");
  359. }
  360. #endif
  361. }
  362. #ifdef CONFIG_IRQSTACKS
  363. /* in entry.S: */
  364. void call_on_stack(unsigned long p1, void *func, unsigned long new_stack);
  365. static void execute_on_irq_stack(void *func, unsigned long param1)
  366. {
  367. union irq_stack_union *union_ptr;
  368. unsigned long irq_stack;
  369. volatile unsigned int *irq_stack_in_use;
  370. union_ptr = &per_cpu(irq_stack_union, smp_processor_id());
  371. irq_stack = (unsigned long) &union_ptr->stack;
  372. irq_stack = ALIGN(irq_stack + sizeof(irq_stack_union.slock),
  373. FRAME_ALIGN); /* align for stack frame usage */
  374. /* We may be called recursive. If we are already using the irq stack,
  375. * just continue to use it. Use spinlocks to serialize
  376. * the irq stack usage.
  377. */
  378. irq_stack_in_use = (volatile unsigned int *)__ldcw_align(union_ptr);
  379. if (!__ldcw(irq_stack_in_use)) {
  380. void (*direct_call)(unsigned long p1) = func;
  381. /* We are using the IRQ stack already.
  382. * Do direct call on current stack. */
  383. direct_call(param1);
  384. return;
  385. }
  386. /* This is where we switch to the IRQ stack. */
  387. call_on_stack(param1, func, irq_stack);
  388. /* free up irq stack usage. */
  389. *irq_stack_in_use = 1;
  390. }
  391. #ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
  392. void do_softirq_own_stack(void)
  393. {
  394. execute_on_irq_stack(__do_softirq, 0);
  395. }
  396. #endif
  397. #endif /* CONFIG_IRQSTACKS */
  398. /* ONLY called from entry.S:intr_extint() */
  399. void do_cpu_irq_mask(struct pt_regs *regs)
  400. {
  401. struct pt_regs *old_regs;
  402. unsigned long eirr_val;
  403. int irq, cpu = smp_processor_id();
  404. struct irq_data *irq_data;
  405. #ifdef CONFIG_SMP
  406. cpumask_t dest;
  407. #endif
  408. old_regs = set_irq_regs(regs);
  409. local_irq_disable();
  410. irq_enter();
  411. eirr_val = mfctl(23) & cpu_eiem & per_cpu(local_ack_eiem, cpu);
  412. if (!eirr_val)
  413. goto set_out;
  414. irq = eirr_to_irq(eirr_val);
  415. irq_data = irq_get_irq_data(irq);
  416. /* Filter out spurious interrupts, mostly from serial port at bootup */
  417. if (unlikely(!irq_desc_has_action(irq_data_to_desc(irq_data))))
  418. goto set_out;
  419. #ifdef CONFIG_SMP
  420. cpumask_copy(&dest, irq_data_get_affinity_mask(irq_data));
  421. if (irqd_is_per_cpu(irq_data) &&
  422. !cpumask_test_cpu(smp_processor_id(), &dest)) {
  423. int cpu = cpumask_first(&dest);
  424. printk(KERN_DEBUG "redirecting irq %d from CPU %d to %d\n",
  425. irq, smp_processor_id(), cpu);
  426. gsc_writel(irq + CPU_IRQ_BASE,
  427. per_cpu(cpu_data, cpu).hpa);
  428. goto set_out;
  429. }
  430. #endif
  431. stack_overflow_check(regs);
  432. #ifdef CONFIG_IRQSTACKS
  433. execute_on_irq_stack(&generic_handle_irq, irq);
  434. #else
  435. generic_handle_irq(irq);
  436. #endif /* CONFIG_IRQSTACKS */
  437. out:
  438. irq_exit();
  439. set_irq_regs(old_regs);
  440. return;
  441. set_out:
  442. set_eiem(cpu_eiem & per_cpu(local_ack_eiem, cpu));
  443. goto out;
  444. }
  445. static void claim_cpu_irqs(void)
  446. {
  447. unsigned long flags = IRQF_TIMER | IRQF_PERCPU | IRQF_IRQPOLL;
  448. int i;
  449. for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
  450. irq_set_chip_and_handler(i, &cpu_interrupt_type,
  451. handle_percpu_irq);
  452. }
  453. irq_set_handler(TIMER_IRQ, handle_percpu_irq);
  454. if (request_irq(TIMER_IRQ, timer_interrupt, flags, "timer", NULL))
  455. pr_err("Failed to register timer interrupt\n");
  456. #ifdef CONFIG_SMP
  457. irq_set_handler(IPI_IRQ, handle_percpu_irq);
  458. if (request_irq(IPI_IRQ, ipi_interrupt, IRQF_PERCPU, "IPI", NULL))
  459. pr_err("Failed to register IPI interrupt\n");
  460. #endif
  461. }
  462. void init_IRQ(void)
  463. {
  464. local_irq_disable(); /* PARANOID - should already be disabled */
  465. mtctl(~0UL, 23); /* EIRR : clear all pending external intr */
  466. #ifdef CONFIG_SMP
  467. if (!cpu_eiem) {
  468. claim_cpu_irqs();
  469. cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ);
  470. }
  471. #else
  472. claim_cpu_irqs();
  473. cpu_eiem = EIEM_MASK(TIMER_IRQ);
  474. #endif
  475. set_eiem(cpu_eiem); /* EIEM : enable all external intr */
  476. }