hpmc.S 7.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later */
  2. /*
  3. * HPMC (High Priority Machine Check) handler.
  4. *
  5. * Copyright (C) 1999 Philipp Rumpf <[email protected]>
  6. * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
  7. * Copyright (C) 2000 Hewlett-Packard (John Marvin)
  8. */
  9. /*
  10. * This HPMC handler retrieves the HPMC pim data, resets IO and
  11. * returns to the default trap handler with code set to 1 (HPMC).
  12. * The default trap handler calls handle interruption, which
  13. * does a stack and register dump. This at least allows kernel
  14. * developers to get back to C code in virtual mode, where they
  15. * have the option to examine and print values from memory that
  16. * would help in debugging an HPMC caused by a software bug.
  17. *
  18. * There is more to do here:
  19. *
  20. * 1) On MP systems we need to synchronize processors
  21. * before calling pdc/iodc.
  22. * 2) We should be checking the system state and not
  23. * returning to the fault handler if things are really
  24. * bad.
  25. *
  26. */
  27. .level 1.1
  28. #include <asm/assembly.h>
  29. #include <asm/pdc.h>
  30. #include <asm/psw.h>
  31. #include <linux/linkage.h>
  32. #include <linux/init.h>
  33. /*
  34. * stack for os_hpmc, the HPMC handler.
  35. * buffer for IODC procedures (for the HPMC handler).
  36. *
  37. * IODC requires 7K byte stack. That leaves 1K byte for os_hpmc.
  38. */
  39. .import toc_stack,data
  40. #define hpmc_stack toc_stack /* re-use the TOC stack */
  41. #define HPMC_IODC_BUF_SIZE 0x8000
  42. __PAGE_ALIGNED_BSS
  43. .align 4096
  44. hpmc_iodc_buf:
  45. .block HPMC_IODC_BUF_SIZE
  46. .section .bss
  47. .align 8
  48. hpmc_raddr:
  49. .block 128
  50. #define HPMC_PIM_DATA_SIZE 896 /* Enough to hold all architected 2.0 state */
  51. .section .bss
  52. .align 8
  53. ENTRY(hpmc_pim_data)
  54. .block HPMC_PIM_DATA_SIZE
  55. END(hpmc_pim_data)
  56. .text
  57. .import intr_save, code
  58. .align 16
  59. ENTRY(os_hpmc)
  60. .os_hpmc:
  61. /*
  62. * registers modified:
  63. *
  64. * Using callee saves registers without saving them. The
  65. * original values are in the pim dump if we need them.
  66. *
  67. * r2 (rp) return pointer
  68. * r3 address of PDCE_PROC
  69. * r4 scratch
  70. * r5 scratch
  71. * r23 (arg3) procedure arg
  72. * r24 (arg2) procedure arg
  73. * r25 (arg1) procedure arg
  74. * r26 (arg0) procedure arg
  75. * r30 (sp) stack pointer
  76. *
  77. * registers read:
  78. *
  79. * r26 contains address of PDCE_PROC on entry
  80. * r28 (ret0) return value from procedure
  81. */
  82. copy arg0, %r3 /* save address of PDCE_PROC */
  83. /*
  84. * disable nested HPMCs
  85. *
  86. * Increment os_hpmc checksum to invalidate it.
  87. * Do this before turning the PSW M bit off.
  88. */
  89. mfctl %cr14, %r4
  90. ldw 52(%r4),%r5
  91. addi 1,%r5,%r5
  92. stw %r5,52(%r4)
  93. /* MP_FIXME: synchronize all processors. */
  94. /* Setup stack pointer. */
  95. load32 PA(hpmc_stack),sp
  96. ldo 128(sp),sp /* leave room for arguments */
  97. /*
  98. * Most PDC routines require that the M bit be off.
  99. * So turn on the Q bit and turn off the M bit.
  100. */
  101. ldi PSW_SM_Q,%r4 /* PSW Q on, PSW M off */
  102. mtctl %r4,ipsw
  103. mtctl %r0,pcsq
  104. mtctl %r0,pcsq
  105. load32 PA(os_hpmc_1),%r4
  106. mtctl %r4,pcoq
  107. ldo 4(%r4),%r4
  108. mtctl %r4,pcoq
  109. rfi
  110. nop
  111. os_hpmc_1:
  112. /* Call PDC_PIM to get HPMC pim info */
  113. /*
  114. * Note that on some newer boxes, PDC_PIM must be called
  115. * before PDC_IO if you want IO to be reset. PDC_PIM sets
  116. * a flag that PDC_IO examines.
  117. */
  118. ldo PDC_PIM(%r0), arg0
  119. ldo PDC_PIM_HPMC(%r0),arg1 /* Transfer HPMC data */
  120. load32 PA(hpmc_raddr),arg2
  121. load32 PA(hpmc_pim_data),arg3
  122. load32 HPMC_PIM_DATA_SIZE,%r4
  123. stw %r4,-52(sp)
  124. ldil L%PA(os_hpmc_2), rp
  125. bv (r3) /* call pdce_proc */
  126. ldo R%PA(os_hpmc_2)(rp), rp
  127. os_hpmc_2:
  128. comib,<> 0,ret0, os_hpmc_fail
  129. /* Reset IO by calling the hversion dependent PDC_IO routine */
  130. ldo PDC_IO(%r0),arg0
  131. ldo 0(%r0),arg1 /* log IO errors */
  132. ldo 0(%r0),arg2 /* reserved */
  133. ldo 0(%r0),arg3 /* reserved */
  134. stw %r0,-52(sp) /* reserved */
  135. ldil L%PA(os_hpmc_3),rp
  136. bv (%r3) /* call pdce_proc */
  137. ldo R%PA(os_hpmc_3)(rp),rp
  138. os_hpmc_3:
  139. /* FIXME? Check for errors from PDC_IO (-1 might be OK) */
  140. /*
  141. * Initialize the IODC console device (HPA,SPA, path etc.
  142. * are stored on page 0.
  143. */
  144. /*
  145. * Load IODC into hpmc_iodc_buf by calling PDC_IODC.
  146. * Note that PDC_IODC handles flushing the appropriate
  147. * data and instruction cache lines.
  148. */
  149. ldo PDC_IODC(%r0),arg0
  150. ldo PDC_IODC_READ(%r0),arg1
  151. load32 PA(hpmc_raddr),arg2
  152. ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg3 /* console hpa */
  153. ldo PDC_IODC_RI_INIT(%r0),%r4
  154. stw %r4,-52(sp)
  155. load32 PA(hpmc_iodc_buf),%r4
  156. stw %r4,-56(sp)
  157. load32 HPMC_IODC_BUF_SIZE,%r4
  158. stw %r4,-60(sp)
  159. ldil L%PA(os_hpmc_4),rp
  160. bv (%r3) /* call pdce_proc */
  161. ldo R%PA(os_hpmc_4)(rp),rp
  162. os_hpmc_4:
  163. comib,<> 0,ret0,os_hpmc_fail
  164. /* Call the entry init (just loaded by PDC_IODC) */
  165. ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg0 /* console hpa */
  166. ldo ENTRY_INIT_MOD_DEV(%r0), arg1
  167. ldw BOOT_CONSOLE_SPA_OFFSET(%r0),arg2 /* console spa */
  168. depi 0,31,11,arg2 /* clear bits 21-31 */
  169. ldo BOOT_CONSOLE_PATH_OFFSET(%r0),arg3 /* console path */
  170. load32 PA(hpmc_raddr),%r4
  171. stw %r4, -52(sp)
  172. stw %r0, -56(sp) /* HV */
  173. stw %r0, -60(sp) /* HV */
  174. stw %r0, -64(sp) /* HV */
  175. stw %r0, -68(sp) /* lang, must be zero */
  176. load32 PA(hpmc_iodc_buf),%r5
  177. ldil L%PA(os_hpmc_5),rp
  178. bv (%r5)
  179. ldo R%PA(os_hpmc_5)(rp),rp
  180. os_hpmc_5:
  181. comib,<> 0,ret0,os_hpmc_fail
  182. /* Prepare to call intr_save */
  183. /*
  184. * Load kernel page directory (load into user also, since
  185. * we don't intend to ever return to user land anyway)
  186. */
  187. load32 PA(swapper_pg_dir),%r4
  188. mtctl %r4,%cr24 /* Initialize kernel root pointer */
  189. mtctl %r4,%cr25 /* Initialize user root pointer */
  190. /* Clear sr4-sr7 */
  191. mtsp %r0, %sr4
  192. mtsp %r0, %sr5
  193. mtsp %r0, %sr6
  194. mtsp %r0, %sr7
  195. tovirt_r1 %r30 /* make sp virtual */
  196. rsm PSW_SM_Q,%r0 /* Clear Q bit */
  197. ldi 1,%r8 /* Set trap code to "1" for HPMC */
  198. load32 PA(intr_save),%r1
  199. be 0(%sr7,%r1)
  200. nop
  201. os_hpmc_fail:
  202. /*
  203. * Reset the system
  204. *
  205. * Some systems may lockup from a broadcast reset, so try the
  206. * hversion PDC_BROADCAST_RESET() first.
  207. * MP_FIXME: reset all processors if more than one central bus.
  208. */
  209. /* PDC_BROADCAST_RESET() */
  210. ldo PDC_BROADCAST_RESET(%r0),arg0
  211. ldo 0(%r0),arg1 /* do reset */
  212. ldil L%PA(os_hpmc_6),rp
  213. bv (%r3) /* call pdce_proc */
  214. ldo R%PA(os_hpmc_6)(rp),rp
  215. os_hpmc_6:
  216. /*
  217. * possible return values:
  218. * -1 non-existent procedure
  219. * -2 non-existent option
  220. * -16 unaligned stack
  221. *
  222. * If call returned, do a broadcast reset.
  223. */
  224. ldil L%0xfffc0000,%r4 /* IO_BROADCAST */
  225. ldo 5(%r0),%r5
  226. stw %r5,48(%r4) /* CMD_RESET to IO_COMMAND offset */
  227. b .
  228. nop
  229. .align 16 /* make function length multiple of 16 bytes */