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  1. /* This file is subject to the terms and conditions of the GNU General Public
  2. * License. See the file "COPYING" in the main directory of this archive
  3. * for more details.
  4. *
  5. * Copyright (C) 1999-2007 by Helge Deller <[email protected]>
  6. * Copyright 1999 SuSE GmbH (Philipp Rumpf)
  7. * Copyright 1999 Philipp Rumpf ([email protected])
  8. * Copyright 2000 Hewlett Packard (Paul Bame, [email protected])
  9. * Copyright (C) 2001 Grant Grundler (Hewlett Packard)
  10. * Copyright (C) 2004 Kyle McMartin <[email protected]>
  11. *
  12. * Initial Version 04-23-1999 by Helge Deller <[email protected]>
  13. */
  14. #include <asm/asm-offsets.h>
  15. #include <asm/psw.h>
  16. #include <asm/pdc.h>
  17. #include <asm/assembly.h>
  18. #include <linux/linkage.h>
  19. #include <linux/init.h>
  20. #include <linux/pgtable.h>
  21. .level 1.1
  22. __INITDATA
  23. ENTRY(boot_args)
  24. .word 0 /* arg0 */
  25. .word 0 /* arg1 */
  26. .word 0 /* arg2 */
  27. .word 0 /* arg3 */
  28. END(boot_args)
  29. __HEAD
  30. .align 4
  31. .import init_task,data
  32. .import init_stack,data
  33. .import fault_vector_20,code /* IVA parisc 2.0 32 bit */
  34. #ifndef CONFIG_64BIT
  35. .import fault_vector_11,code /* IVA parisc 1.1 32 bit */
  36. .import $global$ /* forward declaration */
  37. #endif /*!CONFIG_64BIT*/
  38. ENTRY(parisc_kernel_start)
  39. .proc
  40. .callinfo
  41. /* Make sure sr4-sr7 are set to zero for the kernel address space */
  42. mtsp %r0,%sr4
  43. mtsp %r0,%sr5
  44. mtsp %r0,%sr6
  45. mtsp %r0,%sr7
  46. /* Clear BSS (shouldn't the boot loader do this?) */
  47. .import __bss_start,data
  48. .import __bss_stop,data
  49. load32 PA(__bss_start),%r3
  50. load32 PA(__bss_stop),%r4
  51. $bss_loop:
  52. cmpb,<<,n %r3,%r4,$bss_loop
  53. stw,ma %r0,4(%r3)
  54. /* Save away the arguments the boot loader passed in (32 bit args) */
  55. load32 PA(boot_args),%r1
  56. stw,ma %arg0,4(%r1)
  57. stw,ma %arg1,4(%r1)
  58. stw,ma %arg2,4(%r1)
  59. stw,ma %arg3,4(%r1)
  60. #if defined(CONFIG_PA20)
  61. /* check for 64-bit capable CPU as required by current kernel */
  62. ldi 32,%r10
  63. mtctl %r10,%cr11
  64. .level 2.0
  65. mfctl,w %cr11,%r10
  66. .level 1.1
  67. comib,<>,n 0,%r10,$cpu_ok
  68. load32 PA(msg1),%arg0
  69. ldi msg1_end-msg1,%arg1
  70. $iodc_panic:
  71. copy %arg0, %r10
  72. copy %arg1, %r11
  73. load32 PA(init_stack),%sp
  74. #define MEM_CONS 0x3A0
  75. ldw MEM_CONS+32(%r0),%arg0 // HPA
  76. ldi ENTRY_IO_COUT,%arg1
  77. ldw MEM_CONS+36(%r0),%arg2 // SPA
  78. ldw MEM_CONS+8(%r0),%arg3 // layers
  79. load32 PA(__bss_start),%r1
  80. stw %r1,-52(%sp) // arg4
  81. stw %r0,-56(%sp) // arg5
  82. stw %r10,-60(%sp) // arg6 = ptr to text
  83. stw %r11,-64(%sp) // arg7 = len
  84. stw %r0,-68(%sp) // arg8
  85. load32 PA(.iodc_panic_ret), %rp
  86. ldw MEM_CONS+40(%r0),%r1 // ENTRY_IODC
  87. bv,n (%r1)
  88. .iodc_panic_ret:
  89. b . /* wait endless with ... */
  90. or %r10,%r10,%r10 /* qemu idle sleep */
  91. msg1: .ascii "Can't boot kernel which was built for PA8x00 CPUs on this machine.\r\n"
  92. msg1_end:
  93. $cpu_ok:
  94. #endif
  95. .level PA_ASM_LEVEL
  96. /* Initialize startup VM. Just map first 16/32 MB of memory */
  97. load32 PA(swapper_pg_dir),%r4
  98. mtctl %r4,%cr24 /* Initialize kernel root pointer */
  99. mtctl %r4,%cr25 /* Initialize user root pointer */
  100. #if CONFIG_PGTABLE_LEVELS == 3
  101. /* Set pmd in pgd */
  102. load32 PA(pmd0),%r5
  103. shrd %r5,PxD_VALUE_SHIFT,%r3
  104. ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
  105. stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
  106. ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r4
  107. #else
  108. /* 2-level page table, so pmd == pgd */
  109. ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
  110. #endif
  111. /* Fill in pmd with enough pte directories */
  112. load32 PA(pg0),%r1
  113. SHRREG %r1,PxD_VALUE_SHIFT,%r3
  114. ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
  115. ldi ASM_PT_INITIAL,%r1
  116. 1:
  117. stw %r3,0(%r4)
  118. ldo (PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
  119. addib,> -1,%r1,1b
  120. #if CONFIG_PGTABLE_LEVELS == 3
  121. ldo ASM_PMD_ENTRY_SIZE(%r4),%r4
  122. #else
  123. ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
  124. #endif
  125. /* Now initialize the PTEs themselves. We use RWX for
  126. * everything ... it will get remapped correctly later */
  127. ldo 0+_PAGE_KERNEL_RWX(%r0),%r3 /* Hardwired 0 phys addr start */
  128. load32 (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
  129. load32 PA(pg0),%r1
  130. $pgt_fill_loop:
  131. STREGM %r3,ASM_PTE_ENTRY_SIZE(%r1)
  132. ldo (1<<PFN_PTE_SHIFT)(%r3),%r3 /* add one PFN */
  133. addib,> -1,%r11,$pgt_fill_loop
  134. nop
  135. /* Load the return address...er...crash 'n burn */
  136. copy %r0,%r2
  137. /* And the RFI Target address too */
  138. load32 start_parisc,%r11
  139. /* And the initial task pointer */
  140. load32 init_task,%r6
  141. mtctl %r6,%cr30
  142. /* And the stack pointer too */
  143. load32 init_stack,%sp
  144. tophys_r1 %sp
  145. #if defined(CONFIG_64BIT) && defined(CONFIG_FUNCTION_TRACER)
  146. .import _mcount,data
  147. /* initialize mcount FPTR */
  148. /* Get the global data pointer */
  149. loadgp
  150. load32 PA(_mcount), %r10
  151. std %dp,0x18(%r10)
  152. #endif
  153. #ifdef CONFIG_64BIT
  154. /* Get PDCE_PROC for monarch CPU. */
  155. #define MEM_PDC_LO 0x388
  156. #define MEM_PDC_HI 0x35C
  157. ldw MEM_PDC_LO(%r0),%r3
  158. ldw MEM_PDC_HI(%r0),%r10
  159. depd %r10, 31, 32, %r3 /* move to upper word */
  160. #endif
  161. #ifdef CONFIG_SMP
  162. /* Set the smp rendezvous address into page zero.
  163. ** It would be safer to do this in init_smp_config() but
  164. ** it's just way easier to deal with here because
  165. ** of 64-bit function ptrs and the address is local to this file.
  166. */
  167. load32 PA(smp_slave_stext),%r10
  168. stw %r10,0x10(%r0) /* MEM_RENDEZ */
  169. stw %r0,0x28(%r0) /* MEM_RENDEZ_HI - assume addr < 4GB */
  170. /* FALLTHROUGH */
  171. .procend
  172. #ifdef CONFIG_HOTPLUG_CPU
  173. /* common_stext is far away in another section... jump there */
  174. load32 PA(common_stext), %rp
  175. bv,n (%rp)
  176. /* common_stext and smp_slave_stext needs to be in text section */
  177. .text
  178. #endif
  179. /*
  180. ** Code Common to both Monarch and Slave processors.
  181. ** Entry:
  182. **
  183. ** 1.1:
  184. ** %r11 must contain RFI target address.
  185. ** %r25/%r26 args to pass to target function
  186. ** %r2 in case rfi target decides it didn't like something
  187. **
  188. ** 2.0w:
  189. ** %r3 PDCE_PROC address
  190. ** %r11 RFI target address
  191. **
  192. ** Caller must init: SR4-7, %sp, %r10, %cr24/25,
  193. */
  194. common_stext:
  195. .proc
  196. .callinfo
  197. #else
  198. /* Clear PDC entry point - we won't use it */
  199. stw %r0,0x10(%r0) /* MEM_RENDEZ */
  200. stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */
  201. #endif /*CONFIG_SMP*/
  202. #ifdef CONFIG_64BIT
  203. mfctl %cr30,%r6 /* PCX-W2 firmware bug */
  204. tophys_r1 %r6
  205. /* Save the rfi target address */
  206. STREG %r11, TASK_PT_GR11(%r6)
  207. /* Switch to wide mode Superdome doesn't support narrow PDC
  208. ** calls.
  209. */
  210. 1: mfia %rp /* clear upper part of pcoq */
  211. ldo 2f-1b(%rp),%rp
  212. depdi 0,31,32,%rp
  213. bv (%rp)
  214. ssm PSW_SM_W,%r0
  215. /* Set Wide mode as the "Default" (eg for traps)
  216. ** First trap occurs *right* after (or part of) rfi for slave CPUs.
  217. ** Someday, palo might not do this for the Monarch either.
  218. */
  219. 2:
  220. ldo PDC_PSW(%r0),%arg0 /* 21 */
  221. ldo PDC_PSW_SET_DEFAULTS(%r0),%arg1 /* 2 */
  222. ldo PDC_PSW_WIDE_BIT(%r0),%arg2 /* 2 */
  223. load32 PA(stext_pdc_ret), %rp
  224. bv (%r3)
  225. copy %r0,%arg3
  226. stext_pdc_ret:
  227. LDREG TASK_PT_GR11(%r6), %r11
  228. tovirt_r1 %r6
  229. mtctl %r6,%cr30 /* restore task thread info */
  230. #endif
  231. /* PARANOID: clear user scratch/user space SR's */
  232. mtsp %r0,%sr0
  233. mtsp %r0,%sr1
  234. mtsp %r0,%sr2
  235. mtsp %r0,%sr3
  236. /* Initialize Protection Registers */
  237. mtctl %r0,%cr8
  238. mtctl %r0,%cr9
  239. mtctl %r0,%cr12
  240. mtctl %r0,%cr13
  241. /* Initialize the global data pointer */
  242. loadgp
  243. /* Set up our interrupt table. HPMCs might not work after this!
  244. *
  245. * We need to install the correct iva for PA1.1 or PA2.0. The
  246. * following short sequence of instructions can determine this
  247. * (without being illegal on a PA1.1 machine).
  248. */
  249. #ifndef CONFIG_64BIT
  250. ldi 32,%r10
  251. mtctl %r10,%cr11
  252. .level 2.0
  253. mfctl,w %cr11,%r10
  254. .level 1.1
  255. comib,<>,n 0,%r10,$is_pa20
  256. ldil L%PA(fault_vector_11),%r10
  257. b $install_iva
  258. ldo R%PA(fault_vector_11)(%r10),%r10
  259. $is_pa20:
  260. .level PA_ASM_LEVEL /* restore 1.1 || 2.0w */
  261. #endif /*!CONFIG_64BIT*/
  262. load32 PA(fault_vector_20),%r10
  263. $install_iva:
  264. mtctl %r10,%cr14
  265. b aligned_rfi /* Prepare to RFI! Man all the cannons! */
  266. nop
  267. .align 128
  268. aligned_rfi:
  269. pcxt_ssm_bug
  270. copy %r3, %arg0 /* PDCE_PROC for smp_callin() */
  271. rsm PSW_SM_QUIET,%r0 /* off troublesome PSW bits */
  272. /* Don't need NOPs, have 8 compliant insn before rfi */
  273. mtctl %r0,%cr17 /* Clear IIASQ tail */
  274. mtctl %r0,%cr17 /* Clear IIASQ head */
  275. /* Load RFI target into PC queue */
  276. mtctl %r11,%cr18 /* IIAOQ head */
  277. ldo 4(%r11),%r11
  278. mtctl %r11,%cr18 /* IIAOQ tail */
  279. load32 KERNEL_PSW,%r10
  280. mtctl %r10,%ipsw
  281. tovirt_r1 %sp
  282. /* Jump through hyperspace to Virt Mode */
  283. rfi
  284. nop
  285. .procend
  286. #ifdef CONFIG_SMP
  287. .import smp_init_current_idle_task,data
  288. .import smp_callin,code
  289. #ifndef CONFIG_64BIT
  290. smp_callin_rtn:
  291. .proc
  292. .callinfo
  293. break 1,1 /* Break if returned from start_secondary */
  294. nop
  295. nop
  296. .procend
  297. #endif /*!CONFIG_64BIT*/
  298. /***************************************************************************
  299. * smp_slave_stext is executed by all non-monarch Processors when the Monarch
  300. * pokes the slave CPUs in smp.c:smp_boot_cpus().
  301. *
  302. * Once here, registers values are initialized in order to branch to virtual
  303. * mode. Once all available/eligible CPUs are in virtual mode, all are
  304. * released and start out by executing their own idle task.
  305. *****************************************************************************/
  306. smp_slave_stext:
  307. .proc
  308. .callinfo
  309. /*
  310. ** Initialize Space registers
  311. */
  312. mtsp %r0,%sr4
  313. mtsp %r0,%sr5
  314. mtsp %r0,%sr6
  315. mtsp %r0,%sr7
  316. #ifdef CONFIG_64BIT
  317. /*
  318. * Enable Wide mode early, in case the task_struct for the idle
  319. * task in smp_init_current_idle_task was allocated above 4GB.
  320. */
  321. 1: mfia %rp /* clear upper part of pcoq */
  322. ldo 2f-1b(%rp),%rp
  323. depdi 0,31,32,%rp
  324. bv (%rp)
  325. ssm PSW_SM_W,%r0
  326. 2:
  327. #endif
  328. /* Initialize the SP - monarch sets up smp_init_current_idle_task */
  329. load32 PA(smp_init_current_idle_task),%r6
  330. LDREG 0(%r6),%r6
  331. mtctl %r6,%cr30
  332. tophys_r1 %r6
  333. LDREG TASK_STACK(%r6),%sp
  334. tophys_r1 %sp
  335. ldo FRAME_SIZE(%sp),%sp
  336. /* point CPU to kernel page tables */
  337. load32 PA(swapper_pg_dir),%r4
  338. mtctl %r4,%cr24 /* Initialize kernel root pointer */
  339. mtctl %r4,%cr25 /* Initialize user root pointer */
  340. #ifdef CONFIG_64BIT
  341. /* Setup PDCE_PROC entry */
  342. copy %arg0,%r3
  343. #else
  344. /* Load RFI *return* address in case smp_callin bails */
  345. load32 smp_callin_rtn,%r2
  346. #endif
  347. /* Load RFI target address. */
  348. load32 smp_callin,%r11
  349. /* ok...common code can handle the rest */
  350. b common_stext
  351. nop
  352. .procend
  353. #endif /* CONFIG_SMP */
  354. #ifndef CONFIG_64BIT
  355. .section .data..ro_after_init
  356. .align 4
  357. .export $global$,data
  358. .type $global$,@object
  359. .size $global$,4
  360. $global$:
  361. .word 0
  362. #endif /*!CONFIG_64BIT*/