futex.h 2.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _ASM_PARISC_FUTEX_H
  3. #define _ASM_PARISC_FUTEX_H
  4. #include <linux/futex.h>
  5. #include <linux/uaccess.h>
  6. #include <asm/atomic.h>
  7. #include <asm/errno.h>
  8. /* The following has to match the LWS code in syscall.S. We have
  9. * 256 four-word locks. We use bits 20-27 of the futex virtual
  10. * address for the hash index.
  11. */
  12. static inline unsigned long _futex_hash_index(unsigned long ua)
  13. {
  14. return (ua >> 2) & 0x3fc;
  15. }
  16. static inline void
  17. _futex_spin_lock_irqsave(arch_spinlock_t *s, unsigned long *flags)
  18. {
  19. local_irq_save(*flags);
  20. arch_spin_lock(s);
  21. }
  22. static inline void
  23. _futex_spin_unlock_irqrestore(arch_spinlock_t *s, unsigned long *flags)
  24. {
  25. arch_spin_unlock(s);
  26. local_irq_restore(*flags);
  27. }
  28. static inline int
  29. arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
  30. {
  31. extern u32 lws_lock_start[];
  32. unsigned long ua = (unsigned long)uaddr;
  33. arch_spinlock_t *s;
  34. unsigned long flags;
  35. int oldval, ret;
  36. u32 tmp;
  37. s = (arch_spinlock_t *)&lws_lock_start[_futex_hash_index(ua)];
  38. _futex_spin_lock_irqsave(s, &flags);
  39. /* Return -EFAULT if we encounter a page fault or COW break */
  40. if (unlikely(get_user(oldval, uaddr) != 0)) {
  41. ret = -EFAULT;
  42. goto out_pagefault_enable;
  43. }
  44. ret = 0;
  45. tmp = oldval;
  46. switch (op) {
  47. case FUTEX_OP_SET:
  48. tmp = oparg;
  49. break;
  50. case FUTEX_OP_ADD:
  51. tmp += oparg;
  52. break;
  53. case FUTEX_OP_OR:
  54. tmp |= oparg;
  55. break;
  56. case FUTEX_OP_ANDN:
  57. tmp &= ~oparg;
  58. break;
  59. case FUTEX_OP_XOR:
  60. tmp ^= oparg;
  61. break;
  62. default:
  63. ret = -ENOSYS;
  64. goto out_pagefault_enable;
  65. }
  66. if (unlikely(put_user(tmp, uaddr) != 0))
  67. ret = -EFAULT;
  68. out_pagefault_enable:
  69. _futex_spin_unlock_irqrestore(s, &flags);
  70. if (!ret)
  71. *oval = oldval;
  72. return ret;
  73. }
  74. static inline int
  75. futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
  76. u32 oldval, u32 newval)
  77. {
  78. extern u32 lws_lock_start[];
  79. unsigned long ua = (unsigned long)uaddr;
  80. arch_spinlock_t *s;
  81. u32 val;
  82. unsigned long flags;
  83. if (!access_ok(uaddr, sizeof(u32)))
  84. return -EFAULT;
  85. /* HPPA has no cmpxchg in hardware and therefore the
  86. * best we can do here is use an array of locks. The
  87. * lock selected is based on a hash of the virtual
  88. * address of the futex. This should scale to a couple
  89. * of CPUs.
  90. */
  91. s = (arch_spinlock_t *)&lws_lock_start[_futex_hash_index(ua)];
  92. _futex_spin_lock_irqsave(s, &flags);
  93. if (unlikely(get_user(val, uaddr) != 0)) {
  94. _futex_spin_unlock_irqrestore(s, &flags);
  95. return -EFAULT;
  96. }
  97. if (val == oldval && unlikely(put_user(newval, uaddr) != 0)) {
  98. _futex_spin_unlock_irqrestore(s, &flags);
  99. return -EFAULT;
  100. }
  101. *uval = val;
  102. _futex_spin_unlock_irqrestore(s, &flags);
  103. return 0;
  104. }
  105. #endif /*_ASM_PARISC_FUTEX_H*/