dump_tlb.c 3.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
  4. *
  5. * Derived from MIPS:
  6. * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
  7. * Copyright (C) 1999 by Silicon Graphics, Inc.
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/mm.h>
  11. #include <asm/loongarch.h>
  12. #include <asm/page.h>
  13. #include <asm/pgtable.h>
  14. #include <asm/tlb.h>
  15. void dump_tlb_regs(void)
  16. {
  17. const int field = 2 * sizeof(unsigned long);
  18. pr_info("Index : 0x%0x\n", read_csr_tlbidx());
  19. pr_info("PageSize : 0x%0x\n", read_csr_pagesize());
  20. pr_info("EntryHi : 0x%0*llx\n", field, read_csr_entryhi());
  21. pr_info("EntryLo0 : 0x%0*llx\n", field, read_csr_entrylo0());
  22. pr_info("EntryLo1 : 0x%0*llx\n", field, read_csr_entrylo1());
  23. }
  24. static void dump_tlb(int first, int last)
  25. {
  26. unsigned long s_entryhi, entryhi, asid;
  27. unsigned long long entrylo0, entrylo1, pa;
  28. unsigned int index;
  29. unsigned int s_index, s_asid;
  30. unsigned int pagesize, c0, c1, i;
  31. unsigned long asidmask = cpu_asid_mask(&current_cpu_data);
  32. int pwidth = 16;
  33. int vwidth = 16;
  34. int asidwidth = DIV_ROUND_UP(ilog2(asidmask) + 1, 4);
  35. s_entryhi = read_csr_entryhi();
  36. s_index = read_csr_tlbidx();
  37. s_asid = read_csr_asid();
  38. for (i = first; i <= last; i++) {
  39. write_csr_index(i);
  40. tlb_read();
  41. pagesize = read_csr_pagesize();
  42. entryhi = read_csr_entryhi();
  43. entrylo0 = read_csr_entrylo0();
  44. entrylo1 = read_csr_entrylo1();
  45. index = read_csr_tlbidx();
  46. asid = read_csr_asid();
  47. /* EHINV bit marks entire entry as invalid */
  48. if (index & CSR_TLBIDX_EHINV)
  49. continue;
  50. /*
  51. * ASID takes effect in absence of G (global) bit.
  52. */
  53. if (!((entrylo0 | entrylo1) & ENTRYLO_G) &&
  54. asid != s_asid)
  55. continue;
  56. /*
  57. * Only print entries in use
  58. */
  59. pr_info("Index: %4d pgsize=0x%x ", i, (1 << pagesize));
  60. c0 = (entrylo0 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
  61. c1 = (entrylo1 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
  62. pr_cont("va=0x%0*lx asid=0x%0*lx",
  63. vwidth, (entryhi & ~0x1fffUL), asidwidth, asid & asidmask);
  64. /* NR/NX are in awkward places, so mask them off separately */
  65. pa = entrylo0 & ~(ENTRYLO_NR | ENTRYLO_NX);
  66. pa = pa & PAGE_MASK;
  67. pr_cont("\n\t[");
  68. pr_cont("nr=%d nx=%d ",
  69. (entrylo0 & ENTRYLO_NR) ? 1 : 0,
  70. (entrylo0 & ENTRYLO_NX) ? 1 : 0);
  71. pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld] [",
  72. pwidth, pa, c0,
  73. (entrylo0 & ENTRYLO_D) ? 1 : 0,
  74. (entrylo0 & ENTRYLO_V) ? 1 : 0,
  75. (entrylo0 & ENTRYLO_G) ? 1 : 0,
  76. (entrylo0 & ENTRYLO_PLV) >> ENTRYLO_PLV_SHIFT);
  77. /* NR/NX are in awkward places, so mask them off separately */
  78. pa = entrylo1 & ~(ENTRYLO_NR | ENTRYLO_NX);
  79. pa = pa & PAGE_MASK;
  80. pr_cont("nr=%d nx=%d ",
  81. (entrylo1 & ENTRYLO_NR) ? 1 : 0,
  82. (entrylo1 & ENTRYLO_NX) ? 1 : 0);
  83. pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld]\n",
  84. pwidth, pa, c1,
  85. (entrylo1 & ENTRYLO_D) ? 1 : 0,
  86. (entrylo1 & ENTRYLO_V) ? 1 : 0,
  87. (entrylo1 & ENTRYLO_G) ? 1 : 0,
  88. (entrylo1 & ENTRYLO_PLV) >> ENTRYLO_PLV_SHIFT);
  89. }
  90. pr_info("\n");
  91. write_csr_entryhi(s_entryhi);
  92. write_csr_tlbidx(s_index);
  93. write_csr_asid(s_asid);
  94. }
  95. void dump_tlb_all(void)
  96. {
  97. dump_tlb(0, current_cpu_data.tlbsize - 1);
  98. }