io.h 6.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * IO definitions for the Hexagon architecture
  4. *
  5. * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
  6. */
  7. #ifndef _ASM_IO_H
  8. #define _ASM_IO_H
  9. #ifdef __KERNEL__
  10. #include <linux/types.h>
  11. #include <asm/iomap.h>
  12. #include <asm/page.h>
  13. #include <asm/cacheflush.h>
  14. /*
  15. * We don't have PCI yet.
  16. * _IO_BASE is pointing at what should be unused virtual space.
  17. */
  18. #define IO_SPACE_LIMIT 0xffff
  19. #define _IO_BASE ((void __iomem *)0xfe000000)
  20. #define IOMEM(x) ((void __force __iomem *)(x))
  21. extern int remap_area_pages(unsigned long start, unsigned long phys_addr,
  22. unsigned long end, unsigned long flags);
  23. extern void iounmap(const volatile void __iomem *addr);
  24. /* Defined in lib/io.c, needed for smc91x driver. */
  25. extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen);
  26. extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen);
  27. extern void __raw_readsl(const void __iomem *addr, void *data, int wordlen);
  28. extern void __raw_writesl(void __iomem *addr, const void *data, int wordlen);
  29. #define readsw(p, d, l) __raw_readsw(p, d, l)
  30. #define writesw(p, d, l) __raw_writesw(p, d, l)
  31. #define readsl(p, d, l) __raw_readsl(p, d, l)
  32. #define writesl(p, d, l) __raw_writesl(p, d, l)
  33. /*
  34. * virt_to_phys - map virtual address to physical
  35. * @address: address to map
  36. */
  37. static inline unsigned long virt_to_phys(volatile void *address)
  38. {
  39. return __pa(address);
  40. }
  41. /*
  42. * phys_to_virt - map physical address to virtual
  43. * @address: address to map
  44. */
  45. static inline void *phys_to_virt(unsigned long address)
  46. {
  47. return __va(address);
  48. }
  49. /*
  50. * convert a physical pointer to a virtual kernel pointer for
  51. * /dev/mem access.
  52. */
  53. #define xlate_dev_mem_ptr(p) __va(p)
  54. /*
  55. * IO port access primitives. Hexagon doesn't have special IO access
  56. * instructions; all I/O is memory mapped.
  57. *
  58. * in/out are used for "ports", but we don't have "port instructions",
  59. * so these are really just memory mapped too.
  60. */
  61. /*
  62. * readb - read byte from memory mapped device
  63. * @addr: pointer to memory
  64. *
  65. * Operates on "I/O bus memory space"
  66. */
  67. static inline u8 readb(const volatile void __iomem *addr)
  68. {
  69. u8 val;
  70. asm volatile(
  71. "%0 = memb(%1);"
  72. : "=&r" (val)
  73. : "r" (addr)
  74. );
  75. return val;
  76. }
  77. static inline u16 readw(const volatile void __iomem *addr)
  78. {
  79. u16 val;
  80. asm volatile(
  81. "%0 = memh(%1);"
  82. : "=&r" (val)
  83. : "r" (addr)
  84. );
  85. return val;
  86. }
  87. static inline u32 readl(const volatile void __iomem *addr)
  88. {
  89. u32 val;
  90. asm volatile(
  91. "%0 = memw(%1);"
  92. : "=&r" (val)
  93. : "r" (addr)
  94. );
  95. return val;
  96. }
  97. /*
  98. * writeb - write a byte to a memory location
  99. * @data: data to write to
  100. * @addr: pointer to memory
  101. *
  102. */
  103. static inline void writeb(u8 data, volatile void __iomem *addr)
  104. {
  105. asm volatile(
  106. "memb(%0) = %1;"
  107. :
  108. : "r" (addr), "r" (data)
  109. : "memory"
  110. );
  111. }
  112. static inline void writew(u16 data, volatile void __iomem *addr)
  113. {
  114. asm volatile(
  115. "memh(%0) = %1;"
  116. :
  117. : "r" (addr), "r" (data)
  118. : "memory"
  119. );
  120. }
  121. static inline void writel(u32 data, volatile void __iomem *addr)
  122. {
  123. asm volatile(
  124. "memw(%0) = %1;"
  125. :
  126. : "r" (addr), "r" (data)
  127. : "memory"
  128. );
  129. }
  130. #define __raw_writeb writeb
  131. #define __raw_writew writew
  132. #define __raw_writel writel
  133. #define __raw_readb readb
  134. #define __raw_readw readw
  135. #define __raw_readl readl
  136. /*
  137. * http://comments.gmane.org/gmane.linux.ports.arm.kernel/117626
  138. */
  139. #define readb_relaxed __raw_readb
  140. #define readw_relaxed __raw_readw
  141. #define readl_relaxed __raw_readl
  142. #define writeb_relaxed __raw_writeb
  143. #define writew_relaxed __raw_writew
  144. #define writel_relaxed __raw_writel
  145. void __iomem *ioremap(unsigned long phys_addr, unsigned long size);
  146. #define ioremap_uc(X, Y) ioremap((X), (Y))
  147. #define __raw_writel writel
  148. static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
  149. int count)
  150. {
  151. memcpy(dst, (void *) src, count);
  152. }
  153. static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
  154. int count)
  155. {
  156. memcpy((void *) dst, src, count);
  157. }
  158. static inline void memset_io(volatile void __iomem *addr, int value,
  159. size_t size)
  160. {
  161. memset((void __force *)addr, value, size);
  162. }
  163. #define PCI_IO_ADDR (volatile void __iomem *)
  164. /*
  165. * inb - read byte from I/O port or something
  166. * @port: address in I/O space
  167. *
  168. * Operates on "I/O bus I/O space"
  169. */
  170. static inline u8 inb(unsigned long port)
  171. {
  172. return readb(_IO_BASE + (port & IO_SPACE_LIMIT));
  173. }
  174. static inline u16 inw(unsigned long port)
  175. {
  176. return readw(_IO_BASE + (port & IO_SPACE_LIMIT));
  177. }
  178. static inline u32 inl(unsigned long port)
  179. {
  180. return readl(_IO_BASE + (port & IO_SPACE_LIMIT));
  181. }
  182. /*
  183. * outb - write a byte to a memory location
  184. * @data: data to write to
  185. * @addr: address in I/O space
  186. */
  187. static inline void outb(u8 data, unsigned long port)
  188. {
  189. writeb(data, _IO_BASE + (port & IO_SPACE_LIMIT));
  190. }
  191. static inline void outw(u16 data, unsigned long port)
  192. {
  193. writew(data, _IO_BASE + (port & IO_SPACE_LIMIT));
  194. }
  195. static inline void outl(u32 data, unsigned long port)
  196. {
  197. writel(data, _IO_BASE + (port & IO_SPACE_LIMIT));
  198. }
  199. #define outb_p outb
  200. #define outw_p outw
  201. #define outl_p outl
  202. #define inb_p inb
  203. #define inw_p inw
  204. #define inl_p inl
  205. static inline void insb(unsigned long port, void *buffer, int count)
  206. {
  207. if (count) {
  208. u8 *buf = buffer;
  209. do {
  210. u8 x = inb(port);
  211. *buf++ = x;
  212. } while (--count);
  213. }
  214. }
  215. static inline void insw(unsigned long port, void *buffer, int count)
  216. {
  217. if (count) {
  218. u16 *buf = buffer;
  219. do {
  220. u16 x = inw(port);
  221. *buf++ = x;
  222. } while (--count);
  223. }
  224. }
  225. static inline void insl(unsigned long port, void *buffer, int count)
  226. {
  227. if (count) {
  228. u32 *buf = buffer;
  229. do {
  230. u32 x = inw(port);
  231. *buf++ = x;
  232. } while (--count);
  233. }
  234. }
  235. static inline void outsb(unsigned long port, const void *buffer, int count)
  236. {
  237. if (count) {
  238. const u8 *buf = buffer;
  239. do {
  240. outb(*buf++, port);
  241. } while (--count);
  242. }
  243. }
  244. static inline void outsw(unsigned long port, const void *buffer, int count)
  245. {
  246. if (count) {
  247. const u16 *buf = buffer;
  248. do {
  249. outw(*buf++, port);
  250. } while (--count);
  251. }
  252. }
  253. static inline void outsl(unsigned long port, const void *buffer, int count)
  254. {
  255. if (count) {
  256. const u32 *buf = buffer;
  257. do {
  258. outl(*buf++, port);
  259. } while (--count);
  260. }
  261. }
  262. /*
  263. * These defines are necessary to use the generic io.h for filling in
  264. * the missing parts of the API contract. This is because the platform
  265. * uses (inline) functions rather than defines and the generic helper
  266. * fills in the undefined.
  267. */
  268. #define virt_to_phys virt_to_phys
  269. #define phys_to_virt phys_to_virt
  270. #define memset_io memset_io
  271. #define memcpy_fromio memcpy_fromio
  272. #define memcpy_toio memcpy_toio
  273. #define readb readb
  274. #define readw readw
  275. #define readl readl
  276. #define writeb writeb
  277. #define writew writew
  278. #define writel writel
  279. #define insb insb
  280. #define insw insw
  281. #define insl insl
  282. #define outsb outsb
  283. #define outsw outsw
  284. #define outsl outsl
  285. #include <asm-generic/io.h>
  286. #endif /* __KERNEL__ */
  287. #endif