ak4114.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Routines for control of the AK4114 via I2C and 4-wire serial interface
  4. * IEC958 (S/PDIF) receiver by Asahi Kasei
  5. * Copyright (c) by Jaroslav Kysela <[email protected]>
  6. */
  7. #include <linux/slab.h>
  8. #include <linux/delay.h>
  9. #include <linux/module.h>
  10. #include <sound/core.h>
  11. #include <sound/control.h>
  12. #include <sound/pcm.h>
  13. #include <sound/ak4114.h>
  14. #include <sound/asoundef.h>
  15. #include <sound/info.h>
  16. MODULE_AUTHOR("Jaroslav Kysela <[email protected]>");
  17. MODULE_DESCRIPTION("AK4114 IEC958 (S/PDIF) receiver by Asahi Kasei");
  18. MODULE_LICENSE("GPL");
  19. #define AK4114_ADDR 0x00 /* fixed address */
  20. static void ak4114_stats(struct work_struct *work);
  21. static void ak4114_init_regs(struct ak4114 *chip);
  22. static void reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char val)
  23. {
  24. ak4114->write(ak4114->private_data, reg, val);
  25. if (reg <= AK4114_REG_INT1_MASK)
  26. ak4114->regmap[reg] = val;
  27. else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
  28. ak4114->txcsb[reg-AK4114_REG_TXCSB0] = val;
  29. }
  30. static inline unsigned char reg_read(struct ak4114 *ak4114, unsigned char reg)
  31. {
  32. return ak4114->read(ak4114->private_data, reg);
  33. }
  34. #if 0
  35. static void reg_dump(struct ak4114 *ak4114)
  36. {
  37. int i;
  38. printk(KERN_DEBUG "AK4114 REG DUMP:\n");
  39. for (i = 0; i < 0x20; i++)
  40. printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < ARRAY_SIZE(ak4114->regmap) ? ak4114->regmap[i] : 0);
  41. }
  42. #endif
  43. static void snd_ak4114_free(struct ak4114 *chip)
  44. {
  45. atomic_inc(&chip->wq_processing); /* don't schedule new work */
  46. cancel_delayed_work_sync(&chip->work);
  47. kfree(chip);
  48. }
  49. static int snd_ak4114_dev_free(struct snd_device *device)
  50. {
  51. struct ak4114 *chip = device->device_data;
  52. snd_ak4114_free(chip);
  53. return 0;
  54. }
  55. int snd_ak4114_create(struct snd_card *card,
  56. ak4114_read_t *read, ak4114_write_t *write,
  57. const unsigned char pgm[6], const unsigned char txcsb[5],
  58. void *private_data, struct ak4114 **r_ak4114)
  59. {
  60. struct ak4114 *chip;
  61. int err = 0;
  62. unsigned char reg;
  63. static const struct snd_device_ops ops = {
  64. .dev_free = snd_ak4114_dev_free,
  65. };
  66. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  67. if (chip == NULL)
  68. return -ENOMEM;
  69. spin_lock_init(&chip->lock);
  70. chip->card = card;
  71. chip->read = read;
  72. chip->write = write;
  73. chip->private_data = private_data;
  74. INIT_DELAYED_WORK(&chip->work, ak4114_stats);
  75. atomic_set(&chip->wq_processing, 0);
  76. mutex_init(&chip->reinit_mutex);
  77. for (reg = 0; reg < 6; reg++)
  78. chip->regmap[reg] = pgm[reg];
  79. for (reg = 0; reg < 5; reg++)
  80. chip->txcsb[reg] = txcsb[reg];
  81. ak4114_init_regs(chip);
  82. chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT);
  83. chip->rcs1 = reg_read(chip, AK4114_REG_RCS1);
  84. err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops);
  85. if (err < 0)
  86. goto __fail;
  87. if (r_ak4114)
  88. *r_ak4114 = chip;
  89. return 0;
  90. __fail:
  91. snd_ak4114_free(chip);
  92. return err;
  93. }
  94. EXPORT_SYMBOL(snd_ak4114_create);
  95. void snd_ak4114_reg_write(struct ak4114 *chip, unsigned char reg, unsigned char mask, unsigned char val)
  96. {
  97. if (reg <= AK4114_REG_INT1_MASK)
  98. reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
  99. else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
  100. reg_write(chip, reg,
  101. (chip->txcsb[reg-AK4114_REG_TXCSB0] & ~mask) | val);
  102. }
  103. EXPORT_SYMBOL(snd_ak4114_reg_write);
  104. static void ak4114_init_regs(struct ak4114 *chip)
  105. {
  106. unsigned char old = chip->regmap[AK4114_REG_PWRDN], reg;
  107. /* bring the chip to reset state and powerdown state */
  108. reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN));
  109. udelay(200);
  110. /* release reset, but leave powerdown */
  111. reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN);
  112. udelay(200);
  113. for (reg = 1; reg < 6; reg++)
  114. reg_write(chip, reg, chip->regmap[reg]);
  115. for (reg = 0; reg < 5; reg++)
  116. reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]);
  117. /* release powerdown, everything is initialized now */
  118. reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN);
  119. }
  120. void snd_ak4114_reinit(struct ak4114 *chip)
  121. {
  122. if (atomic_inc_return(&chip->wq_processing) == 1)
  123. cancel_delayed_work_sync(&chip->work);
  124. mutex_lock(&chip->reinit_mutex);
  125. ak4114_init_regs(chip);
  126. mutex_unlock(&chip->reinit_mutex);
  127. /* bring up statistics / event queing */
  128. if (atomic_dec_and_test(&chip->wq_processing))
  129. schedule_delayed_work(&chip->work, HZ / 10);
  130. }
  131. EXPORT_SYMBOL(snd_ak4114_reinit);
  132. static unsigned int external_rate(unsigned char rcs1)
  133. {
  134. switch (rcs1 & (AK4114_FS0|AK4114_FS1|AK4114_FS2|AK4114_FS3)) {
  135. case AK4114_FS_32000HZ: return 32000;
  136. case AK4114_FS_44100HZ: return 44100;
  137. case AK4114_FS_48000HZ: return 48000;
  138. case AK4114_FS_88200HZ: return 88200;
  139. case AK4114_FS_96000HZ: return 96000;
  140. case AK4114_FS_176400HZ: return 176400;
  141. case AK4114_FS_192000HZ: return 192000;
  142. default: return 0;
  143. }
  144. }
  145. static int snd_ak4114_in_error_info(struct snd_kcontrol *kcontrol,
  146. struct snd_ctl_elem_info *uinfo)
  147. {
  148. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  149. uinfo->count = 1;
  150. uinfo->value.integer.min = 0;
  151. uinfo->value.integer.max = LONG_MAX;
  152. return 0;
  153. }
  154. static int snd_ak4114_in_error_get(struct snd_kcontrol *kcontrol,
  155. struct snd_ctl_elem_value *ucontrol)
  156. {
  157. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  158. spin_lock_irq(&chip->lock);
  159. ucontrol->value.integer.value[0] =
  160. chip->errors[kcontrol->private_value];
  161. chip->errors[kcontrol->private_value] = 0;
  162. spin_unlock_irq(&chip->lock);
  163. return 0;
  164. }
  165. #define snd_ak4114_in_bit_info snd_ctl_boolean_mono_info
  166. static int snd_ak4114_in_bit_get(struct snd_kcontrol *kcontrol,
  167. struct snd_ctl_elem_value *ucontrol)
  168. {
  169. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  170. unsigned char reg = kcontrol->private_value & 0xff;
  171. unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
  172. unsigned char inv = (kcontrol->private_value >> 31) & 1;
  173. ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
  174. return 0;
  175. }
  176. static int snd_ak4114_rate_info(struct snd_kcontrol *kcontrol,
  177. struct snd_ctl_elem_info *uinfo)
  178. {
  179. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  180. uinfo->count = 1;
  181. uinfo->value.integer.min = 0;
  182. uinfo->value.integer.max = 192000;
  183. return 0;
  184. }
  185. static int snd_ak4114_rate_get(struct snd_kcontrol *kcontrol,
  186. struct snd_ctl_elem_value *ucontrol)
  187. {
  188. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  189. ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1));
  190. return 0;
  191. }
  192. static int snd_ak4114_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  193. {
  194. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  195. uinfo->count = 1;
  196. return 0;
  197. }
  198. static int snd_ak4114_spdif_get(struct snd_kcontrol *kcontrol,
  199. struct snd_ctl_elem_value *ucontrol)
  200. {
  201. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  202. unsigned i;
  203. for (i = 0; i < AK4114_REG_RXCSB_SIZE; i++)
  204. ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i);
  205. return 0;
  206. }
  207. static int snd_ak4114_spdif_playback_get(struct snd_kcontrol *kcontrol,
  208. struct snd_ctl_elem_value *ucontrol)
  209. {
  210. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  211. unsigned i;
  212. for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
  213. ucontrol->value.iec958.status[i] = chip->txcsb[i];
  214. return 0;
  215. }
  216. static int snd_ak4114_spdif_playback_put(struct snd_kcontrol *kcontrol,
  217. struct snd_ctl_elem_value *ucontrol)
  218. {
  219. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  220. unsigned i;
  221. for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
  222. reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]);
  223. return 0;
  224. }
  225. static int snd_ak4114_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  226. {
  227. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  228. uinfo->count = 1;
  229. return 0;
  230. }
  231. static int snd_ak4114_spdif_mask_get(struct snd_kcontrol *kcontrol,
  232. struct snd_ctl_elem_value *ucontrol)
  233. {
  234. memset(ucontrol->value.iec958.status, 0xff, AK4114_REG_RXCSB_SIZE);
  235. return 0;
  236. }
  237. static int snd_ak4114_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  238. {
  239. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  240. uinfo->value.integer.min = 0;
  241. uinfo->value.integer.max = 0xffff;
  242. uinfo->count = 4;
  243. return 0;
  244. }
  245. static int snd_ak4114_spdif_pget(struct snd_kcontrol *kcontrol,
  246. struct snd_ctl_elem_value *ucontrol)
  247. {
  248. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  249. unsigned short tmp;
  250. ucontrol->value.integer.value[0] = 0xf8f2;
  251. ucontrol->value.integer.value[1] = 0x4e1f;
  252. tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8);
  253. ucontrol->value.integer.value[2] = tmp;
  254. tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8);
  255. ucontrol->value.integer.value[3] = tmp;
  256. return 0;
  257. }
  258. static int snd_ak4114_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  259. {
  260. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  261. uinfo->count = AK4114_REG_QSUB_SIZE;
  262. return 0;
  263. }
  264. static int snd_ak4114_spdif_qget(struct snd_kcontrol *kcontrol,
  265. struct snd_ctl_elem_value *ucontrol)
  266. {
  267. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  268. unsigned i;
  269. for (i = 0; i < AK4114_REG_QSUB_SIZE; i++)
  270. ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i);
  271. return 0;
  272. }
  273. /* Don't forget to change AK4114_CONTROLS define!!! */
  274. static const struct snd_kcontrol_new snd_ak4114_iec958_controls[] = {
  275. {
  276. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  277. .name = "IEC958 Parity Errors",
  278. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  279. .info = snd_ak4114_in_error_info,
  280. .get = snd_ak4114_in_error_get,
  281. .private_value = AK4114_PARITY_ERRORS,
  282. },
  283. {
  284. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  285. .name = "IEC958 V-Bit Errors",
  286. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  287. .info = snd_ak4114_in_error_info,
  288. .get = snd_ak4114_in_error_get,
  289. .private_value = AK4114_V_BIT_ERRORS,
  290. },
  291. {
  292. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  293. .name = "IEC958 C-CRC Errors",
  294. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  295. .info = snd_ak4114_in_error_info,
  296. .get = snd_ak4114_in_error_get,
  297. .private_value = AK4114_CCRC_ERRORS,
  298. },
  299. {
  300. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  301. .name = "IEC958 Q-CRC Errors",
  302. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  303. .info = snd_ak4114_in_error_info,
  304. .get = snd_ak4114_in_error_get,
  305. .private_value = AK4114_QCRC_ERRORS,
  306. },
  307. {
  308. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  309. .name = "IEC958 External Rate",
  310. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  311. .info = snd_ak4114_rate_info,
  312. .get = snd_ak4114_rate_get,
  313. },
  314. {
  315. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  316. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  317. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  318. .info = snd_ak4114_spdif_mask_info,
  319. .get = snd_ak4114_spdif_mask_get,
  320. },
  321. {
  322. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  323. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  324. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  325. .info = snd_ak4114_spdif_info,
  326. .get = snd_ak4114_spdif_playback_get,
  327. .put = snd_ak4114_spdif_playback_put,
  328. },
  329. {
  330. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  331. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
  332. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  333. .info = snd_ak4114_spdif_mask_info,
  334. .get = snd_ak4114_spdif_mask_get,
  335. },
  336. {
  337. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  338. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
  339. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  340. .info = snd_ak4114_spdif_info,
  341. .get = snd_ak4114_spdif_get,
  342. },
  343. {
  344. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  345. .name = "IEC958 Preamble Capture Default",
  346. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  347. .info = snd_ak4114_spdif_pinfo,
  348. .get = snd_ak4114_spdif_pget,
  349. },
  350. {
  351. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  352. .name = "IEC958 Q-subcode Capture Default",
  353. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  354. .info = snd_ak4114_spdif_qinfo,
  355. .get = snd_ak4114_spdif_qget,
  356. },
  357. {
  358. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  359. .name = "IEC958 Audio",
  360. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  361. .info = snd_ak4114_in_bit_info,
  362. .get = snd_ak4114_in_bit_get,
  363. .private_value = (1<<31) | (1<<8) | AK4114_REG_RCS0,
  364. },
  365. {
  366. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  367. .name = "IEC958 Non-PCM Bitstream",
  368. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  369. .info = snd_ak4114_in_bit_info,
  370. .get = snd_ak4114_in_bit_get,
  371. .private_value = (6<<8) | AK4114_REG_RCS0,
  372. },
  373. {
  374. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  375. .name = "IEC958 DTS Bitstream",
  376. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  377. .info = snd_ak4114_in_bit_info,
  378. .get = snd_ak4114_in_bit_get,
  379. .private_value = (3<<8) | AK4114_REG_RCS0,
  380. },
  381. {
  382. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  383. .name = "IEC958 PPL Lock Status",
  384. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  385. .info = snd_ak4114_in_bit_info,
  386. .get = snd_ak4114_in_bit_get,
  387. .private_value = (1<<31) | (4<<8) | AK4114_REG_RCS0,
  388. }
  389. };
  390. static void snd_ak4114_proc_regs_read(struct snd_info_entry *entry,
  391. struct snd_info_buffer *buffer)
  392. {
  393. struct ak4114 *ak4114 = entry->private_data;
  394. int reg, val;
  395. /* all ak4114 registers 0x00 - 0x1f */
  396. for (reg = 0; reg < 0x20; reg++) {
  397. val = reg_read(ak4114, reg);
  398. snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
  399. }
  400. }
  401. static void snd_ak4114_proc_init(struct ak4114 *ak4114)
  402. {
  403. snd_card_ro_proc_new(ak4114->card, "ak4114", ak4114,
  404. snd_ak4114_proc_regs_read);
  405. }
  406. int snd_ak4114_build(struct ak4114 *ak4114,
  407. struct snd_pcm_substream *ply_substream,
  408. struct snd_pcm_substream *cap_substream)
  409. {
  410. struct snd_kcontrol *kctl;
  411. unsigned int idx;
  412. int err;
  413. if (snd_BUG_ON(!cap_substream))
  414. return -EINVAL;
  415. ak4114->playback_substream = ply_substream;
  416. ak4114->capture_substream = cap_substream;
  417. for (idx = 0; idx < AK4114_CONTROLS; idx++) {
  418. kctl = snd_ctl_new1(&snd_ak4114_iec958_controls[idx], ak4114);
  419. if (kctl == NULL)
  420. return -ENOMEM;
  421. if (strstr(kctl->id.name, "Playback")) {
  422. if (ply_substream == NULL) {
  423. snd_ctl_free_one(kctl);
  424. ak4114->kctls[idx] = NULL;
  425. continue;
  426. }
  427. kctl->id.device = ply_substream->pcm->device;
  428. kctl->id.subdevice = ply_substream->number;
  429. } else {
  430. kctl->id.device = cap_substream->pcm->device;
  431. kctl->id.subdevice = cap_substream->number;
  432. }
  433. err = snd_ctl_add(ak4114->card, kctl);
  434. if (err < 0)
  435. return err;
  436. ak4114->kctls[idx] = kctl;
  437. }
  438. snd_ak4114_proc_init(ak4114);
  439. /* trigger workq */
  440. schedule_delayed_work(&ak4114->work, HZ / 10);
  441. return 0;
  442. }
  443. EXPORT_SYMBOL(snd_ak4114_build);
  444. /* notify kcontrols if any parameters are changed */
  445. static void ak4114_notify(struct ak4114 *ak4114,
  446. unsigned char rcs0, unsigned char rcs1,
  447. unsigned char c0, unsigned char c1)
  448. {
  449. if (!ak4114->kctls[0])
  450. return;
  451. if (rcs0 & AK4114_PAR)
  452. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  453. &ak4114->kctls[0]->id);
  454. if (rcs0 & AK4114_V)
  455. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  456. &ak4114->kctls[1]->id);
  457. if (rcs1 & AK4114_CCRC)
  458. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  459. &ak4114->kctls[2]->id);
  460. if (rcs1 & AK4114_QCRC)
  461. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  462. &ak4114->kctls[3]->id);
  463. /* rate change */
  464. if (c1 & 0xf0)
  465. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  466. &ak4114->kctls[4]->id);
  467. if ((c0 & AK4114_PEM) | (c0 & AK4114_CINT))
  468. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  469. &ak4114->kctls[9]->id);
  470. if (c0 & AK4114_QINT)
  471. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  472. &ak4114->kctls[10]->id);
  473. if (c0 & AK4114_AUDION)
  474. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  475. &ak4114->kctls[11]->id);
  476. if (c0 & AK4114_AUTO)
  477. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  478. &ak4114->kctls[12]->id);
  479. if (c0 & AK4114_DTSCD)
  480. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  481. &ak4114->kctls[13]->id);
  482. if (c0 & AK4114_UNLCK)
  483. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  484. &ak4114->kctls[14]->id);
  485. }
  486. int snd_ak4114_external_rate(struct ak4114 *ak4114)
  487. {
  488. unsigned char rcs1;
  489. rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
  490. return external_rate(rcs1);
  491. }
  492. EXPORT_SYMBOL(snd_ak4114_external_rate);
  493. int snd_ak4114_check_rate_and_errors(struct ak4114 *ak4114, unsigned int flags)
  494. {
  495. struct snd_pcm_runtime *runtime = ak4114->capture_substream ? ak4114->capture_substream->runtime : NULL;
  496. unsigned long _flags;
  497. int res = 0;
  498. unsigned char rcs0, rcs1;
  499. unsigned char c0, c1;
  500. rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
  501. if (flags & AK4114_CHECK_NO_STAT)
  502. goto __rate;
  503. rcs0 = reg_read(ak4114, AK4114_REG_RCS0);
  504. spin_lock_irqsave(&ak4114->lock, _flags);
  505. if (rcs0 & AK4114_PAR)
  506. ak4114->errors[AK4114_PARITY_ERRORS]++;
  507. if (rcs1 & AK4114_V)
  508. ak4114->errors[AK4114_V_BIT_ERRORS]++;
  509. if (rcs1 & AK4114_CCRC)
  510. ak4114->errors[AK4114_CCRC_ERRORS]++;
  511. if (rcs1 & AK4114_QCRC)
  512. ak4114->errors[AK4114_QCRC_ERRORS]++;
  513. c0 = (ak4114->rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)) ^
  514. (rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK));
  515. c1 = (ak4114->rcs1 & 0xf0) ^ (rcs1 & 0xf0);
  516. ak4114->rcs0 = rcs0 & ~(AK4114_QINT | AK4114_CINT);
  517. ak4114->rcs1 = rcs1;
  518. spin_unlock_irqrestore(&ak4114->lock, _flags);
  519. ak4114_notify(ak4114, rcs0, rcs1, c0, c1);
  520. if (ak4114->change_callback && (c0 | c1) != 0)
  521. ak4114->change_callback(ak4114, c0, c1);
  522. __rate:
  523. /* compare rate */
  524. res = external_rate(rcs1);
  525. if (!(flags & AK4114_CHECK_NO_RATE) && runtime && runtime->rate != res) {
  526. snd_pcm_stream_lock_irqsave(ak4114->capture_substream, _flags);
  527. if (snd_pcm_running(ak4114->capture_substream)) {
  528. // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
  529. snd_pcm_stop(ak4114->capture_substream, SNDRV_PCM_STATE_DRAINING);
  530. res = 1;
  531. }
  532. snd_pcm_stream_unlock_irqrestore(ak4114->capture_substream, _flags);
  533. }
  534. return res;
  535. }
  536. EXPORT_SYMBOL(snd_ak4114_check_rate_and_errors);
  537. static void ak4114_stats(struct work_struct *work)
  538. {
  539. struct ak4114 *chip = container_of(work, struct ak4114, work.work);
  540. if (atomic_inc_return(&chip->wq_processing) == 1)
  541. snd_ak4114_check_rate_and_errors(chip, chip->check_flags);
  542. if (atomic_dec_and_test(&chip->wq_processing))
  543. schedule_delayed_work(&chip->work, HZ / 10);
  544. }
  545. #ifdef CONFIG_PM
  546. void snd_ak4114_suspend(struct ak4114 *chip)
  547. {
  548. atomic_inc(&chip->wq_processing); /* don't schedule new work */
  549. cancel_delayed_work_sync(&chip->work);
  550. }
  551. EXPORT_SYMBOL(snd_ak4114_suspend);
  552. void snd_ak4114_resume(struct ak4114 *chip)
  553. {
  554. atomic_dec(&chip->wq_processing);
  555. snd_ak4114_reinit(chip);
  556. }
  557. EXPORT_SYMBOL(snd_ak4114_resume);
  558. #endif