mbochs.c 36 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Mediated virtual PCI display host device driver
  4. *
  5. * Emulate enough of qemu stdvga to make bochs-drm.ko happy. That is
  6. * basically the vram memory bar and the bochs dispi interface vbe
  7. * registers in the mmio register bar. Specifically it does *not*
  8. * include any legacy vga stuff. Device looks a lot like "qemu -device
  9. * secondary-vga".
  10. *
  11. * (c) Gerd Hoffmann <[email protected]>
  12. *
  13. * based on mtty driver which is:
  14. * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
  15. * Author: Neo Jia <[email protected]>
  16. * Kirti Wankhede <[email protected]>
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/kernel.h>
  25. #include <linux/slab.h>
  26. #include <linux/vmalloc.h>
  27. #include <linux/cdev.h>
  28. #include <linux/vfio.h>
  29. #include <linux/iommu.h>
  30. #include <linux/sysfs.h>
  31. #include <linux/mdev.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-buf.h>
  34. #include <linux/highmem.h>
  35. #include <drm/drm_fourcc.h>
  36. #include <drm/drm_rect.h>
  37. #include <drm/drm_modeset_lock.h>
  38. #include <drm/drm_property.h>
  39. #include <drm/drm_plane.h>
  40. #define VBE_DISPI_INDEX_ID 0x0
  41. #define VBE_DISPI_INDEX_XRES 0x1
  42. #define VBE_DISPI_INDEX_YRES 0x2
  43. #define VBE_DISPI_INDEX_BPP 0x3
  44. #define VBE_DISPI_INDEX_ENABLE 0x4
  45. #define VBE_DISPI_INDEX_BANK 0x5
  46. #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
  47. #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
  48. #define VBE_DISPI_INDEX_X_OFFSET 0x8
  49. #define VBE_DISPI_INDEX_Y_OFFSET 0x9
  50. #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
  51. #define VBE_DISPI_INDEX_COUNT 0xb
  52. #define VBE_DISPI_ID0 0xB0C0
  53. #define VBE_DISPI_ID1 0xB0C1
  54. #define VBE_DISPI_ID2 0xB0C2
  55. #define VBE_DISPI_ID3 0xB0C3
  56. #define VBE_DISPI_ID4 0xB0C4
  57. #define VBE_DISPI_ID5 0xB0C5
  58. #define VBE_DISPI_DISABLED 0x00
  59. #define VBE_DISPI_ENABLED 0x01
  60. #define VBE_DISPI_GETCAPS 0x02
  61. #define VBE_DISPI_8BIT_DAC 0x20
  62. #define VBE_DISPI_LFB_ENABLED 0x40
  63. #define VBE_DISPI_NOCLEARMEM 0x80
  64. #define MBOCHS_NAME "mbochs"
  65. #define MBOCHS_CLASS_NAME "mbochs"
  66. #define MBOCHS_EDID_REGION_INDEX VFIO_PCI_NUM_REGIONS
  67. #define MBOCHS_NUM_REGIONS (MBOCHS_EDID_REGION_INDEX+1)
  68. #define MBOCHS_CONFIG_SPACE_SIZE 0xff
  69. #define MBOCHS_MMIO_BAR_OFFSET PAGE_SIZE
  70. #define MBOCHS_MMIO_BAR_SIZE PAGE_SIZE
  71. #define MBOCHS_EDID_OFFSET (MBOCHS_MMIO_BAR_OFFSET + \
  72. MBOCHS_MMIO_BAR_SIZE)
  73. #define MBOCHS_EDID_SIZE PAGE_SIZE
  74. #define MBOCHS_MEMORY_BAR_OFFSET (MBOCHS_EDID_OFFSET + \
  75. MBOCHS_EDID_SIZE)
  76. #define MBOCHS_EDID_BLOB_OFFSET (MBOCHS_EDID_SIZE/2)
  77. #define STORE_LE16(addr, val) (*(u16 *)addr = val)
  78. #define STORE_LE32(addr, val) (*(u32 *)addr = val)
  79. MODULE_LICENSE("GPL v2");
  80. static int max_mbytes = 256;
  81. module_param_named(count, max_mbytes, int, 0444);
  82. MODULE_PARM_DESC(mem, "megabytes available to " MBOCHS_NAME " devices");
  83. #define MBOCHS_TYPE_1 "small"
  84. #define MBOCHS_TYPE_2 "medium"
  85. #define MBOCHS_TYPE_3 "large"
  86. static struct mbochs_type {
  87. struct mdev_type type;
  88. u32 mbytes;
  89. u32 max_x;
  90. u32 max_y;
  91. } mbochs_types[] = {
  92. {
  93. .type.sysfs_name = MBOCHS_TYPE_1,
  94. .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_1,
  95. .mbytes = 4,
  96. .max_x = 800,
  97. .max_y = 600,
  98. }, {
  99. .type.sysfs_name = MBOCHS_TYPE_2,
  100. .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_2,
  101. .mbytes = 16,
  102. .max_x = 1920,
  103. .max_y = 1440,
  104. }, {
  105. .type.sysfs_name = MBOCHS_TYPE_3,
  106. .type.pretty_name = MBOCHS_CLASS_NAME "-" MBOCHS_TYPE_3,
  107. .mbytes = 64,
  108. .max_x = 0,
  109. .max_y = 0,
  110. },
  111. };
  112. static struct mdev_type *mbochs_mdev_types[] = {
  113. &mbochs_types[0].type,
  114. &mbochs_types[1].type,
  115. &mbochs_types[2].type,
  116. };
  117. static dev_t mbochs_devt;
  118. static struct class *mbochs_class;
  119. static struct cdev mbochs_cdev;
  120. static struct device mbochs_dev;
  121. static struct mdev_parent mbochs_parent;
  122. static atomic_t mbochs_avail_mbytes;
  123. static const struct vfio_device_ops mbochs_dev_ops;
  124. struct vfio_region_info_ext {
  125. struct vfio_region_info base;
  126. struct vfio_region_info_cap_type type;
  127. };
  128. struct mbochs_mode {
  129. u32 drm_format;
  130. u32 bytepp;
  131. u32 width;
  132. u32 height;
  133. u32 stride;
  134. u32 __pad;
  135. u64 offset;
  136. u64 size;
  137. };
  138. struct mbochs_dmabuf {
  139. struct mbochs_mode mode;
  140. u32 id;
  141. struct page **pages;
  142. pgoff_t pagecount;
  143. struct dma_buf *buf;
  144. struct mdev_state *mdev_state;
  145. struct list_head next;
  146. bool unlinked;
  147. };
  148. /* State of each mdev device */
  149. struct mdev_state {
  150. struct vfio_device vdev;
  151. u8 *vconfig;
  152. u64 bar_mask[3];
  153. u32 memory_bar_mask;
  154. struct mutex ops_lock;
  155. struct mdev_device *mdev;
  156. const struct mbochs_type *type;
  157. u16 vbe[VBE_DISPI_INDEX_COUNT];
  158. u64 memsize;
  159. struct page **pages;
  160. pgoff_t pagecount;
  161. struct vfio_region_gfx_edid edid_regs;
  162. u8 edid_blob[0x400];
  163. struct list_head dmabufs;
  164. u32 active_id;
  165. u32 next_id;
  166. };
  167. static const char *vbe_name_list[VBE_DISPI_INDEX_COUNT] = {
  168. [VBE_DISPI_INDEX_ID] = "id",
  169. [VBE_DISPI_INDEX_XRES] = "xres",
  170. [VBE_DISPI_INDEX_YRES] = "yres",
  171. [VBE_DISPI_INDEX_BPP] = "bpp",
  172. [VBE_DISPI_INDEX_ENABLE] = "enable",
  173. [VBE_DISPI_INDEX_BANK] = "bank",
  174. [VBE_DISPI_INDEX_VIRT_WIDTH] = "virt-width",
  175. [VBE_DISPI_INDEX_VIRT_HEIGHT] = "virt-height",
  176. [VBE_DISPI_INDEX_X_OFFSET] = "x-offset",
  177. [VBE_DISPI_INDEX_Y_OFFSET] = "y-offset",
  178. [VBE_DISPI_INDEX_VIDEO_MEMORY_64K] = "video-mem",
  179. };
  180. static const char *vbe_name(u32 index)
  181. {
  182. if (index < ARRAY_SIZE(vbe_name_list))
  183. return vbe_name_list[index];
  184. return "(invalid)";
  185. }
  186. static struct page *__mbochs_get_page(struct mdev_state *mdev_state,
  187. pgoff_t pgoff);
  188. static struct page *mbochs_get_page(struct mdev_state *mdev_state,
  189. pgoff_t pgoff);
  190. static void mbochs_create_config_space(struct mdev_state *mdev_state)
  191. {
  192. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_VENDOR_ID],
  193. 0x1234);
  194. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_DEVICE_ID],
  195. 0x1111);
  196. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_VENDOR_ID],
  197. PCI_SUBVENDOR_ID_REDHAT_QUMRANET);
  198. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_ID],
  199. PCI_SUBDEVICE_ID_QEMU);
  200. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_COMMAND],
  201. PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
  202. STORE_LE16((u16 *) &mdev_state->vconfig[PCI_CLASS_DEVICE],
  203. PCI_CLASS_DISPLAY_OTHER);
  204. mdev_state->vconfig[PCI_CLASS_REVISION] = 0x01;
  205. STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_0],
  206. PCI_BASE_ADDRESS_SPACE_MEMORY |
  207. PCI_BASE_ADDRESS_MEM_TYPE_32 |
  208. PCI_BASE_ADDRESS_MEM_PREFETCH);
  209. mdev_state->bar_mask[0] = ~(mdev_state->memsize) + 1;
  210. STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_2],
  211. PCI_BASE_ADDRESS_SPACE_MEMORY |
  212. PCI_BASE_ADDRESS_MEM_TYPE_32);
  213. mdev_state->bar_mask[2] = ~(MBOCHS_MMIO_BAR_SIZE) + 1;
  214. }
  215. static int mbochs_check_framebuffer(struct mdev_state *mdev_state,
  216. struct mbochs_mode *mode)
  217. {
  218. struct device *dev = mdev_dev(mdev_state->mdev);
  219. u16 *vbe = mdev_state->vbe;
  220. u32 virt_width;
  221. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  222. if (!(vbe[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED))
  223. goto nofb;
  224. memset(mode, 0, sizeof(*mode));
  225. switch (vbe[VBE_DISPI_INDEX_BPP]) {
  226. case 32:
  227. mode->drm_format = DRM_FORMAT_XRGB8888;
  228. mode->bytepp = 4;
  229. break;
  230. default:
  231. dev_info_ratelimited(dev, "%s: bpp %d not supported\n",
  232. __func__, vbe[VBE_DISPI_INDEX_BPP]);
  233. goto nofb;
  234. }
  235. mode->width = vbe[VBE_DISPI_INDEX_XRES];
  236. mode->height = vbe[VBE_DISPI_INDEX_YRES];
  237. virt_width = vbe[VBE_DISPI_INDEX_VIRT_WIDTH];
  238. if (virt_width < mode->width)
  239. virt_width = mode->width;
  240. mode->stride = virt_width * mode->bytepp;
  241. mode->size = (u64)mode->stride * mode->height;
  242. mode->offset = ((u64)vbe[VBE_DISPI_INDEX_X_OFFSET] * mode->bytepp +
  243. (u64)vbe[VBE_DISPI_INDEX_Y_OFFSET] * mode->stride);
  244. if (mode->width < 64 || mode->height < 64) {
  245. dev_info_ratelimited(dev, "%s: invalid resolution %dx%d\n",
  246. __func__, mode->width, mode->height);
  247. goto nofb;
  248. }
  249. if (mode->offset + mode->size > mdev_state->memsize) {
  250. dev_info_ratelimited(dev, "%s: framebuffer memory overflow\n",
  251. __func__);
  252. goto nofb;
  253. }
  254. return 0;
  255. nofb:
  256. memset(mode, 0, sizeof(*mode));
  257. return -EINVAL;
  258. }
  259. static bool mbochs_modes_equal(struct mbochs_mode *mode1,
  260. struct mbochs_mode *mode2)
  261. {
  262. return memcmp(mode1, mode2, sizeof(struct mbochs_mode)) == 0;
  263. }
  264. static void handle_pci_cfg_write(struct mdev_state *mdev_state, u16 offset,
  265. char *buf, u32 count)
  266. {
  267. struct device *dev = mdev_dev(mdev_state->mdev);
  268. int index = (offset - PCI_BASE_ADDRESS_0) / 0x04;
  269. u32 cfg_addr;
  270. switch (offset) {
  271. case PCI_BASE_ADDRESS_0:
  272. case PCI_BASE_ADDRESS_2:
  273. cfg_addr = *(u32 *)buf;
  274. if (cfg_addr == 0xffffffff) {
  275. cfg_addr = (cfg_addr & mdev_state->bar_mask[index]);
  276. } else {
  277. cfg_addr &= PCI_BASE_ADDRESS_MEM_MASK;
  278. if (cfg_addr)
  279. dev_info(dev, "BAR #%d @ 0x%x\n",
  280. index, cfg_addr);
  281. }
  282. cfg_addr |= (mdev_state->vconfig[offset] &
  283. ~PCI_BASE_ADDRESS_MEM_MASK);
  284. STORE_LE32(&mdev_state->vconfig[offset], cfg_addr);
  285. break;
  286. }
  287. }
  288. static void handle_mmio_write(struct mdev_state *mdev_state, u16 offset,
  289. char *buf, u32 count)
  290. {
  291. struct device *dev = mdev_dev(mdev_state->mdev);
  292. int index;
  293. u16 reg16;
  294. switch (offset) {
  295. case 0x400 ... 0x41f: /* vga ioports remapped */
  296. goto unhandled;
  297. case 0x500 ... 0x515: /* bochs dispi interface */
  298. if (count != 2)
  299. goto unhandled;
  300. index = (offset - 0x500) / 2;
  301. reg16 = *(u16 *)buf;
  302. if (index < ARRAY_SIZE(mdev_state->vbe))
  303. mdev_state->vbe[index] = reg16;
  304. dev_dbg(dev, "%s: vbe write %d = %d (%s)\n",
  305. __func__, index, reg16, vbe_name(index));
  306. break;
  307. case 0x600 ... 0x607: /* qemu extended regs */
  308. goto unhandled;
  309. default:
  310. unhandled:
  311. dev_dbg(dev, "%s: @0x%03x, count %d (unhandled)\n",
  312. __func__, offset, count);
  313. break;
  314. }
  315. }
  316. static void handle_mmio_read(struct mdev_state *mdev_state, u16 offset,
  317. char *buf, u32 count)
  318. {
  319. struct device *dev = mdev_dev(mdev_state->mdev);
  320. struct vfio_region_gfx_edid *edid;
  321. u16 reg16 = 0;
  322. int index;
  323. switch (offset) {
  324. case 0x000 ... 0x3ff: /* edid block */
  325. edid = &mdev_state->edid_regs;
  326. if (edid->link_state != VFIO_DEVICE_GFX_LINK_STATE_UP ||
  327. offset >= edid->edid_size) {
  328. memset(buf, 0, count);
  329. break;
  330. }
  331. memcpy(buf, mdev_state->edid_blob + offset, count);
  332. break;
  333. case 0x500 ... 0x515: /* bochs dispi interface */
  334. if (count != 2)
  335. goto unhandled;
  336. index = (offset - 0x500) / 2;
  337. if (index < ARRAY_SIZE(mdev_state->vbe))
  338. reg16 = mdev_state->vbe[index];
  339. dev_dbg(dev, "%s: vbe read %d = %d (%s)\n",
  340. __func__, index, reg16, vbe_name(index));
  341. *(u16 *)buf = reg16;
  342. break;
  343. default:
  344. unhandled:
  345. dev_dbg(dev, "%s: @0x%03x, count %d (unhandled)\n",
  346. __func__, offset, count);
  347. memset(buf, 0, count);
  348. break;
  349. }
  350. }
  351. static void handle_edid_regs(struct mdev_state *mdev_state, u16 offset,
  352. char *buf, u32 count, bool is_write)
  353. {
  354. char *regs = (void *)&mdev_state->edid_regs;
  355. if (offset + count > sizeof(mdev_state->edid_regs))
  356. return;
  357. if (count != 4)
  358. return;
  359. if (offset % 4)
  360. return;
  361. if (is_write) {
  362. switch (offset) {
  363. case offsetof(struct vfio_region_gfx_edid, link_state):
  364. case offsetof(struct vfio_region_gfx_edid, edid_size):
  365. memcpy(regs + offset, buf, count);
  366. break;
  367. default:
  368. /* read-only regs */
  369. break;
  370. }
  371. } else {
  372. memcpy(buf, regs + offset, count);
  373. }
  374. }
  375. static void handle_edid_blob(struct mdev_state *mdev_state, u16 offset,
  376. char *buf, u32 count, bool is_write)
  377. {
  378. if (offset + count > mdev_state->edid_regs.edid_max_size)
  379. return;
  380. if (is_write)
  381. memcpy(mdev_state->edid_blob + offset, buf, count);
  382. else
  383. memcpy(buf, mdev_state->edid_blob + offset, count);
  384. }
  385. static ssize_t mdev_access(struct mdev_state *mdev_state, char *buf,
  386. size_t count, loff_t pos, bool is_write)
  387. {
  388. struct page *pg;
  389. loff_t poff;
  390. char *map;
  391. int ret = 0;
  392. mutex_lock(&mdev_state->ops_lock);
  393. if (pos < MBOCHS_CONFIG_SPACE_SIZE) {
  394. if (is_write)
  395. handle_pci_cfg_write(mdev_state, pos, buf, count);
  396. else
  397. memcpy(buf, (mdev_state->vconfig + pos), count);
  398. } else if (pos >= MBOCHS_MMIO_BAR_OFFSET &&
  399. pos + count <= (MBOCHS_MMIO_BAR_OFFSET +
  400. MBOCHS_MMIO_BAR_SIZE)) {
  401. pos -= MBOCHS_MMIO_BAR_OFFSET;
  402. if (is_write)
  403. handle_mmio_write(mdev_state, pos, buf, count);
  404. else
  405. handle_mmio_read(mdev_state, pos, buf, count);
  406. } else if (pos >= MBOCHS_EDID_OFFSET &&
  407. pos + count <= (MBOCHS_EDID_OFFSET +
  408. MBOCHS_EDID_SIZE)) {
  409. pos -= MBOCHS_EDID_OFFSET;
  410. if (pos < MBOCHS_EDID_BLOB_OFFSET) {
  411. handle_edid_regs(mdev_state, pos, buf, count, is_write);
  412. } else {
  413. pos -= MBOCHS_EDID_BLOB_OFFSET;
  414. handle_edid_blob(mdev_state, pos, buf, count, is_write);
  415. }
  416. } else if (pos >= MBOCHS_MEMORY_BAR_OFFSET &&
  417. pos + count <=
  418. MBOCHS_MEMORY_BAR_OFFSET + mdev_state->memsize) {
  419. pos -= MBOCHS_MMIO_BAR_OFFSET;
  420. poff = pos & ~PAGE_MASK;
  421. pg = __mbochs_get_page(mdev_state, pos >> PAGE_SHIFT);
  422. map = kmap(pg);
  423. if (is_write)
  424. memcpy(map + poff, buf, count);
  425. else
  426. memcpy(buf, map + poff, count);
  427. kunmap(pg);
  428. put_page(pg);
  429. } else {
  430. dev_dbg(mdev_state->vdev.dev, "%s: %s @0x%llx (unhandled)\n",
  431. __func__, is_write ? "WR" : "RD", pos);
  432. ret = -1;
  433. goto accessfailed;
  434. }
  435. ret = count;
  436. accessfailed:
  437. mutex_unlock(&mdev_state->ops_lock);
  438. return ret;
  439. }
  440. static int mbochs_reset(struct mdev_state *mdev_state)
  441. {
  442. u32 size64k = mdev_state->memsize / (64 * 1024);
  443. int i;
  444. for (i = 0; i < ARRAY_SIZE(mdev_state->vbe); i++)
  445. mdev_state->vbe[i] = 0;
  446. mdev_state->vbe[VBE_DISPI_INDEX_ID] = VBE_DISPI_ID5;
  447. mdev_state->vbe[VBE_DISPI_INDEX_VIDEO_MEMORY_64K] = size64k;
  448. return 0;
  449. }
  450. static int mbochs_init_dev(struct vfio_device *vdev)
  451. {
  452. struct mdev_state *mdev_state =
  453. container_of(vdev, struct mdev_state, vdev);
  454. struct mdev_device *mdev = to_mdev_device(vdev->dev);
  455. struct mbochs_type *type =
  456. container_of(mdev->type, struct mbochs_type, type);
  457. int avail_mbytes = atomic_read(&mbochs_avail_mbytes);
  458. int ret = -ENOMEM;
  459. do {
  460. if (avail_mbytes < type->mbytes)
  461. return -ENOSPC;
  462. } while (!atomic_try_cmpxchg(&mbochs_avail_mbytes, &avail_mbytes,
  463. avail_mbytes - type->mbytes));
  464. mdev_state->vconfig = kzalloc(MBOCHS_CONFIG_SPACE_SIZE, GFP_KERNEL);
  465. if (!mdev_state->vconfig)
  466. goto err_avail;
  467. mdev_state->memsize = type->mbytes * 1024 * 1024;
  468. mdev_state->pagecount = mdev_state->memsize >> PAGE_SHIFT;
  469. mdev_state->pages = kcalloc(mdev_state->pagecount,
  470. sizeof(struct page *),
  471. GFP_KERNEL);
  472. if (!mdev_state->pages)
  473. goto err_vconfig;
  474. mutex_init(&mdev_state->ops_lock);
  475. mdev_state->mdev = mdev;
  476. INIT_LIST_HEAD(&mdev_state->dmabufs);
  477. mdev_state->next_id = 1;
  478. mdev_state->type = type;
  479. mdev_state->edid_regs.max_xres = type->max_x;
  480. mdev_state->edid_regs.max_yres = type->max_y;
  481. mdev_state->edid_regs.edid_offset = MBOCHS_EDID_BLOB_OFFSET;
  482. mdev_state->edid_regs.edid_max_size = sizeof(mdev_state->edid_blob);
  483. mbochs_create_config_space(mdev_state);
  484. mbochs_reset(mdev_state);
  485. dev_info(vdev->dev, "%s: %s, %d MB, %ld pages\n", __func__,
  486. type->type.pretty_name, type->mbytes, mdev_state->pagecount);
  487. return 0;
  488. err_vconfig:
  489. kfree(mdev_state->vconfig);
  490. err_avail:
  491. atomic_add(type->mbytes, &mbochs_avail_mbytes);
  492. return ret;
  493. }
  494. static int mbochs_probe(struct mdev_device *mdev)
  495. {
  496. struct mdev_state *mdev_state;
  497. int ret = -ENOMEM;
  498. mdev_state = vfio_alloc_device(mdev_state, vdev, &mdev->dev,
  499. &mbochs_dev_ops);
  500. if (IS_ERR(mdev_state))
  501. return PTR_ERR(mdev_state);
  502. ret = vfio_register_emulated_iommu_dev(&mdev_state->vdev);
  503. if (ret)
  504. goto err_put_vdev;
  505. dev_set_drvdata(&mdev->dev, mdev_state);
  506. return 0;
  507. err_put_vdev:
  508. vfio_put_device(&mdev_state->vdev);
  509. return ret;
  510. }
  511. static void mbochs_release_dev(struct vfio_device *vdev)
  512. {
  513. struct mdev_state *mdev_state =
  514. container_of(vdev, struct mdev_state, vdev);
  515. atomic_add(mdev_state->type->mbytes, &mbochs_avail_mbytes);
  516. kfree(mdev_state->pages);
  517. kfree(mdev_state->vconfig);
  518. vfio_free_device(vdev);
  519. }
  520. static void mbochs_remove(struct mdev_device *mdev)
  521. {
  522. struct mdev_state *mdev_state = dev_get_drvdata(&mdev->dev);
  523. vfio_unregister_group_dev(&mdev_state->vdev);
  524. vfio_put_device(&mdev_state->vdev);
  525. }
  526. static ssize_t mbochs_read(struct vfio_device *vdev, char __user *buf,
  527. size_t count, loff_t *ppos)
  528. {
  529. struct mdev_state *mdev_state =
  530. container_of(vdev, struct mdev_state, vdev);
  531. unsigned int done = 0;
  532. int ret;
  533. while (count) {
  534. size_t filled;
  535. if (count >= 4 && !(*ppos % 4)) {
  536. u32 val;
  537. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  538. *ppos, false);
  539. if (ret <= 0)
  540. goto read_err;
  541. if (copy_to_user(buf, &val, sizeof(val)))
  542. goto read_err;
  543. filled = 4;
  544. } else if (count >= 2 && !(*ppos % 2)) {
  545. u16 val;
  546. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  547. *ppos, false);
  548. if (ret <= 0)
  549. goto read_err;
  550. if (copy_to_user(buf, &val, sizeof(val)))
  551. goto read_err;
  552. filled = 2;
  553. } else {
  554. u8 val;
  555. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  556. *ppos, false);
  557. if (ret <= 0)
  558. goto read_err;
  559. if (copy_to_user(buf, &val, sizeof(val)))
  560. goto read_err;
  561. filled = 1;
  562. }
  563. count -= filled;
  564. done += filled;
  565. *ppos += filled;
  566. buf += filled;
  567. }
  568. return done;
  569. read_err:
  570. return -EFAULT;
  571. }
  572. static ssize_t mbochs_write(struct vfio_device *vdev, const char __user *buf,
  573. size_t count, loff_t *ppos)
  574. {
  575. struct mdev_state *mdev_state =
  576. container_of(vdev, struct mdev_state, vdev);
  577. unsigned int done = 0;
  578. int ret;
  579. while (count) {
  580. size_t filled;
  581. if (count >= 4 && !(*ppos % 4)) {
  582. u32 val;
  583. if (copy_from_user(&val, buf, sizeof(val)))
  584. goto write_err;
  585. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  586. *ppos, true);
  587. if (ret <= 0)
  588. goto write_err;
  589. filled = 4;
  590. } else if (count >= 2 && !(*ppos % 2)) {
  591. u16 val;
  592. if (copy_from_user(&val, buf, sizeof(val)))
  593. goto write_err;
  594. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  595. *ppos, true);
  596. if (ret <= 0)
  597. goto write_err;
  598. filled = 2;
  599. } else {
  600. u8 val;
  601. if (copy_from_user(&val, buf, sizeof(val)))
  602. goto write_err;
  603. ret = mdev_access(mdev_state, (char *)&val, sizeof(val),
  604. *ppos, true);
  605. if (ret <= 0)
  606. goto write_err;
  607. filled = 1;
  608. }
  609. count -= filled;
  610. done += filled;
  611. *ppos += filled;
  612. buf += filled;
  613. }
  614. return done;
  615. write_err:
  616. return -EFAULT;
  617. }
  618. static struct page *__mbochs_get_page(struct mdev_state *mdev_state,
  619. pgoff_t pgoff)
  620. {
  621. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  622. if (!mdev_state->pages[pgoff]) {
  623. mdev_state->pages[pgoff] =
  624. alloc_pages(GFP_HIGHUSER | __GFP_ZERO, 0);
  625. if (!mdev_state->pages[pgoff])
  626. return NULL;
  627. }
  628. get_page(mdev_state->pages[pgoff]);
  629. return mdev_state->pages[pgoff];
  630. }
  631. static struct page *mbochs_get_page(struct mdev_state *mdev_state,
  632. pgoff_t pgoff)
  633. {
  634. struct page *page;
  635. if (WARN_ON(pgoff >= mdev_state->pagecount))
  636. return NULL;
  637. mutex_lock(&mdev_state->ops_lock);
  638. page = __mbochs_get_page(mdev_state, pgoff);
  639. mutex_unlock(&mdev_state->ops_lock);
  640. return page;
  641. }
  642. static void mbochs_put_pages(struct mdev_state *mdev_state)
  643. {
  644. struct device *dev = mdev_dev(mdev_state->mdev);
  645. int i, count = 0;
  646. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  647. for (i = 0; i < mdev_state->pagecount; i++) {
  648. if (!mdev_state->pages[i])
  649. continue;
  650. put_page(mdev_state->pages[i]);
  651. mdev_state->pages[i] = NULL;
  652. count++;
  653. }
  654. dev_dbg(dev, "%s: %d pages released\n", __func__, count);
  655. }
  656. static vm_fault_t mbochs_region_vm_fault(struct vm_fault *vmf)
  657. {
  658. struct vm_area_struct *vma = vmf->vma;
  659. struct mdev_state *mdev_state = vma->vm_private_data;
  660. pgoff_t page_offset = (vmf->address - vma->vm_start) >> PAGE_SHIFT;
  661. if (page_offset >= mdev_state->pagecount)
  662. return VM_FAULT_SIGBUS;
  663. vmf->page = mbochs_get_page(mdev_state, page_offset);
  664. if (!vmf->page)
  665. return VM_FAULT_SIGBUS;
  666. return 0;
  667. }
  668. static const struct vm_operations_struct mbochs_region_vm_ops = {
  669. .fault = mbochs_region_vm_fault,
  670. };
  671. static int mbochs_mmap(struct vfio_device *vdev, struct vm_area_struct *vma)
  672. {
  673. struct mdev_state *mdev_state =
  674. container_of(vdev, struct mdev_state, vdev);
  675. if (vma->vm_pgoff != MBOCHS_MEMORY_BAR_OFFSET >> PAGE_SHIFT)
  676. return -EINVAL;
  677. if (vma->vm_end < vma->vm_start)
  678. return -EINVAL;
  679. if (vma->vm_end - vma->vm_start > mdev_state->memsize)
  680. return -EINVAL;
  681. if ((vma->vm_flags & VM_SHARED) == 0)
  682. return -EINVAL;
  683. vma->vm_ops = &mbochs_region_vm_ops;
  684. vma->vm_private_data = mdev_state;
  685. return 0;
  686. }
  687. static vm_fault_t mbochs_dmabuf_vm_fault(struct vm_fault *vmf)
  688. {
  689. struct vm_area_struct *vma = vmf->vma;
  690. struct mbochs_dmabuf *dmabuf = vma->vm_private_data;
  691. if (WARN_ON(vmf->pgoff >= dmabuf->pagecount))
  692. return VM_FAULT_SIGBUS;
  693. vmf->page = dmabuf->pages[vmf->pgoff];
  694. get_page(vmf->page);
  695. return 0;
  696. }
  697. static const struct vm_operations_struct mbochs_dmabuf_vm_ops = {
  698. .fault = mbochs_dmabuf_vm_fault,
  699. };
  700. static int mbochs_mmap_dmabuf(struct dma_buf *buf, struct vm_area_struct *vma)
  701. {
  702. struct mbochs_dmabuf *dmabuf = buf->priv;
  703. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  704. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  705. if ((vma->vm_flags & VM_SHARED) == 0)
  706. return -EINVAL;
  707. vma->vm_ops = &mbochs_dmabuf_vm_ops;
  708. vma->vm_private_data = dmabuf;
  709. return 0;
  710. }
  711. static void mbochs_print_dmabuf(struct mbochs_dmabuf *dmabuf,
  712. const char *prefix)
  713. {
  714. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  715. u32 fourcc = dmabuf->mode.drm_format;
  716. dev_dbg(dev, "%s/%d: %c%c%c%c, %dx%d, stride %d, off 0x%llx, size 0x%llx, pages %ld\n",
  717. prefix, dmabuf->id,
  718. fourcc ? ((fourcc >> 0) & 0xff) : '-',
  719. fourcc ? ((fourcc >> 8) & 0xff) : '-',
  720. fourcc ? ((fourcc >> 16) & 0xff) : '-',
  721. fourcc ? ((fourcc >> 24) & 0xff) : '-',
  722. dmabuf->mode.width, dmabuf->mode.height, dmabuf->mode.stride,
  723. dmabuf->mode.offset, dmabuf->mode.size, dmabuf->pagecount);
  724. }
  725. static struct sg_table *mbochs_map_dmabuf(struct dma_buf_attachment *at,
  726. enum dma_data_direction direction)
  727. {
  728. struct mbochs_dmabuf *dmabuf = at->dmabuf->priv;
  729. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  730. struct sg_table *sg;
  731. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  732. sg = kzalloc(sizeof(*sg), GFP_KERNEL);
  733. if (!sg)
  734. goto err1;
  735. if (sg_alloc_table_from_pages(sg, dmabuf->pages, dmabuf->pagecount,
  736. 0, dmabuf->mode.size, GFP_KERNEL) < 0)
  737. goto err2;
  738. if (dma_map_sgtable(at->dev, sg, direction, 0))
  739. goto err3;
  740. return sg;
  741. err3:
  742. sg_free_table(sg);
  743. err2:
  744. kfree(sg);
  745. err1:
  746. return ERR_PTR(-ENOMEM);
  747. }
  748. static void mbochs_unmap_dmabuf(struct dma_buf_attachment *at,
  749. struct sg_table *sg,
  750. enum dma_data_direction direction)
  751. {
  752. struct mbochs_dmabuf *dmabuf = at->dmabuf->priv;
  753. struct device *dev = mdev_dev(dmabuf->mdev_state->mdev);
  754. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  755. dma_unmap_sgtable(at->dev, sg, direction, 0);
  756. sg_free_table(sg);
  757. kfree(sg);
  758. }
  759. static void mbochs_release_dmabuf(struct dma_buf *buf)
  760. {
  761. struct mbochs_dmabuf *dmabuf = buf->priv;
  762. struct mdev_state *mdev_state = dmabuf->mdev_state;
  763. struct device *dev = mdev_dev(mdev_state->mdev);
  764. pgoff_t pg;
  765. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  766. for (pg = 0; pg < dmabuf->pagecount; pg++)
  767. put_page(dmabuf->pages[pg]);
  768. mutex_lock(&mdev_state->ops_lock);
  769. dmabuf->buf = NULL;
  770. if (dmabuf->unlinked)
  771. kfree(dmabuf);
  772. mutex_unlock(&mdev_state->ops_lock);
  773. }
  774. static struct dma_buf_ops mbochs_dmabuf_ops = {
  775. .map_dma_buf = mbochs_map_dmabuf,
  776. .unmap_dma_buf = mbochs_unmap_dmabuf,
  777. .release = mbochs_release_dmabuf,
  778. .mmap = mbochs_mmap_dmabuf,
  779. };
  780. static struct mbochs_dmabuf *mbochs_dmabuf_alloc(struct mdev_state *mdev_state,
  781. struct mbochs_mode *mode)
  782. {
  783. struct mbochs_dmabuf *dmabuf;
  784. pgoff_t page_offset, pg;
  785. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  786. dmabuf = kzalloc(sizeof(struct mbochs_dmabuf), GFP_KERNEL);
  787. if (!dmabuf)
  788. return NULL;
  789. dmabuf->mode = *mode;
  790. dmabuf->id = mdev_state->next_id++;
  791. dmabuf->pagecount = DIV_ROUND_UP(mode->size, PAGE_SIZE);
  792. dmabuf->pages = kcalloc(dmabuf->pagecount, sizeof(struct page *),
  793. GFP_KERNEL);
  794. if (!dmabuf->pages)
  795. goto err_free_dmabuf;
  796. page_offset = dmabuf->mode.offset >> PAGE_SHIFT;
  797. for (pg = 0; pg < dmabuf->pagecount; pg++) {
  798. dmabuf->pages[pg] = __mbochs_get_page(mdev_state,
  799. page_offset + pg);
  800. if (!dmabuf->pages[pg])
  801. goto err_free_pages;
  802. }
  803. dmabuf->mdev_state = mdev_state;
  804. list_add(&dmabuf->next, &mdev_state->dmabufs);
  805. mbochs_print_dmabuf(dmabuf, __func__);
  806. return dmabuf;
  807. err_free_pages:
  808. while (pg > 0)
  809. put_page(dmabuf->pages[--pg]);
  810. kfree(dmabuf->pages);
  811. err_free_dmabuf:
  812. kfree(dmabuf);
  813. return NULL;
  814. }
  815. static struct mbochs_dmabuf *
  816. mbochs_dmabuf_find_by_mode(struct mdev_state *mdev_state,
  817. struct mbochs_mode *mode)
  818. {
  819. struct mbochs_dmabuf *dmabuf;
  820. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  821. list_for_each_entry(dmabuf, &mdev_state->dmabufs, next)
  822. if (mbochs_modes_equal(&dmabuf->mode, mode))
  823. return dmabuf;
  824. return NULL;
  825. }
  826. static struct mbochs_dmabuf *
  827. mbochs_dmabuf_find_by_id(struct mdev_state *mdev_state, u32 id)
  828. {
  829. struct mbochs_dmabuf *dmabuf;
  830. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  831. list_for_each_entry(dmabuf, &mdev_state->dmabufs, next)
  832. if (dmabuf->id == id)
  833. return dmabuf;
  834. return NULL;
  835. }
  836. static int mbochs_dmabuf_export(struct mbochs_dmabuf *dmabuf)
  837. {
  838. struct mdev_state *mdev_state = dmabuf->mdev_state;
  839. struct device *dev = mdev_state->vdev.dev;
  840. DEFINE_DMA_BUF_EXPORT_INFO(exp_info);
  841. struct dma_buf *buf;
  842. WARN_ON(!mutex_is_locked(&mdev_state->ops_lock));
  843. if (!IS_ALIGNED(dmabuf->mode.offset, PAGE_SIZE)) {
  844. dev_info_ratelimited(dev, "%s: framebuffer not page-aligned\n",
  845. __func__);
  846. return -EINVAL;
  847. }
  848. exp_info.ops = &mbochs_dmabuf_ops;
  849. exp_info.size = dmabuf->mode.size;
  850. exp_info.priv = dmabuf;
  851. buf = dma_buf_export(&exp_info);
  852. if (IS_ERR(buf)) {
  853. dev_info_ratelimited(dev, "%s: dma_buf_export failed: %ld\n",
  854. __func__, PTR_ERR(buf));
  855. return PTR_ERR(buf);
  856. }
  857. dmabuf->buf = buf;
  858. dev_dbg(dev, "%s: %d\n", __func__, dmabuf->id);
  859. return 0;
  860. }
  861. static int mbochs_get_region_info(struct mdev_state *mdev_state,
  862. struct vfio_region_info_ext *ext)
  863. {
  864. struct vfio_region_info *region_info = &ext->base;
  865. if (region_info->index >= MBOCHS_NUM_REGIONS)
  866. return -EINVAL;
  867. switch (region_info->index) {
  868. case VFIO_PCI_CONFIG_REGION_INDEX:
  869. region_info->offset = 0;
  870. region_info->size = MBOCHS_CONFIG_SPACE_SIZE;
  871. region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
  872. VFIO_REGION_INFO_FLAG_WRITE);
  873. break;
  874. case VFIO_PCI_BAR0_REGION_INDEX:
  875. region_info->offset = MBOCHS_MEMORY_BAR_OFFSET;
  876. region_info->size = mdev_state->memsize;
  877. region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
  878. VFIO_REGION_INFO_FLAG_WRITE |
  879. VFIO_REGION_INFO_FLAG_MMAP);
  880. break;
  881. case VFIO_PCI_BAR2_REGION_INDEX:
  882. region_info->offset = MBOCHS_MMIO_BAR_OFFSET;
  883. region_info->size = MBOCHS_MMIO_BAR_SIZE;
  884. region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
  885. VFIO_REGION_INFO_FLAG_WRITE);
  886. break;
  887. case MBOCHS_EDID_REGION_INDEX:
  888. ext->base.argsz = sizeof(*ext);
  889. ext->base.offset = MBOCHS_EDID_OFFSET;
  890. ext->base.size = MBOCHS_EDID_SIZE;
  891. ext->base.flags = (VFIO_REGION_INFO_FLAG_READ |
  892. VFIO_REGION_INFO_FLAG_WRITE |
  893. VFIO_REGION_INFO_FLAG_CAPS);
  894. ext->base.cap_offset = offsetof(typeof(*ext), type);
  895. ext->type.header.id = VFIO_REGION_INFO_CAP_TYPE;
  896. ext->type.header.version = 1;
  897. ext->type.header.next = 0;
  898. ext->type.type = VFIO_REGION_TYPE_GFX;
  899. ext->type.subtype = VFIO_REGION_SUBTYPE_GFX_EDID;
  900. break;
  901. default:
  902. region_info->size = 0;
  903. region_info->offset = 0;
  904. region_info->flags = 0;
  905. }
  906. return 0;
  907. }
  908. static int mbochs_get_irq_info(struct vfio_irq_info *irq_info)
  909. {
  910. irq_info->count = 0;
  911. return 0;
  912. }
  913. static int mbochs_get_device_info(struct vfio_device_info *dev_info)
  914. {
  915. dev_info->flags = VFIO_DEVICE_FLAGS_PCI;
  916. dev_info->num_regions = MBOCHS_NUM_REGIONS;
  917. dev_info->num_irqs = VFIO_PCI_NUM_IRQS;
  918. return 0;
  919. }
  920. static int mbochs_query_gfx_plane(struct mdev_state *mdev_state,
  921. struct vfio_device_gfx_plane_info *plane)
  922. {
  923. struct mbochs_dmabuf *dmabuf;
  924. struct mbochs_mode mode;
  925. int ret;
  926. if (plane->flags & VFIO_GFX_PLANE_TYPE_PROBE) {
  927. if (plane->flags == (VFIO_GFX_PLANE_TYPE_PROBE |
  928. VFIO_GFX_PLANE_TYPE_DMABUF))
  929. return 0;
  930. return -EINVAL;
  931. }
  932. if (plane->flags != VFIO_GFX_PLANE_TYPE_DMABUF)
  933. return -EINVAL;
  934. plane->drm_format_mod = 0;
  935. plane->x_pos = 0;
  936. plane->y_pos = 0;
  937. plane->x_hot = 0;
  938. plane->y_hot = 0;
  939. mutex_lock(&mdev_state->ops_lock);
  940. ret = -EINVAL;
  941. if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY)
  942. ret = mbochs_check_framebuffer(mdev_state, &mode);
  943. if (ret < 0) {
  944. plane->drm_format = 0;
  945. plane->width = 0;
  946. plane->height = 0;
  947. plane->stride = 0;
  948. plane->size = 0;
  949. plane->dmabuf_id = 0;
  950. goto done;
  951. }
  952. dmabuf = mbochs_dmabuf_find_by_mode(mdev_state, &mode);
  953. if (!dmabuf)
  954. mbochs_dmabuf_alloc(mdev_state, &mode);
  955. if (!dmabuf) {
  956. mutex_unlock(&mdev_state->ops_lock);
  957. return -ENOMEM;
  958. }
  959. plane->drm_format = dmabuf->mode.drm_format;
  960. plane->width = dmabuf->mode.width;
  961. plane->height = dmabuf->mode.height;
  962. plane->stride = dmabuf->mode.stride;
  963. plane->size = dmabuf->mode.size;
  964. plane->dmabuf_id = dmabuf->id;
  965. done:
  966. if (plane->drm_plane_type == DRM_PLANE_TYPE_PRIMARY &&
  967. mdev_state->active_id != plane->dmabuf_id) {
  968. dev_dbg(mdev_state->vdev.dev, "%s: primary: %d => %d\n",
  969. __func__, mdev_state->active_id, plane->dmabuf_id);
  970. mdev_state->active_id = plane->dmabuf_id;
  971. }
  972. mutex_unlock(&mdev_state->ops_lock);
  973. return 0;
  974. }
  975. static int mbochs_get_gfx_dmabuf(struct mdev_state *mdev_state, u32 id)
  976. {
  977. struct mbochs_dmabuf *dmabuf;
  978. mutex_lock(&mdev_state->ops_lock);
  979. dmabuf = mbochs_dmabuf_find_by_id(mdev_state, id);
  980. if (!dmabuf) {
  981. mutex_unlock(&mdev_state->ops_lock);
  982. return -ENOENT;
  983. }
  984. if (!dmabuf->buf)
  985. mbochs_dmabuf_export(dmabuf);
  986. mutex_unlock(&mdev_state->ops_lock);
  987. if (!dmabuf->buf)
  988. return -EINVAL;
  989. return dma_buf_fd(dmabuf->buf, 0);
  990. }
  991. static long mbochs_ioctl(struct vfio_device *vdev, unsigned int cmd,
  992. unsigned long arg)
  993. {
  994. struct mdev_state *mdev_state =
  995. container_of(vdev, struct mdev_state, vdev);
  996. int ret = 0;
  997. unsigned long minsz, outsz;
  998. switch (cmd) {
  999. case VFIO_DEVICE_GET_INFO:
  1000. {
  1001. struct vfio_device_info info;
  1002. minsz = offsetofend(struct vfio_device_info, num_irqs);
  1003. if (copy_from_user(&info, (void __user *)arg, minsz))
  1004. return -EFAULT;
  1005. if (info.argsz < minsz)
  1006. return -EINVAL;
  1007. ret = mbochs_get_device_info(&info);
  1008. if (ret)
  1009. return ret;
  1010. if (copy_to_user((void __user *)arg, &info, minsz))
  1011. return -EFAULT;
  1012. return 0;
  1013. }
  1014. case VFIO_DEVICE_GET_REGION_INFO:
  1015. {
  1016. struct vfio_region_info_ext info;
  1017. minsz = offsetofend(typeof(info), base.offset);
  1018. if (copy_from_user(&info, (void __user *)arg, minsz))
  1019. return -EFAULT;
  1020. outsz = info.base.argsz;
  1021. if (outsz < minsz)
  1022. return -EINVAL;
  1023. if (outsz > sizeof(info))
  1024. return -EINVAL;
  1025. ret = mbochs_get_region_info(mdev_state, &info);
  1026. if (ret)
  1027. return ret;
  1028. if (copy_to_user((void __user *)arg, &info, outsz))
  1029. return -EFAULT;
  1030. return 0;
  1031. }
  1032. case VFIO_DEVICE_GET_IRQ_INFO:
  1033. {
  1034. struct vfio_irq_info info;
  1035. minsz = offsetofend(struct vfio_irq_info, count);
  1036. if (copy_from_user(&info, (void __user *)arg, minsz))
  1037. return -EFAULT;
  1038. if ((info.argsz < minsz) ||
  1039. (info.index >= VFIO_PCI_NUM_IRQS))
  1040. return -EINVAL;
  1041. ret = mbochs_get_irq_info(&info);
  1042. if (ret)
  1043. return ret;
  1044. if (copy_to_user((void __user *)arg, &info, minsz))
  1045. return -EFAULT;
  1046. return 0;
  1047. }
  1048. case VFIO_DEVICE_QUERY_GFX_PLANE:
  1049. {
  1050. struct vfio_device_gfx_plane_info plane;
  1051. minsz = offsetofend(struct vfio_device_gfx_plane_info,
  1052. region_index);
  1053. if (copy_from_user(&plane, (void __user *)arg, minsz))
  1054. return -EFAULT;
  1055. if (plane.argsz < minsz)
  1056. return -EINVAL;
  1057. ret = mbochs_query_gfx_plane(mdev_state, &plane);
  1058. if (ret)
  1059. return ret;
  1060. if (copy_to_user((void __user *)arg, &plane, minsz))
  1061. return -EFAULT;
  1062. return 0;
  1063. }
  1064. case VFIO_DEVICE_GET_GFX_DMABUF:
  1065. {
  1066. u32 dmabuf_id;
  1067. if (get_user(dmabuf_id, (__u32 __user *)arg))
  1068. return -EFAULT;
  1069. return mbochs_get_gfx_dmabuf(mdev_state, dmabuf_id);
  1070. }
  1071. case VFIO_DEVICE_SET_IRQS:
  1072. return -EINVAL;
  1073. case VFIO_DEVICE_RESET:
  1074. return mbochs_reset(mdev_state);
  1075. }
  1076. return -ENOTTY;
  1077. }
  1078. static void mbochs_close_device(struct vfio_device *vdev)
  1079. {
  1080. struct mdev_state *mdev_state =
  1081. container_of(vdev, struct mdev_state, vdev);
  1082. struct mbochs_dmabuf *dmabuf, *tmp;
  1083. mutex_lock(&mdev_state->ops_lock);
  1084. list_for_each_entry_safe(dmabuf, tmp, &mdev_state->dmabufs, next) {
  1085. list_del(&dmabuf->next);
  1086. if (dmabuf->buf) {
  1087. /* free in mbochs_release_dmabuf() */
  1088. dmabuf->unlinked = true;
  1089. } else {
  1090. kfree(dmabuf);
  1091. }
  1092. }
  1093. mbochs_put_pages(mdev_state);
  1094. mutex_unlock(&mdev_state->ops_lock);
  1095. }
  1096. static ssize_t
  1097. memory_show(struct device *dev, struct device_attribute *attr,
  1098. char *buf)
  1099. {
  1100. struct mdev_state *mdev_state = dev_get_drvdata(dev);
  1101. return sprintf(buf, "%d MB\n", mdev_state->type->mbytes);
  1102. }
  1103. static DEVICE_ATTR_RO(memory);
  1104. static struct attribute *mdev_dev_attrs[] = {
  1105. &dev_attr_memory.attr,
  1106. NULL,
  1107. };
  1108. static const struct attribute_group mdev_dev_group = {
  1109. .name = "vendor",
  1110. .attrs = mdev_dev_attrs,
  1111. };
  1112. static const struct attribute_group *mdev_dev_groups[] = {
  1113. &mdev_dev_group,
  1114. NULL,
  1115. };
  1116. static ssize_t mbochs_show_description(struct mdev_type *mtype, char *buf)
  1117. {
  1118. struct mbochs_type *type =
  1119. container_of(mtype, struct mbochs_type, type);
  1120. return sprintf(buf, "virtual display, %d MB video memory\n",
  1121. type ? type->mbytes : 0);
  1122. }
  1123. static unsigned int mbochs_get_available(struct mdev_type *mtype)
  1124. {
  1125. struct mbochs_type *type =
  1126. container_of(mtype, struct mbochs_type, type);
  1127. return atomic_read(&mbochs_avail_mbytes) / type->mbytes;
  1128. }
  1129. static const struct vfio_device_ops mbochs_dev_ops = {
  1130. .close_device = mbochs_close_device,
  1131. .init = mbochs_init_dev,
  1132. .release = mbochs_release_dev,
  1133. .read = mbochs_read,
  1134. .write = mbochs_write,
  1135. .ioctl = mbochs_ioctl,
  1136. .mmap = mbochs_mmap,
  1137. };
  1138. static struct mdev_driver mbochs_driver = {
  1139. .device_api = VFIO_DEVICE_API_PCI_STRING,
  1140. .driver = {
  1141. .name = "mbochs",
  1142. .owner = THIS_MODULE,
  1143. .mod_name = KBUILD_MODNAME,
  1144. .dev_groups = mdev_dev_groups,
  1145. },
  1146. .probe = mbochs_probe,
  1147. .remove = mbochs_remove,
  1148. .get_available = mbochs_get_available,
  1149. .show_description = mbochs_show_description,
  1150. };
  1151. static const struct file_operations vd_fops = {
  1152. .owner = THIS_MODULE,
  1153. };
  1154. static void mbochs_device_release(struct device *dev)
  1155. {
  1156. /* nothing */
  1157. }
  1158. static int __init mbochs_dev_init(void)
  1159. {
  1160. int ret = 0;
  1161. atomic_set(&mbochs_avail_mbytes, max_mbytes);
  1162. ret = alloc_chrdev_region(&mbochs_devt, 0, MINORMASK + 1, MBOCHS_NAME);
  1163. if (ret < 0) {
  1164. pr_err("Error: failed to register mbochs_dev, err: %d\n", ret);
  1165. return ret;
  1166. }
  1167. cdev_init(&mbochs_cdev, &vd_fops);
  1168. cdev_add(&mbochs_cdev, mbochs_devt, MINORMASK + 1);
  1169. pr_info("%s: major %d\n", __func__, MAJOR(mbochs_devt));
  1170. ret = mdev_register_driver(&mbochs_driver);
  1171. if (ret)
  1172. goto err_cdev;
  1173. mbochs_class = class_create(THIS_MODULE, MBOCHS_CLASS_NAME);
  1174. if (IS_ERR(mbochs_class)) {
  1175. pr_err("Error: failed to register mbochs_dev class\n");
  1176. ret = PTR_ERR(mbochs_class);
  1177. goto err_driver;
  1178. }
  1179. mbochs_dev.class = mbochs_class;
  1180. mbochs_dev.release = mbochs_device_release;
  1181. dev_set_name(&mbochs_dev, "%s", MBOCHS_NAME);
  1182. ret = device_register(&mbochs_dev);
  1183. if (ret)
  1184. goto err_class;
  1185. ret = mdev_register_parent(&mbochs_parent, &mbochs_dev, &mbochs_driver,
  1186. mbochs_mdev_types,
  1187. ARRAY_SIZE(mbochs_mdev_types));
  1188. if (ret)
  1189. goto err_device;
  1190. return 0;
  1191. err_device:
  1192. device_unregister(&mbochs_dev);
  1193. err_class:
  1194. class_destroy(mbochs_class);
  1195. err_driver:
  1196. mdev_unregister_driver(&mbochs_driver);
  1197. err_cdev:
  1198. cdev_del(&mbochs_cdev);
  1199. unregister_chrdev_region(mbochs_devt, MINORMASK + 1);
  1200. return ret;
  1201. }
  1202. static void __exit mbochs_dev_exit(void)
  1203. {
  1204. mbochs_dev.bus = NULL;
  1205. mdev_unregister_parent(&mbochs_parent);
  1206. device_unregister(&mbochs_dev);
  1207. mdev_unregister_driver(&mbochs_driver);
  1208. cdev_del(&mbochs_cdev);
  1209. unregister_chrdev_region(mbochs_devt, MINORMASK + 1);
  1210. class_destroy(mbochs_class);
  1211. mbochs_class = NULL;
  1212. }
  1213. MODULE_IMPORT_NS(DMA_BUF);
  1214. module_init(mbochs_dev_init)
  1215. module_exit(mbochs_dev_exit)