debugfs.c 7.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261
  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright 2017 Thomas Gleixner <[email protected]>
  3. #include <linux/irqdomain.h>
  4. #include <linux/irq.h>
  5. #include <linux/uaccess.h>
  6. #include "internals.h"
  7. static struct dentry *irq_dir;
  8. struct irq_bit_descr {
  9. unsigned int mask;
  10. char *name;
  11. };
  12. #define BIT_MASK_DESCR(m) { .mask = m, .name = #m }
  13. static void irq_debug_show_bits(struct seq_file *m, int ind, unsigned int state,
  14. const struct irq_bit_descr *sd, int size)
  15. {
  16. int i;
  17. for (i = 0; i < size; i++, sd++) {
  18. if (state & sd->mask)
  19. seq_printf(m, "%*s%s\n", ind + 12, "", sd->name);
  20. }
  21. }
  22. #ifdef CONFIG_SMP
  23. static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc)
  24. {
  25. struct irq_data *data = irq_desc_get_irq_data(desc);
  26. const struct cpumask *msk;
  27. msk = irq_data_get_affinity_mask(data);
  28. seq_printf(m, "affinity: %*pbl\n", cpumask_pr_args(msk));
  29. #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
  30. msk = irq_data_get_effective_affinity_mask(data);
  31. seq_printf(m, "effectiv: %*pbl\n", cpumask_pr_args(msk));
  32. #endif
  33. #ifdef CONFIG_GENERIC_PENDING_IRQ
  34. msk = desc->pending_mask;
  35. seq_printf(m, "pending: %*pbl\n", cpumask_pr_args(msk));
  36. #endif
  37. }
  38. #else
  39. static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { }
  40. #endif
  41. static const struct irq_bit_descr irqchip_flags[] = {
  42. BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED),
  43. BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED),
  44. BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND),
  45. BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED),
  46. BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
  47. BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
  48. BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
  49. BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI),
  50. BIT_MASK_DESCR(IRQCHIP_SUPPORTS_NMI),
  51. BIT_MASK_DESCR(IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND),
  52. BIT_MASK_DESCR(IRQCHIP_IMMUTABLE),
  53. };
  54. static void
  55. irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind)
  56. {
  57. struct irq_chip *chip = data->chip;
  58. if (!chip) {
  59. seq_printf(m, "chip: None\n");
  60. return;
  61. }
  62. seq_printf(m, "%*schip: ", ind, "");
  63. if (chip->irq_print_chip)
  64. chip->irq_print_chip(data, m);
  65. else
  66. seq_printf(m, "%s", chip->name);
  67. seq_printf(m, "\n%*sflags: 0x%lx\n", ind + 1, "", chip->flags);
  68. irq_debug_show_bits(m, ind, chip->flags, irqchip_flags,
  69. ARRAY_SIZE(irqchip_flags));
  70. }
  71. static void
  72. irq_debug_show_data(struct seq_file *m, struct irq_data *data, int ind)
  73. {
  74. seq_printf(m, "%*sdomain: %s\n", ind, "",
  75. data->domain ? data->domain->name : "");
  76. seq_printf(m, "%*shwirq: 0x%lx\n", ind + 1, "", data->hwirq);
  77. irq_debug_show_chip(m, data, ind + 1);
  78. if (data->domain && data->domain->ops && data->domain->ops->debug_show)
  79. data->domain->ops->debug_show(m, NULL, data, ind + 1);
  80. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  81. if (!data->parent_data)
  82. return;
  83. seq_printf(m, "%*sparent:\n", ind + 1, "");
  84. irq_debug_show_data(m, data->parent_data, ind + 4);
  85. #endif
  86. }
  87. static const struct irq_bit_descr irqdata_states[] = {
  88. BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING),
  89. BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING),
  90. BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH),
  91. BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW),
  92. BIT_MASK_DESCR(IRQD_LEVEL),
  93. BIT_MASK_DESCR(IRQD_ACTIVATED),
  94. BIT_MASK_DESCR(IRQD_IRQ_STARTED),
  95. BIT_MASK_DESCR(IRQD_IRQ_DISABLED),
  96. BIT_MASK_DESCR(IRQD_IRQ_MASKED),
  97. BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS),
  98. BIT_MASK_DESCR(IRQD_PER_CPU),
  99. BIT_MASK_DESCR(IRQD_NO_BALANCING),
  100. BIT_MASK_DESCR(IRQD_SINGLE_TARGET),
  101. BIT_MASK_DESCR(IRQD_MOVE_PCNTXT),
  102. BIT_MASK_DESCR(IRQD_AFFINITY_SET),
  103. BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING),
  104. BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED),
  105. BIT_MASK_DESCR(IRQD_AFFINITY_ON_ACTIVATE),
  106. BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN),
  107. BIT_MASK_DESCR(IRQD_CAN_RESERVE),
  108. BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU),
  109. BIT_MASK_DESCR(IRQD_WAKEUP_STATE),
  110. BIT_MASK_DESCR(IRQD_WAKEUP_ARMED),
  111. BIT_MASK_DESCR(IRQD_DEFAULT_TRIGGER_SET),
  112. BIT_MASK_DESCR(IRQD_HANDLE_ENFORCE_IRQCTX),
  113. BIT_MASK_DESCR(IRQD_IRQ_ENABLED_ON_SUSPEND),
  114. };
  115. static const struct irq_bit_descr irqdesc_states[] = {
  116. BIT_MASK_DESCR(_IRQ_NOPROBE),
  117. BIT_MASK_DESCR(_IRQ_NOREQUEST),
  118. BIT_MASK_DESCR(_IRQ_NOTHREAD),
  119. BIT_MASK_DESCR(_IRQ_NOAUTOEN),
  120. BIT_MASK_DESCR(_IRQ_NESTED_THREAD),
  121. BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID),
  122. BIT_MASK_DESCR(_IRQ_IS_POLLED),
  123. BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY),
  124. BIT_MASK_DESCR(_IRQ_HIDDEN),
  125. };
  126. static const struct irq_bit_descr irqdesc_istates[] = {
  127. BIT_MASK_DESCR(IRQS_AUTODETECT),
  128. BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED),
  129. BIT_MASK_DESCR(IRQS_POLL_INPROGRESS),
  130. BIT_MASK_DESCR(IRQS_ONESHOT),
  131. BIT_MASK_DESCR(IRQS_REPLAY),
  132. BIT_MASK_DESCR(IRQS_WAITING),
  133. BIT_MASK_DESCR(IRQS_PENDING),
  134. BIT_MASK_DESCR(IRQS_SUSPENDED),
  135. BIT_MASK_DESCR(IRQS_NMI),
  136. };
  137. static int irq_debug_show(struct seq_file *m, void *p)
  138. {
  139. struct irq_desc *desc = m->private;
  140. struct irq_data *data;
  141. raw_spin_lock_irq(&desc->lock);
  142. data = irq_desc_get_irq_data(desc);
  143. seq_printf(m, "handler: %ps\n", desc->handle_irq);
  144. seq_printf(m, "device: %s\n", desc->dev_name);
  145. seq_printf(m, "status: 0x%08x\n", desc->status_use_accessors);
  146. irq_debug_show_bits(m, 0, desc->status_use_accessors, irqdesc_states,
  147. ARRAY_SIZE(irqdesc_states));
  148. seq_printf(m, "istate: 0x%08x\n", desc->istate);
  149. irq_debug_show_bits(m, 0, desc->istate, irqdesc_istates,
  150. ARRAY_SIZE(irqdesc_istates));
  151. seq_printf(m, "ddepth: %u\n", desc->depth);
  152. seq_printf(m, "wdepth: %u\n", desc->wake_depth);
  153. seq_printf(m, "dstate: 0x%08x\n", irqd_get(data));
  154. irq_debug_show_bits(m, 0, irqd_get(data), irqdata_states,
  155. ARRAY_SIZE(irqdata_states));
  156. seq_printf(m, "node: %d\n", irq_data_get_node(data));
  157. irq_debug_show_masks(m, desc);
  158. irq_debug_show_data(m, data, 0);
  159. raw_spin_unlock_irq(&desc->lock);
  160. return 0;
  161. }
  162. static int irq_debug_open(struct inode *inode, struct file *file)
  163. {
  164. return single_open(file, irq_debug_show, inode->i_private);
  165. }
  166. static ssize_t irq_debug_write(struct file *file, const char __user *user_buf,
  167. size_t count, loff_t *ppos)
  168. {
  169. struct irq_desc *desc = file_inode(file)->i_private;
  170. char buf[8] = { 0, };
  171. size_t size;
  172. size = min(sizeof(buf) - 1, count);
  173. if (copy_from_user(buf, user_buf, size))
  174. return -EFAULT;
  175. if (!strncmp(buf, "trigger", size)) {
  176. int err = irq_inject_interrupt(irq_desc_get_irq(desc));
  177. return err ? err : count;
  178. }
  179. return count;
  180. }
  181. static const struct file_operations dfs_irq_ops = {
  182. .open = irq_debug_open,
  183. .write = irq_debug_write,
  184. .read = seq_read,
  185. .llseek = seq_lseek,
  186. .release = single_release,
  187. };
  188. void irq_debugfs_copy_devname(int irq, struct device *dev)
  189. {
  190. struct irq_desc *desc = irq_to_desc(irq);
  191. const char *name = dev_name(dev);
  192. if (name)
  193. desc->dev_name = kstrdup(name, GFP_KERNEL);
  194. }
  195. void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc)
  196. {
  197. char name [10];
  198. if (!irq_dir || !desc || desc->debugfs_file)
  199. return;
  200. sprintf(name, "%d", irq);
  201. desc->debugfs_file = debugfs_create_file(name, 0644, irq_dir, desc,
  202. &dfs_irq_ops);
  203. }
  204. static int __init irq_debugfs_init(void)
  205. {
  206. struct dentry *root_dir;
  207. int irq;
  208. root_dir = debugfs_create_dir("irq", NULL);
  209. irq_domain_debugfs_init(root_dir);
  210. irq_dir = debugfs_create_dir("irqs", root_dir);
  211. irq_lock_sparse();
  212. for_each_active_irq(irq)
  213. irq_add_debugfs_entry(irq, irq_to_desc(irq));
  214. irq_unlock_sparse();
  215. return 0;
  216. }
  217. __initcall(irq_debugfs_init);