dma-buf.h 7.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
  2. /*
  3. * Framework for buffer objects that can be shared across devices/subsystems.
  4. *
  5. * Copyright(C) 2015 Intel Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #ifndef _DMA_BUF_UAPI_H_
  20. #define _DMA_BUF_UAPI_H_
  21. #include <linux/types.h>
  22. /**
  23. * struct dma_buf_sync - Synchronize with CPU access.
  24. *
  25. * When a DMA buffer is accessed from the CPU via mmap, it is not always
  26. * possible to guarantee coherency between the CPU-visible map and underlying
  27. * memory. To manage coherency, DMA_BUF_IOCTL_SYNC must be used to bracket
  28. * any CPU access to give the kernel the chance to shuffle memory around if
  29. * needed.
  30. *
  31. * Prior to accessing the map, the client must call DMA_BUF_IOCTL_SYNC
  32. * with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
  33. * access is complete, the client should call DMA_BUF_IOCTL_SYNC with
  34. * DMA_BUF_SYNC_END and the same read/write flags.
  35. *
  36. * The synchronization provided via DMA_BUF_IOCTL_SYNC only provides cache
  37. * coherency. It does not prevent other processes or devices from
  38. * accessing the memory at the same time. If synchronization with a GPU or
  39. * other device driver is required, it is the client's responsibility to
  40. * wait for buffer to be ready for reading or writing before calling this
  41. * ioctl with DMA_BUF_SYNC_START. Likewise, the client must ensure that
  42. * follow-up work is not submitted to GPU or other device driver until
  43. * after this ioctl has been called with DMA_BUF_SYNC_END?
  44. *
  45. * If the driver or API with which the client is interacting uses implicit
  46. * synchronization, waiting for prior work to complete can be done via
  47. * poll() on the DMA buffer file descriptor. If the driver or API requires
  48. * explicit synchronization, the client may have to wait on a sync_file or
  49. * other synchronization primitive outside the scope of the DMA buffer API.
  50. */
  51. struct dma_buf_sync {
  52. /**
  53. * @flags: Set of access flags
  54. *
  55. * DMA_BUF_SYNC_START:
  56. * Indicates the start of a map access session.
  57. *
  58. * DMA_BUF_SYNC_END:
  59. * Indicates the end of a map access session.
  60. *
  61. * DMA_BUF_SYNC_READ:
  62. * Indicates that the mapped DMA buffer will be read by the
  63. * client via the CPU map.
  64. *
  65. * DMA_BUF_SYNC_WRITE:
  66. * Indicates that the mapped DMA buffer will be written by the
  67. * client via the CPU map.
  68. *
  69. * DMA_BUF_SYNC_RW:
  70. * An alias for DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE.
  71. */
  72. __u64 flags;
  73. };
  74. #define DMA_BUF_SYNC_READ (1 << 0)
  75. #define DMA_BUF_SYNC_WRITE (2 << 0)
  76. #define DMA_BUF_SYNC_RW (DMA_BUF_SYNC_READ | DMA_BUF_SYNC_WRITE)
  77. #define DMA_BUF_SYNC_START (0 << 2)
  78. #define DMA_BUF_SYNC_END (1 << 2)
  79. #define DMA_BUF_SYNC_VALID_FLAGS_MASK \
  80. (DMA_BUF_SYNC_RW | DMA_BUF_SYNC_END)
  81. #define DMA_BUF_NAME_LEN 32
  82. /**
  83. * struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
  84. *
  85. * Userspace can perform a DMA_BUF_IOCTL_EXPORT_SYNC_FILE to retrieve the
  86. * current set of fences on a dma-buf file descriptor as a sync_file. CPU
  87. * waits via poll() or other driver-specific mechanisms typically wait on
  88. * whatever fences are on the dma-buf at the time the wait begins. This
  89. * is similar except that it takes a snapshot of the current fences on the
  90. * dma-buf for waiting later instead of waiting immediately. This is
  91. * useful for modern graphics APIs such as Vulkan which assume an explicit
  92. * synchronization model but still need to inter-operate with dma-buf.
  93. *
  94. * The intended usage pattern is the following:
  95. *
  96. * 1. Export a sync_file with flags corresponding to the expected GPU usage
  97. * via DMA_BUF_IOCTL_EXPORT_SYNC_FILE.
  98. *
  99. * 2. Submit rendering work which uses the dma-buf. The work should wait on
  100. * the exported sync file before rendering and produce another sync_file
  101. * when complete.
  102. *
  103. * 3. Import the rendering-complete sync_file into the dma-buf with flags
  104. * corresponding to the GPU usage via DMA_BUF_IOCTL_IMPORT_SYNC_FILE.
  105. *
  106. * Unlike doing implicit synchronization via a GPU kernel driver's exec ioctl,
  107. * the above is not a single atomic operation. If userspace wants to ensure
  108. * ordering via these fences, it is the respnosibility of userspace to use
  109. * locks or other mechanisms to ensure that no other context adds fences or
  110. * submits work between steps 1 and 3 above.
  111. */
  112. struct dma_buf_export_sync_file {
  113. /**
  114. * @flags: Read/write flags
  115. *
  116. * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
  117. *
  118. * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
  119. * the returned sync file waits on any writers of the dma-buf to
  120. * complete. Waiting on the returned sync file is equivalent to
  121. * poll() with POLLIN.
  122. *
  123. * If DMA_BUF_SYNC_WRITE is set, the returned sync file waits on
  124. * any users of the dma-buf (read or write) to complete. Waiting
  125. * on the returned sync file is equivalent to poll() with POLLOUT.
  126. * If both DMA_BUF_SYNC_WRITE and DMA_BUF_SYNC_READ are set, this
  127. * is equivalent to just DMA_BUF_SYNC_WRITE.
  128. */
  129. __u32 flags;
  130. /** @fd: Returned sync file descriptor */
  131. __s32 fd;
  132. };
  133. /**
  134. * struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
  135. *
  136. * Userspace can perform a DMA_BUF_IOCTL_IMPORT_SYNC_FILE to insert a
  137. * sync_file into a dma-buf for the purposes of implicit synchronization
  138. * with other dma-buf consumers. This allows clients using explicitly
  139. * synchronized APIs such as Vulkan to inter-op with dma-buf consumers
  140. * which expect implicit synchronization such as OpenGL or most media
  141. * drivers/video.
  142. */
  143. struct dma_buf_import_sync_file {
  144. /**
  145. * @flags: Read/write flags
  146. *
  147. * Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
  148. *
  149. * If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
  150. * this inserts the sync_file as a read-only fence. Any subsequent
  151. * implicitly synchronized writes to this dma-buf will wait on this
  152. * fence but reads will not.
  153. *
  154. * If DMA_BUF_SYNC_WRITE is set, this inserts the sync_file as a
  155. * write fence. All subsequent implicitly synchronized access to
  156. * this dma-buf will wait on this fence.
  157. */
  158. __u32 flags;
  159. /** @fd: Sync file descriptor */
  160. __s32 fd;
  161. };
  162. #define DMA_BUF_BASE 'b'
  163. #define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
  164. /* 32/64bitness of this uapi was botched in android, there's no difference
  165. * between them in actual uapi, they're just different numbers.
  166. */
  167. #define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
  168. #define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32)
  169. #define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64)
  170. #define DMA_BUF_IOCTL_EXPORT_SYNC_FILE _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
  171. #define DMA_BUF_IOCTL_IMPORT_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)
  172. #endif