pmu_lib.h 2.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #ifndef _QCOM_PMU_H
  7. #define _QCOM_PMU_H
  8. #include <linux/kernel.h>
  9. #include <linux/scmi_protocol.h>
  10. #if !IS_ENABLED(CONFIG_QTI_SCMI_VENDOR_PROTOCOL)
  11. #include <linux/scmi_pmu.h>
  12. #endif
  13. /* (1) ccntr + (6) evcntr + (1) llcc */
  14. #define QCOM_PMU_MAX_EVS 8
  15. #define INVALID_PMU_HW_IDX 0xFF
  16. enum cpucp_ev_idx {
  17. CPU_CYC_EVT = 0,
  18. CNT_CYC_EVT,
  19. INST_RETIRED_EVT,
  20. STALL_BACKEND_EVT,
  21. L2D_CACHE_REFILL_EVT,
  22. L2D_WB_EVT,
  23. L3_CACHE_REFILL_EVT,
  24. L3_ACCESS_EVT,
  25. LLCC_CACHE_REFILL_EVT,
  26. MAX_CPUCP_EVT,
  27. };
  28. struct cpucp_hlos_map {
  29. bool shared;
  30. unsigned long cpus;
  31. };
  32. struct qcom_pmu_data {
  33. u32 event_ids[QCOM_PMU_MAX_EVS];
  34. u64 ev_data[QCOM_PMU_MAX_EVS];
  35. u32 num_evs;
  36. };
  37. typedef void (*idle_fn_t)(struct qcom_pmu_data *data, int cpu, int state);
  38. struct qcom_pmu_notif_node {
  39. idle_fn_t idle_cb;
  40. struct list_head node;
  41. };
  42. enum amu_counters {
  43. SYS_AMU_CONST_CYC,
  44. SYS_AMU_CORE_CYC,
  45. SYS_AMU_INST_RET,
  46. SYS_AMU_STALL_MEM,
  47. SYS_AMU_MAX,
  48. };
  49. #if IS_ENABLED(CONFIG_QCOM_PMU_LIB)
  50. int qcom_pmu_event_supported(u32 event_id, int cpu);
  51. int qcom_get_cpucp_id(u32 event_id, int cpu);
  52. int qcom_pmu_read(int cpu, u32 event_id, u64 *pmu_data);
  53. int qcom_pmu_read_local(u32 event_id, u64 *pmu_data);
  54. int qcom_pmu_read_all(int cpu, struct qcom_pmu_data *data);
  55. int qcom_pmu_read_all_local(struct qcom_pmu_data *data);
  56. int qcom_pmu_idle_register(struct qcom_pmu_notif_node *idle_node);
  57. int qcom_pmu_idle_unregister(struct qcom_pmu_notif_node *idle_node);
  58. int cpucp_pmu_init(struct scmi_device *sdev);
  59. #else
  60. static inline int qcom_pmu_event_supported(u32 event_id, int cpu)
  61. {
  62. return -ENODEV;
  63. }
  64. static inline int qcom_get_cpucp_id(u32 event_id, int cpu)
  65. {
  66. return -ENODEV;
  67. }
  68. static inline int qcom_pmu_read(int cpu, u32 event_id, u64 *pmu_data)
  69. {
  70. return -ENODEV;
  71. }
  72. static inline int qcom_pmu_read_local(u32 event_id, u64 *pmu_data)
  73. {
  74. return -ENODEV;
  75. }
  76. static inline int qcom_pmu_read_all(int cpu, struct qcom_pmu_data *data)
  77. {
  78. return -ENODEV;
  79. }
  80. static inline int qcom_pmu_read_all_local(struct qcom_pmu_data *data)
  81. {
  82. return -ENODEV;
  83. }
  84. static inline int qcom_pmu_idle_register(struct qcom_pmu_notif_node *idle_node)
  85. {
  86. return -ENODEV;
  87. }
  88. static inline int qcom_pmu_idle_unregister(
  89. struct qcom_pmu_notif_node *idle_node)
  90. {
  91. return -ENODEV;
  92. }
  93. static inline int rimps_pmu_init(struct scmi_device *sdev)
  94. {
  95. return -ENODEV;
  96. }
  97. #endif
  98. #endif /* _QCOM_PMU_H */