cisreg.h 2.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * cisreg.h
  4. *
  5. * The initial developer of the original code is David A. Hinds
  6. * <[email protected]>. Portions created by David A. Hinds
  7. * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
  8. *
  9. * (C) 1999 David A. Hinds
  10. */
  11. #ifndef _LINUX_CISREG_H
  12. #define _LINUX_CISREG_H
  13. /*
  14. * Offsets from ConfigBase for CIS registers
  15. */
  16. #define CISREG_COR 0x00
  17. #define CISREG_CCSR 0x02
  18. #define CISREG_PRR 0x04
  19. #define CISREG_SCR 0x06
  20. #define CISREG_ESR 0x08
  21. #define CISREG_IOBASE_0 0x0a
  22. #define CISREG_IOBASE_1 0x0c
  23. #define CISREG_IOBASE_2 0x0e
  24. #define CISREG_IOBASE_3 0x10
  25. #define CISREG_IOSIZE 0x12
  26. /*
  27. * Configuration Option Register
  28. */
  29. #define COR_CONFIG_MASK 0x3f
  30. #define COR_MFC_CONFIG_MASK 0x38
  31. #define COR_FUNC_ENA 0x01
  32. #define COR_ADDR_DECODE 0x02
  33. #define COR_IREQ_ENA 0x04
  34. #define COR_LEVEL_REQ 0x40
  35. #define COR_SOFT_RESET 0x80
  36. /*
  37. * Card Configuration and Status Register
  38. */
  39. #define CCSR_INTR_ACK 0x01
  40. #define CCSR_INTR_PENDING 0x02
  41. #define CCSR_POWER_DOWN 0x04
  42. #define CCSR_AUDIO_ENA 0x08
  43. #define CCSR_IOIS8 0x20
  44. #define CCSR_SIGCHG_ENA 0x40
  45. #define CCSR_CHANGED 0x80
  46. /*
  47. * Pin Replacement Register
  48. */
  49. #define PRR_WP_STATUS 0x01
  50. #define PRR_READY_STATUS 0x02
  51. #define PRR_BVD2_STATUS 0x04
  52. #define PRR_BVD1_STATUS 0x08
  53. #define PRR_WP_EVENT 0x10
  54. #define PRR_READY_EVENT 0x20
  55. #define PRR_BVD2_EVENT 0x40
  56. #define PRR_BVD1_EVENT 0x80
  57. /*
  58. * Socket and Copy Register
  59. */
  60. #define SCR_SOCKET_NUM 0x0f
  61. #define SCR_COPY_NUM 0x70
  62. /*
  63. * Extended Status Register
  64. */
  65. #define ESR_REQ_ATTN_ENA 0x01
  66. #define ESR_REQ_ATTN 0x10
  67. /*
  68. * CardBus Function Status Registers
  69. */
  70. #define CBFN_EVENT 0x00
  71. #define CBFN_MASK 0x04
  72. #define CBFN_STATE 0x08
  73. #define CBFN_FORCE 0x0c
  74. /*
  75. * These apply to all the CardBus function registers
  76. */
  77. #define CBFN_WP 0x0001
  78. #define CBFN_READY 0x0002
  79. #define CBFN_BVD2 0x0004
  80. #define CBFN_BVD1 0x0008
  81. #define CBFN_GWAKE 0x0010
  82. #define CBFN_INTR 0x8000
  83. /*
  84. * Extra bits in the Function Event Mask Register
  85. */
  86. #define FEMR_BAM_ENA 0x0020
  87. #define FEMR_PWM_ENA 0x0040
  88. #define FEMR_WKUP_MASK 0x4000
  89. /*
  90. * Indirect Addressing Registers for Zoomed Video: these are addresses
  91. * in common memory space
  92. */
  93. #define CISREG_ICTRL0 0x02 /* control registers */
  94. #define CISREG_ICTRL1 0x03
  95. #define CISREG_IADDR0 0x04 /* address registers */
  96. #define CISREG_IADDR1 0x05
  97. #define CISREG_IADDR2 0x06
  98. #define CISREG_IADDR3 0x07
  99. #define CISREG_IDATA0 0x08 /* data registers */
  100. #define CISREG_IDATA1 0x09
  101. #define ICTRL0_COMMON 0x01
  102. #define ICTRL0_AUTOINC 0x02
  103. #define ICTRL0_BYTEGRAN 0x04
  104. #endif /* _LINUX_CISREG_H */