exynos-fimc.h 4.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Samsung S5P/Exynos4 SoC series camera interface driver header
  4. *
  5. * Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
  6. * Sylwester Nawrocki <[email protected]>
  7. */
  8. #ifndef S5P_FIMC_H_
  9. #define S5P_FIMC_H_
  10. #include <media/media-entity.h>
  11. #include <media/v4l2-dev.h>
  12. #include <media/v4l2-mediabus.h>
  13. /*
  14. * Enumeration of data inputs to the camera subsystem.
  15. */
  16. enum fimc_input {
  17. FIMC_INPUT_PARALLEL_0 = 1,
  18. FIMC_INPUT_PARALLEL_1,
  19. FIMC_INPUT_MIPI_CSI2_0 = 3,
  20. FIMC_INPUT_MIPI_CSI2_1,
  21. FIMC_INPUT_WRITEBACK_A = 5,
  22. FIMC_INPUT_WRITEBACK_B,
  23. FIMC_INPUT_WRITEBACK_ISP = 5,
  24. };
  25. /*
  26. * Enumeration of the FIMC data bus types.
  27. */
  28. enum fimc_bus_type {
  29. /* Camera parallel bus */
  30. FIMC_BUS_TYPE_ITU_601 = 1,
  31. /* Camera parallel bus with embedded synchronization */
  32. FIMC_BUS_TYPE_ITU_656,
  33. /* Camera MIPI-CSI2 serial bus */
  34. FIMC_BUS_TYPE_MIPI_CSI2,
  35. /* FIFO link from LCD controller (WriteBack A) */
  36. FIMC_BUS_TYPE_LCD_WRITEBACK_A,
  37. /* FIFO link from LCD controller (WriteBack B) */
  38. FIMC_BUS_TYPE_LCD_WRITEBACK_B,
  39. /* FIFO link from FIMC-IS */
  40. FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
  41. };
  42. #define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
  43. #define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
  44. /*
  45. * The subdevices' group IDs.
  46. */
  47. #define GRP_ID_SENSOR (1 << 8)
  48. #define GRP_ID_FIMC_IS_SENSOR (1 << 9)
  49. #define GRP_ID_WRITEBACK (1 << 10)
  50. #define GRP_ID_CSIS (1 << 11)
  51. #define GRP_ID_FIMC (1 << 12)
  52. #define GRP_ID_FLITE (1 << 13)
  53. #define GRP_ID_FIMC_IS (1 << 14)
  54. /**
  55. * struct fimc_source_info - video source description required for the host
  56. * interface configuration
  57. *
  58. * @fimc_bus_type: FIMC camera input type
  59. * @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
  60. * @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
  61. * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
  62. */
  63. struct fimc_source_info {
  64. enum fimc_bus_type fimc_bus_type;
  65. enum fimc_bus_type sensor_bus_type;
  66. u16 flags;
  67. u16 mux_id;
  68. };
  69. /*
  70. * v4l2_device notification id. This is only for internal use in the kernel.
  71. * Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single
  72. * frame capture mode when there is only one VSYNC pulse issued by the sensor
  73. * at beginning of the frame transmission.
  74. */
  75. #define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)
  76. #define FIMC_MAX_PLANES 3
  77. /**
  78. * struct fimc_fmt - color format data structure
  79. * @mbus_code: media bus pixel code, -1 if not applicable
  80. * @fourcc: fourcc code for this format, 0 if not applicable
  81. * @color: the driver's private color format id
  82. * @memplanes: number of physically non-contiguous data planes
  83. * @colplanes: number of physically contiguous data planes
  84. * @colorspace: v4l2 colorspace (V4L2_COLORSPACE_*)
  85. * @depth: per plane driver's private 'number of bits per pixel'
  86. * @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no)
  87. * @flags: flags indicating which operation mode format applies to
  88. */
  89. struct fimc_fmt {
  90. u32 mbus_code;
  91. u32 fourcc;
  92. u32 color;
  93. u16 memplanes;
  94. u16 colplanes;
  95. u8 colorspace;
  96. u8 depth[FIMC_MAX_PLANES];
  97. u16 mdataplanes;
  98. u16 flags;
  99. #define FMT_FLAGS_CAM (1 << 0)
  100. #define FMT_FLAGS_M2M_IN (1 << 1)
  101. #define FMT_FLAGS_M2M_OUT (1 << 2)
  102. #define FMT_FLAGS_M2M (1 << 1 | 1 << 2)
  103. #define FMT_HAS_ALPHA (1 << 3)
  104. #define FMT_FLAGS_COMPRESSED (1 << 4)
  105. #define FMT_FLAGS_WRITEBACK (1 << 5)
  106. #define FMT_FLAGS_RAW_BAYER (1 << 6)
  107. #define FMT_FLAGS_YUV (1 << 7)
  108. };
  109. struct exynos_media_pipeline;
  110. /*
  111. * Media pipeline operations to be called from within a video node, i.e. the
  112. * last entity within the pipeline. Implemented by related media device driver.
  113. */
  114. struct exynos_media_pipeline_ops {
  115. int (*prepare)(struct exynos_media_pipeline *p,
  116. struct media_entity *me);
  117. int (*unprepare)(struct exynos_media_pipeline *p);
  118. int (*open)(struct exynos_media_pipeline *p, struct media_entity *me,
  119. bool resume);
  120. int (*close)(struct exynos_media_pipeline *p);
  121. int (*set_stream)(struct exynos_media_pipeline *p, bool state);
  122. };
  123. struct exynos_video_entity {
  124. struct video_device vdev;
  125. struct exynos_media_pipeline *pipe;
  126. };
  127. struct exynos_media_pipeline {
  128. struct media_pipeline mp;
  129. const struct exynos_media_pipeline_ops *ops;
  130. };
  131. static inline struct exynos_video_entity *vdev_to_exynos_video_entity(
  132. struct video_device *vdev)
  133. {
  134. return container_of(vdev, struct exynos_video_entity, vdev);
  135. }
  136. #define fimc_pipeline_call(ent, op, args...) \
  137. ((!(ent) || !(ent)->pipe) ? -ENOENT : \
  138. (((ent)->pipe->ops && (ent)->pipe->ops->op) ? \
  139. (ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD)) \
  140. #endif /* S5P_FIMC_H_ */