ti-emif-sram.h 4.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * TI AM33XX EMIF Routines
  4. *
  5. * Copyright (C) 2016-2017 Texas Instruments Inc.
  6. * Dave Gerlach
  7. */
  8. #ifndef __LINUX_TI_EMIF_H
  9. #define __LINUX_TI_EMIF_H
  10. #include <linux/kbuild.h>
  11. #include <linux/types.h>
  12. #ifndef __ASSEMBLY__
  13. struct emif_regs_amx3 {
  14. u32 emif_sdcfg_val;
  15. u32 emif_timing1_val;
  16. u32 emif_timing2_val;
  17. u32 emif_timing3_val;
  18. u32 emif_ref_ctrl_val;
  19. u32 emif_zqcfg_val;
  20. u32 emif_pmcr_val;
  21. u32 emif_pmcr_shdw_val;
  22. u32 emif_rd_wr_level_ramp_ctrl;
  23. u32 emif_rd_wr_exec_thresh;
  24. u32 emif_cos_config;
  25. u32 emif_priority_to_cos_mapping;
  26. u32 emif_connect_id_serv_1_map;
  27. u32 emif_connect_id_serv_2_map;
  28. u32 emif_ocp_config_val;
  29. u32 emif_lpddr2_nvm_tim;
  30. u32 emif_lpddr2_nvm_tim_shdw;
  31. u32 emif_dll_calib_ctrl_val;
  32. u32 emif_dll_calib_ctrl_val_shdw;
  33. u32 emif_ddr_phy_ctlr_1;
  34. u32 emif_ext_phy_ctrl_vals[120];
  35. };
  36. struct ti_emif_pm_data {
  37. void __iomem *ti_emif_base_addr_virt;
  38. phys_addr_t ti_emif_base_addr_phys;
  39. unsigned long ti_emif_sram_config;
  40. struct emif_regs_amx3 *regs_virt;
  41. phys_addr_t regs_phys;
  42. } __packed __aligned(8);
  43. struct ti_emif_pm_functions {
  44. u32 save_context;
  45. u32 restore_context;
  46. u32 run_hw_leveling;
  47. u32 enter_sr;
  48. u32 exit_sr;
  49. u32 abort_sr;
  50. } __packed __aligned(8);
  51. static inline void ti_emif_asm_offsets(void)
  52. {
  53. DEFINE(EMIF_SDCFG_VAL_OFFSET,
  54. offsetof(struct emif_regs_amx3, emif_sdcfg_val));
  55. DEFINE(EMIF_TIMING1_VAL_OFFSET,
  56. offsetof(struct emif_regs_amx3, emif_timing1_val));
  57. DEFINE(EMIF_TIMING2_VAL_OFFSET,
  58. offsetof(struct emif_regs_amx3, emif_timing2_val));
  59. DEFINE(EMIF_TIMING3_VAL_OFFSET,
  60. offsetof(struct emif_regs_amx3, emif_timing3_val));
  61. DEFINE(EMIF_REF_CTRL_VAL_OFFSET,
  62. offsetof(struct emif_regs_amx3, emif_ref_ctrl_val));
  63. DEFINE(EMIF_ZQCFG_VAL_OFFSET,
  64. offsetof(struct emif_regs_amx3, emif_zqcfg_val));
  65. DEFINE(EMIF_PMCR_VAL_OFFSET,
  66. offsetof(struct emif_regs_amx3, emif_pmcr_val));
  67. DEFINE(EMIF_PMCR_SHDW_VAL_OFFSET,
  68. offsetof(struct emif_regs_amx3, emif_pmcr_shdw_val));
  69. DEFINE(EMIF_RD_WR_LEVEL_RAMP_CTRL_OFFSET,
  70. offsetof(struct emif_regs_amx3, emif_rd_wr_level_ramp_ctrl));
  71. DEFINE(EMIF_RD_WR_EXEC_THRESH_OFFSET,
  72. offsetof(struct emif_regs_amx3, emif_rd_wr_exec_thresh));
  73. DEFINE(EMIF_COS_CONFIG_OFFSET,
  74. offsetof(struct emif_regs_amx3, emif_cos_config));
  75. DEFINE(EMIF_PRIORITY_TO_COS_MAPPING_OFFSET,
  76. offsetof(struct emif_regs_amx3, emif_priority_to_cos_mapping));
  77. DEFINE(EMIF_CONNECT_ID_SERV_1_MAP_OFFSET,
  78. offsetof(struct emif_regs_amx3, emif_connect_id_serv_1_map));
  79. DEFINE(EMIF_CONNECT_ID_SERV_2_MAP_OFFSET,
  80. offsetof(struct emif_regs_amx3, emif_connect_id_serv_2_map));
  81. DEFINE(EMIF_OCP_CONFIG_VAL_OFFSET,
  82. offsetof(struct emif_regs_amx3, emif_ocp_config_val));
  83. DEFINE(EMIF_LPDDR2_NVM_TIM_OFFSET,
  84. offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim));
  85. DEFINE(EMIF_LPDDR2_NVM_TIM_SHDW_OFFSET,
  86. offsetof(struct emif_regs_amx3, emif_lpddr2_nvm_tim_shdw));
  87. DEFINE(EMIF_DLL_CALIB_CTRL_VAL_OFFSET,
  88. offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val));
  89. DEFINE(EMIF_DLL_CALIB_CTRL_VAL_SHDW_OFFSET,
  90. offsetof(struct emif_regs_amx3, emif_dll_calib_ctrl_val_shdw));
  91. DEFINE(EMIF_DDR_PHY_CTLR_1_OFFSET,
  92. offsetof(struct emif_regs_amx3, emif_ddr_phy_ctlr_1));
  93. DEFINE(EMIF_EXT_PHY_CTRL_VALS_OFFSET,
  94. offsetof(struct emif_regs_amx3, emif_ext_phy_ctrl_vals));
  95. DEFINE(EMIF_REGS_AMX3_SIZE, sizeof(struct emif_regs_amx3));
  96. BLANK();
  97. DEFINE(EMIF_PM_BASE_ADDR_VIRT_OFFSET,
  98. offsetof(struct ti_emif_pm_data, ti_emif_base_addr_virt));
  99. DEFINE(EMIF_PM_BASE_ADDR_PHYS_OFFSET,
  100. offsetof(struct ti_emif_pm_data, ti_emif_base_addr_phys));
  101. DEFINE(EMIF_PM_CONFIG_OFFSET,
  102. offsetof(struct ti_emif_pm_data, ti_emif_sram_config));
  103. DEFINE(EMIF_PM_REGS_VIRT_OFFSET,
  104. offsetof(struct ti_emif_pm_data, regs_virt));
  105. DEFINE(EMIF_PM_REGS_PHYS_OFFSET,
  106. offsetof(struct ti_emif_pm_data, regs_phys));
  107. DEFINE(EMIF_PM_DATA_SIZE, sizeof(struct ti_emif_pm_data));
  108. BLANK();
  109. DEFINE(EMIF_PM_SAVE_CONTEXT_OFFSET,
  110. offsetof(struct ti_emif_pm_functions, save_context));
  111. DEFINE(EMIF_PM_RESTORE_CONTEXT_OFFSET,
  112. offsetof(struct ti_emif_pm_functions, restore_context));
  113. DEFINE(EMIF_PM_RUN_HW_LEVELING,
  114. offsetof(struct ti_emif_pm_functions, run_hw_leveling));
  115. DEFINE(EMIF_PM_ENTER_SR_OFFSET,
  116. offsetof(struct ti_emif_pm_functions, enter_sr));
  117. DEFINE(EMIF_PM_EXIT_SR_OFFSET,
  118. offsetof(struct ti_emif_pm_functions, exit_sr));
  119. DEFINE(EMIF_PM_ABORT_SR_OFFSET,
  120. offsetof(struct ti_emif_pm_functions, abort_sr));
  121. DEFINE(EMIF_PM_FUNCTIONS_SIZE, sizeof(struct ti_emif_pm_functions));
  122. }
  123. struct gen_pool;
  124. int ti_emif_copy_pm_function_table(struct gen_pool *sram_pool, void *dst);
  125. int ti_emif_get_mem_type(void);
  126. #endif
  127. #endif /* __LINUX_TI_EMIF_H */