resctrl.h 8.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _RESCTRL_H
  3. #define _RESCTRL_H
  4. #include <linux/kernel.h>
  5. #include <linux/list.h>
  6. #include <linux/pid.h>
  7. #ifdef CONFIG_PROC_CPU_RESCTRL
  8. int proc_resctrl_show(struct seq_file *m,
  9. struct pid_namespace *ns,
  10. struct pid *pid,
  11. struct task_struct *tsk);
  12. #endif
  13. /* max value for struct rdt_domain's mbps_val */
  14. #define MBA_MAX_MBPS U32_MAX
  15. /**
  16. * enum resctrl_conf_type - The type of configuration.
  17. * @CDP_NONE: No prioritisation, both code and data are controlled or monitored.
  18. * @CDP_CODE: Configuration applies to instruction fetches.
  19. * @CDP_DATA: Configuration applies to reads and writes.
  20. */
  21. enum resctrl_conf_type {
  22. CDP_NONE,
  23. CDP_CODE,
  24. CDP_DATA,
  25. };
  26. #define CDP_NUM_TYPES (CDP_DATA + 1)
  27. /*
  28. * Event IDs, the values match those used to program IA32_QM_EVTSEL before
  29. * reading IA32_QM_CTR on RDT systems.
  30. */
  31. enum resctrl_event_id {
  32. QOS_L3_OCCUP_EVENT_ID = 0x01,
  33. QOS_L3_MBM_TOTAL_EVENT_ID = 0x02,
  34. QOS_L3_MBM_LOCAL_EVENT_ID = 0x03,
  35. };
  36. /**
  37. * struct resctrl_staged_config - parsed configuration to be applied
  38. * @new_ctrl: new ctrl value to be loaded
  39. * @have_new_ctrl: whether the user provided new_ctrl is valid
  40. */
  41. struct resctrl_staged_config {
  42. u32 new_ctrl;
  43. bool have_new_ctrl;
  44. };
  45. /**
  46. * struct rdt_domain - group of CPUs sharing a resctrl resource
  47. * @list: all instances of this resource
  48. * @id: unique id for this instance
  49. * @cpu_mask: which CPUs share this resource
  50. * @rmid_busy_llc: bitmap of which limbo RMIDs are above threshold
  51. * @mbm_total: saved state for MBM total bandwidth
  52. * @mbm_local: saved state for MBM local bandwidth
  53. * @mbm_over: worker to periodically read MBM h/w counters
  54. * @cqm_limbo: worker to periodically read CQM h/w counters
  55. * @mbm_work_cpu: worker CPU for MBM h/w counters
  56. * @cqm_work_cpu: worker CPU for CQM h/w counters
  57. * @plr: pseudo-locked region (if any) associated with domain
  58. * @staged_config: parsed configuration to be applied
  59. * @mbps_val: When mba_sc is enabled, this holds the array of user
  60. * specified control values for mba_sc in MBps, indexed
  61. * by closid
  62. */
  63. struct rdt_domain {
  64. struct list_head list;
  65. int id;
  66. struct cpumask cpu_mask;
  67. unsigned long *rmid_busy_llc;
  68. struct mbm_state *mbm_total;
  69. struct mbm_state *mbm_local;
  70. struct delayed_work mbm_over;
  71. struct delayed_work cqm_limbo;
  72. int mbm_work_cpu;
  73. int cqm_work_cpu;
  74. struct pseudo_lock_region *plr;
  75. struct resctrl_staged_config staged_config[CDP_NUM_TYPES];
  76. u32 *mbps_val;
  77. };
  78. /**
  79. * struct resctrl_cache - Cache allocation related data
  80. * @cbm_len: Length of the cache bit mask
  81. * @min_cbm_bits: Minimum number of consecutive bits to be set
  82. * @shareable_bits: Bitmask of shareable resource with other
  83. * executing entities
  84. * @arch_has_sparse_bitmaps: True if a bitmap like f00f is valid.
  85. * @arch_has_empty_bitmaps: True if the '0' bitmap is valid.
  86. * @arch_has_per_cpu_cfg: True if QOS_CFG register for this cache
  87. * level has CPU scope.
  88. */
  89. struct resctrl_cache {
  90. unsigned int cbm_len;
  91. unsigned int min_cbm_bits;
  92. unsigned int shareable_bits;
  93. bool arch_has_sparse_bitmaps;
  94. bool arch_has_empty_bitmaps;
  95. bool arch_has_per_cpu_cfg;
  96. };
  97. /**
  98. * enum membw_throttle_mode - System's memory bandwidth throttling mode
  99. * @THREAD_THROTTLE_UNDEFINED: Not relevant to the system
  100. * @THREAD_THROTTLE_MAX: Memory bandwidth is throttled at the core
  101. * always using smallest bandwidth percentage
  102. * assigned to threads, aka "max throttling"
  103. * @THREAD_THROTTLE_PER_THREAD: Memory bandwidth is throttled at the thread
  104. */
  105. enum membw_throttle_mode {
  106. THREAD_THROTTLE_UNDEFINED = 0,
  107. THREAD_THROTTLE_MAX,
  108. THREAD_THROTTLE_PER_THREAD,
  109. };
  110. /**
  111. * struct resctrl_membw - Memory bandwidth allocation related data
  112. * @min_bw: Minimum memory bandwidth percentage user can request
  113. * @bw_gran: Granularity at which the memory bandwidth is allocated
  114. * @delay_linear: True if memory B/W delay is in linear scale
  115. * @arch_needs_linear: True if we can't configure non-linear resources
  116. * @throttle_mode: Bandwidth throttling mode when threads request
  117. * different memory bandwidths
  118. * @mba_sc: True if MBA software controller(mba_sc) is enabled
  119. * @mb_map: Mapping of memory B/W percentage to memory B/W delay
  120. */
  121. struct resctrl_membw {
  122. u32 min_bw;
  123. u32 bw_gran;
  124. u32 delay_linear;
  125. bool arch_needs_linear;
  126. enum membw_throttle_mode throttle_mode;
  127. bool mba_sc;
  128. u32 *mb_map;
  129. };
  130. struct rdt_parse_data;
  131. struct resctrl_schema;
  132. /**
  133. * struct rdt_resource - attributes of a resctrl resource
  134. * @rid: The index of the resource
  135. * @alloc_capable: Is allocation available on this machine
  136. * @mon_capable: Is monitor feature available on this machine
  137. * @num_rmid: Number of RMIDs available
  138. * @cache_level: Which cache level defines scope of this resource
  139. * @cache: Cache allocation related data
  140. * @membw: If the component has bandwidth controls, their properties.
  141. * @domains: All domains for this resource
  142. * @name: Name to use in "schemata" file.
  143. * @data_width: Character width of data when displaying
  144. * @default_ctrl: Specifies default cache cbm or memory B/W percent.
  145. * @format_str: Per resource format string to show domain value
  146. * @parse_ctrlval: Per resource function pointer to parse control values
  147. * @evt_list: List of monitoring events
  148. * @fflags: flags to choose base and info files
  149. * @cdp_capable: Is the CDP feature available on this resource
  150. */
  151. struct rdt_resource {
  152. int rid;
  153. bool alloc_capable;
  154. bool mon_capable;
  155. int num_rmid;
  156. int cache_level;
  157. struct resctrl_cache cache;
  158. struct resctrl_membw membw;
  159. struct list_head domains;
  160. char *name;
  161. int data_width;
  162. u32 default_ctrl;
  163. const char *format_str;
  164. int (*parse_ctrlval)(struct rdt_parse_data *data,
  165. struct resctrl_schema *s,
  166. struct rdt_domain *d);
  167. struct list_head evt_list;
  168. unsigned long fflags;
  169. bool cdp_capable;
  170. };
  171. /**
  172. * struct resctrl_schema - configuration abilities of a resource presented to
  173. * user-space
  174. * @list: Member of resctrl_schema_all.
  175. * @name: The name to use in the "schemata" file.
  176. * @conf_type: Whether this schema is specific to code/data.
  177. * @res: The resource structure exported by the architecture to describe
  178. * the hardware that is configured by this schema.
  179. * @num_closid: The number of closid that can be used with this schema. When
  180. * features like CDP are enabled, this will be lower than the
  181. * hardware supports for the resource.
  182. */
  183. struct resctrl_schema {
  184. struct list_head list;
  185. char name[8];
  186. enum resctrl_conf_type conf_type;
  187. struct rdt_resource *res;
  188. u32 num_closid;
  189. };
  190. /* The number of closid supported by this resource regardless of CDP */
  191. u32 resctrl_arch_get_num_closid(struct rdt_resource *r);
  192. int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid);
  193. /*
  194. * Update the ctrl_val and apply this config right now.
  195. * Must be called on one of the domain's CPUs.
  196. */
  197. int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_domain *d,
  198. u32 closid, enum resctrl_conf_type t, u32 cfg_val);
  199. u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_domain *d,
  200. u32 closid, enum resctrl_conf_type type);
  201. int resctrl_online_domain(struct rdt_resource *r, struct rdt_domain *d);
  202. void resctrl_offline_domain(struct rdt_resource *r, struct rdt_domain *d);
  203. /**
  204. * resctrl_arch_rmid_read() - Read the eventid counter corresponding to rmid
  205. * for this resource and domain.
  206. * @r: resource that the counter should be read from.
  207. * @d: domain that the counter should be read from.
  208. * @rmid: rmid of the counter to read.
  209. * @eventid: eventid to read, e.g. L3 occupancy.
  210. * @val: result of the counter read in bytes.
  211. *
  212. * Call from process context on a CPU that belongs to domain @d.
  213. *
  214. * Return:
  215. * 0 on success, or -EIO, -EINVAL etc on error.
  216. */
  217. int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain *d,
  218. u32 rmid, enum resctrl_event_id eventid, u64 *val);
  219. /**
  220. * resctrl_arch_reset_rmid() - Reset any private state associated with rmid
  221. * and eventid.
  222. * @r: The domain's resource.
  223. * @d: The rmid's domain.
  224. * @rmid: The rmid whose counter values should be reset.
  225. * @eventid: The eventid whose counter values should be reset.
  226. *
  227. * This can be called from any CPU.
  228. */
  229. void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_domain *d,
  230. u32 rmid, enum resctrl_event_id eventid);
  231. extern unsigned int resctrl_rmid_realloc_threshold;
  232. extern unsigned int resctrl_rmid_realloc_limit;
  233. #endif /* _RESCTRL_H */