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mtd-nand-omap2.h

mtd-nand-omap2.h 2.2 KB
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  1. /* SPDX-License-Identifier: GPL-2.0-only */
    2. 

  2. /*
    3. 

  3.  * Copyright (C) 2006 Micron Technology Inc.
    4. 

  4.  */
    5. 

  5. 

  6. #ifndef	_MTD_NAND_OMAP2_H
    7. 

  7. #define	_MTD_NAND_OMAP2_H
    8. 

  8. 

  9. #include <linux/mtd/partitions.h>
    10. 

  10. #include <linux/mod_devicetable.h>
    11. 

  11. 

  12. #define	GPMC_BCH_NUM_REMAINDER	8
    13. 

  13. 

  14. enum nand_io {
    15. 

  15. 	NAND_OMAP_PREFETCH_POLLED = 0,	/* prefetch polled mode, default */
    16. 

  16. 	NAND_OMAP_POLLED,		/* polled mode, without prefetch */
    17. 

  17. 	NAND_OMAP_PREFETCH_DMA,		/* prefetch enabled sDMA mode */
    18. 

  18. 	NAND_OMAP_PREFETCH_IRQ		/* prefetch enabled irq mode */
    19. 

  19. };
    20. 

  20. 

  21. enum omap_ecc {
    22. 

  22. 	/*
    23. 

  23. 	 * 1-bit ECC: calculation and correction by SW
    24. 

  24. 	 * ECC stored at end of spare area
    25. 

  25. 	 */
    26. 

  26. 	OMAP_ECC_HAM1_CODE_SW = 0,
    27. 

  27. 

  28. 	/*
    29. 

  29. 	 * 1-bit ECC: calculation by GPMC, Error detection by Software
    30. 

  30. 	 * ECC layout compatible with ROM code layout
    31. 

  31. 	 */
    32. 

  32. 	OMAP_ECC_HAM1_CODE_HW,
    33. 

  33. 	/* 4-bit  ECC calculation by GPMC, Error detection by Software */
    34. 

  34. 	OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
    35. 

  35. 	/* 4-bit  ECC calculation by GPMC, Error detection by ELM */
    36. 

  36. 	OMAP_ECC_BCH4_CODE_HW,
    37. 

  37. 	/* 8-bit  ECC calculation by GPMC, Error detection by Software */
    38. 

  38. 	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
    39. 

  39. 	/* 8-bit  ECC calculation by GPMC, Error detection by ELM */
    40. 

  40. 	OMAP_ECC_BCH8_CODE_HW,
    41. 

  41. 	/* 16-bit ECC calculation by GPMC, Error detection by ELM */
    42. 

  42. 	OMAP_ECC_BCH16_CODE_HW,
    43. 

  43. };
    44. 

  44. 

  45. struct gpmc_nand_regs {
    46. 

  46. 	void __iomem	*gpmc_nand_command;
    47. 

  47. 	void __iomem	*gpmc_nand_address;
    48. 

  48. 	void __iomem	*gpmc_nand_data;
    49. 

  49. 	void __iomem	*gpmc_prefetch_config1;
    50. 

  50. 	void __iomem	*gpmc_prefetch_config2;
    51. 

  51. 	void __iomem	*gpmc_prefetch_control;
    52. 

  52. 	void __iomem	*gpmc_prefetch_status;
    53. 

  53. 	void __iomem	*gpmc_ecc_config;
    54. 

  54. 	void __iomem	*gpmc_ecc_control;
    55. 

  55. 	void __iomem	*gpmc_ecc_size_config;
    56. 

  56. 	void __iomem	*gpmc_ecc1_result;
    57. 

  57. 	void __iomem	*gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER];
    58. 

  58. 	void __iomem	*gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
    59. 

  59. 	void __iomem	*gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
    60. 

  60. 	void __iomem	*gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
    61. 

  61. 	void __iomem	*gpmc_bch_result4[GPMC_BCH_NUM_REMAINDER];
    62. 

  62. 	void __iomem	*gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER];
    63. 

  63. 	void __iomem	*gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER];
    64. 

  64. };
    65. 

  65. 

  66. static const struct of_device_id omap_nand_ids[] = {
    67. 

  67. 	{ .compatible = "ti,omap2-nand", },
    68. 

  68. 	{ .compatible = "ti,am64-nand", },
    69. 

  69. 	{},
    70. 

  70. };
    71. 

  71. 

  72. #endif /* _MTD_NAND_OMAP2_H */
    73.