fb-s3c2410.h 2.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2004 Arnaud Patard <[email protected]>
  4. *
  5. * Inspired by pxafb.h
  6. */
  7. #ifndef __ASM_PLAT_FB_S3C2410_H
  8. #define __ASM_PLAT_FB_S3C2410_H __FILE__
  9. #include <linux/compiler_types.h>
  10. struct s3c2410fb_hw {
  11. unsigned long lcdcon1;
  12. unsigned long lcdcon2;
  13. unsigned long lcdcon3;
  14. unsigned long lcdcon4;
  15. unsigned long lcdcon5;
  16. };
  17. /* LCD description */
  18. struct s3c2410fb_display {
  19. /* LCD type */
  20. unsigned type;
  21. #define S3C2410_LCDCON1_DSCAN4 (0<<5)
  22. #define S3C2410_LCDCON1_STN4 (1<<5)
  23. #define S3C2410_LCDCON1_STN8 (2<<5)
  24. #define S3C2410_LCDCON1_TFT (3<<5)
  25. #define S3C2410_LCDCON1_TFT1BPP (8<<1)
  26. #define S3C2410_LCDCON1_TFT2BPP (9<<1)
  27. #define S3C2410_LCDCON1_TFT4BPP (10<<1)
  28. #define S3C2410_LCDCON1_TFT8BPP (11<<1)
  29. #define S3C2410_LCDCON1_TFT16BPP (12<<1)
  30. #define S3C2410_LCDCON1_TFT24BPP (13<<1)
  31. /* Screen size */
  32. unsigned short width;
  33. unsigned short height;
  34. /* Screen info */
  35. unsigned short xres;
  36. unsigned short yres;
  37. unsigned short bpp;
  38. unsigned pixclock; /* pixclock in picoseconds */
  39. unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */
  40. unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */
  41. unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */
  42. unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */
  43. unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */
  44. unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */
  45. /* lcd configuration registers */
  46. unsigned long lcdcon5;
  47. #define S3C2410_LCDCON5_BPP24BL (1<<12)
  48. #define S3C2410_LCDCON5_FRM565 (1<<11)
  49. #define S3C2410_LCDCON5_INVVCLK (1<<10)
  50. #define S3C2410_LCDCON5_INVVLINE (1<<9)
  51. #define S3C2410_LCDCON5_INVVFRAME (1<<8)
  52. #define S3C2410_LCDCON5_INVVD (1<<7)
  53. #define S3C2410_LCDCON5_INVVDEN (1<<6)
  54. #define S3C2410_LCDCON5_INVPWREN (1<<5)
  55. #define S3C2410_LCDCON5_INVLEND (1<<4)
  56. #define S3C2410_LCDCON5_PWREN (1<<3)
  57. #define S3C2410_LCDCON5_ENLEND (1<<2)
  58. #define S3C2410_LCDCON5_BSWP (1<<1)
  59. #define S3C2410_LCDCON5_HWSWP (1<<0)
  60. };
  61. struct s3c2410fb_mach_info {
  62. struct s3c2410fb_display *displays; /* attached displays info */
  63. unsigned num_displays; /* number of defined displays */
  64. unsigned default_display;
  65. /* GPIOs */
  66. unsigned long gpcup;
  67. unsigned long gpcup_mask;
  68. unsigned long gpccon;
  69. unsigned long gpccon_mask;
  70. unsigned long gpdup;
  71. unsigned long gpdup_mask;
  72. unsigned long gpdcon;
  73. unsigned long gpdcon_mask;
  74. void __iomem * gpccon_reg;
  75. void __iomem * gpcup_reg;
  76. void __iomem * gpdcon_reg;
  77. void __iomem * gpdup_reg;
  78. /* lpc3600 control register */
  79. unsigned long lpcsel;
  80. };
  81. extern void s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *);
  82. #endif /* __ASM_PLAT_FB_S3C2410_H */