pgtable.h 48 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef _LINUX_PGTABLE_H
  3. #define _LINUX_PGTABLE_H
  4. #include <linux/pfn.h>
  5. #include <asm/pgtable.h>
  6. #ifndef __ASSEMBLY__
  7. #ifdef CONFIG_MMU
  8. #include <linux/mm_types.h>
  9. #include <linux/bug.h>
  10. #include <linux/errno.h>
  11. #include <asm-generic/pgtable_uffd.h>
  12. #include <linux/page_table_check.h>
  13. #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
  14. defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
  15. #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
  16. #endif
  17. /*
  18. * On almost all architectures and configurations, 0 can be used as the
  19. * upper ceiling to free_pgtables(): on many architectures it has the same
  20. * effect as using TASK_SIZE. However, there is one configuration which
  21. * must impose a more careful limit, to avoid freeing kernel pgtables.
  22. */
  23. #ifndef USER_PGTABLES_CEILING
  24. #define USER_PGTABLES_CEILING 0UL
  25. #endif
  26. /*
  27. * This defines the first usable user address. Platforms
  28. * can override its value with custom FIRST_USER_ADDRESS
  29. * defined in their respective <asm/pgtable.h>.
  30. */
  31. #ifndef FIRST_USER_ADDRESS
  32. #define FIRST_USER_ADDRESS 0UL
  33. #endif
  34. /*
  35. * This defines the generic helper for accessing PMD page
  36. * table page. Although platforms can still override this
  37. * via their respective <asm/pgtable.h>.
  38. */
  39. #ifndef pmd_pgtable
  40. #define pmd_pgtable(pmd) pmd_page(pmd)
  41. #endif
  42. /*
  43. * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
  44. *
  45. * The pXx_index() functions return the index of the entry in the page
  46. * table page which would control the given virtual address
  47. *
  48. * As these functions may be used by the same code for different levels of
  49. * the page table folding, they are always available, regardless of
  50. * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
  51. * because in such cases PTRS_PER_PxD equals 1.
  52. */
  53. static inline unsigned long pte_index(unsigned long address)
  54. {
  55. return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
  56. }
  57. #define pte_index pte_index
  58. #ifndef pmd_index
  59. static inline unsigned long pmd_index(unsigned long address)
  60. {
  61. return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
  62. }
  63. #define pmd_index pmd_index
  64. #endif
  65. #ifndef pud_index
  66. static inline unsigned long pud_index(unsigned long address)
  67. {
  68. return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
  69. }
  70. #define pud_index pud_index
  71. #endif
  72. #ifndef pgd_index
  73. /* Must be a compile-time constant, so implement it as a macro */
  74. #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
  75. #endif
  76. #ifndef pte_offset_kernel
  77. static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
  78. {
  79. return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
  80. }
  81. #define pte_offset_kernel pte_offset_kernel
  82. #endif
  83. #if defined(CONFIG_HIGHPTE)
  84. #define pte_offset_map(dir, address) \
  85. ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
  86. pte_index((address)))
  87. #define pte_unmap(pte) kunmap_atomic((pte))
  88. #else
  89. #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
  90. #define pte_unmap(pte) ((void)(pte)) /* NOP */
  91. #endif
  92. /* Find an entry in the second-level page table.. */
  93. #ifndef pmd_offset
  94. static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
  95. {
  96. return pud_pgtable(*pud) + pmd_index(address);
  97. }
  98. #define pmd_offset pmd_offset
  99. #endif
  100. #ifndef pud_offset
  101. static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
  102. {
  103. return p4d_pgtable(*p4d) + pud_index(address);
  104. }
  105. #define pud_offset pud_offset
  106. #endif
  107. static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address)
  108. {
  109. return (pgd + pgd_index(address));
  110. };
  111. /*
  112. * a shortcut to get a pgd_t in a given mm
  113. */
  114. #ifndef pgd_offset
  115. #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
  116. #endif
  117. /*
  118. * a shortcut which implies the use of the kernel's pgd, instead
  119. * of a process's
  120. */
  121. #ifndef pgd_offset_k
  122. #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
  123. #endif
  124. /*
  125. * In many cases it is known that a virtual address is mapped at PMD or PTE
  126. * level, so instead of traversing all the page table levels, we can get a
  127. * pointer to the PMD entry in user or kernel page table or translate a virtual
  128. * address to the pointer in the PTE in the kernel page tables with simple
  129. * helpers.
  130. */
  131. static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va)
  132. {
  133. return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
  134. }
  135. static inline pmd_t *pmd_off_k(unsigned long va)
  136. {
  137. return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
  138. }
  139. static inline pte_t *virt_to_kpte(unsigned long vaddr)
  140. {
  141. pmd_t *pmd = pmd_off_k(vaddr);
  142. return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
  143. }
  144. #ifndef pmd_young
  145. static inline int pmd_young(pmd_t pmd)
  146. {
  147. return 0;
  148. }
  149. #endif
  150. #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
  151. extern int ptep_set_access_flags(struct vm_area_struct *vma,
  152. unsigned long address, pte_t *ptep,
  153. pte_t entry, int dirty);
  154. #endif
  155. #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
  156. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  157. extern int pmdp_set_access_flags(struct vm_area_struct *vma,
  158. unsigned long address, pmd_t *pmdp,
  159. pmd_t entry, int dirty);
  160. extern int pudp_set_access_flags(struct vm_area_struct *vma,
  161. unsigned long address, pud_t *pudp,
  162. pud_t entry, int dirty);
  163. #else
  164. static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
  165. unsigned long address, pmd_t *pmdp,
  166. pmd_t entry, int dirty)
  167. {
  168. BUILD_BUG();
  169. return 0;
  170. }
  171. static inline int pudp_set_access_flags(struct vm_area_struct *vma,
  172. unsigned long address, pud_t *pudp,
  173. pud_t entry, int dirty)
  174. {
  175. BUILD_BUG();
  176. return 0;
  177. }
  178. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
  179. #endif
  180. #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
  181. static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
  182. unsigned long address,
  183. pte_t *ptep)
  184. {
  185. pte_t pte = *ptep;
  186. int r = 1;
  187. if (!pte_young(pte))
  188. r = 0;
  189. else
  190. set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
  191. return r;
  192. }
  193. #endif
  194. #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
  195. #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
  196. static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
  197. unsigned long address,
  198. pmd_t *pmdp)
  199. {
  200. pmd_t pmd = *pmdp;
  201. int r = 1;
  202. if (!pmd_young(pmd))
  203. r = 0;
  204. else
  205. set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
  206. return r;
  207. }
  208. #else
  209. static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
  210. unsigned long address,
  211. pmd_t *pmdp)
  212. {
  213. BUILD_BUG();
  214. return 0;
  215. }
  216. #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */
  217. #endif
  218. #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
  219. int ptep_clear_flush_young(struct vm_area_struct *vma,
  220. unsigned long address, pte_t *ptep);
  221. #endif
  222. #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
  223. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  224. extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
  225. unsigned long address, pmd_t *pmdp);
  226. #else
  227. /*
  228. * Despite relevant to THP only, this API is called from generic rmap code
  229. * under PageTransHuge(), hence needs a dummy implementation for !THP
  230. */
  231. static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
  232. unsigned long address, pmd_t *pmdp)
  233. {
  234. BUILD_BUG();
  235. return 0;
  236. }
  237. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
  238. #endif
  239. #ifndef arch_has_hw_nonleaf_pmd_young
  240. /*
  241. * Return whether the accessed bit in non-leaf PMD entries is supported on the
  242. * local CPU.
  243. */
  244. static inline bool arch_has_hw_nonleaf_pmd_young(void)
  245. {
  246. return IS_ENABLED(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG);
  247. }
  248. #endif
  249. #ifndef arch_has_hw_pte_young
  250. /*
  251. * Return whether the accessed bit is supported on the local CPU.
  252. *
  253. * This stub assumes accessing through an old PTE triggers a page fault.
  254. * Architectures that automatically set the access bit should overwrite it.
  255. */
  256. static inline bool arch_has_hw_pte_young(void)
  257. {
  258. return false;
  259. }
  260. #endif
  261. #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
  262. static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
  263. unsigned long address,
  264. pte_t *ptep)
  265. {
  266. pte_t pte = *ptep;
  267. pte_clear(mm, address, ptep);
  268. page_table_check_pte_clear(mm, address, pte);
  269. return pte;
  270. }
  271. #endif
  272. static inline void ptep_clear(struct mm_struct *mm, unsigned long addr,
  273. pte_t *ptep)
  274. {
  275. ptep_get_and_clear(mm, addr, ptep);
  276. }
  277. #ifndef __HAVE_ARCH_PTEP_GET
  278. static inline pte_t ptep_get(pte_t *ptep)
  279. {
  280. return READ_ONCE(*ptep);
  281. }
  282. #endif
  283. #ifdef CONFIG_GUP_GET_PTE_LOW_HIGH
  284. /*
  285. * WARNING: only to be used in the get_user_pages_fast() implementation.
  286. *
  287. * With get_user_pages_fast(), we walk down the pagetables without taking any
  288. * locks. For this we would like to load the pointers atomically, but sometimes
  289. * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What
  290. * we do have is the guarantee that a PTE will only either go from not present
  291. * to present, or present to not present or both -- it will not switch to a
  292. * completely different present page without a TLB flush in between; something
  293. * that we are blocking by holding interrupts off.
  294. *
  295. * Setting ptes from not present to present goes:
  296. *
  297. * ptep->pte_high = h;
  298. * smp_wmb();
  299. * ptep->pte_low = l;
  300. *
  301. * And present to not present goes:
  302. *
  303. * ptep->pte_low = 0;
  304. * smp_wmb();
  305. * ptep->pte_high = 0;
  306. *
  307. * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'.
  308. * We load pte_high *after* loading pte_low, which ensures we don't see an older
  309. * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't
  310. * picked up a changed pte high. We might have gotten rubbish values from
  311. * pte_low and pte_high, but we are guaranteed that pte_low will not have the
  312. * present bit set *unless* it is 'l'. Because get_user_pages_fast() only
  313. * operates on present ptes we're safe.
  314. */
  315. static inline pte_t ptep_get_lockless(pte_t *ptep)
  316. {
  317. pte_t pte;
  318. do {
  319. pte.pte_low = ptep->pte_low;
  320. smp_rmb();
  321. pte.pte_high = ptep->pte_high;
  322. smp_rmb();
  323. } while (unlikely(pte.pte_low != ptep->pte_low));
  324. return pte;
  325. }
  326. #else /* CONFIG_GUP_GET_PTE_LOW_HIGH */
  327. /*
  328. * We require that the PTE can be read atomically.
  329. */
  330. static inline pte_t ptep_get_lockless(pte_t *ptep)
  331. {
  332. return ptep_get(ptep);
  333. }
  334. #endif /* CONFIG_GUP_GET_PTE_LOW_HIGH */
  335. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  336. #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
  337. static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
  338. unsigned long address,
  339. pmd_t *pmdp)
  340. {
  341. pmd_t pmd = *pmdp;
  342. pmd_clear(pmdp);
  343. page_table_check_pmd_clear(mm, address, pmd);
  344. return pmd;
  345. }
  346. #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
  347. #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
  348. static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
  349. unsigned long address,
  350. pud_t *pudp)
  351. {
  352. pud_t pud = *pudp;
  353. pud_clear(pudp);
  354. page_table_check_pud_clear(mm, address, pud);
  355. return pud;
  356. }
  357. #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
  358. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
  359. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  360. #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
  361. static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
  362. unsigned long address, pmd_t *pmdp,
  363. int full)
  364. {
  365. return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
  366. }
  367. #endif
  368. #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
  369. static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
  370. unsigned long address, pud_t *pudp,
  371. int full)
  372. {
  373. return pudp_huge_get_and_clear(mm, address, pudp);
  374. }
  375. #endif
  376. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
  377. #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
  378. static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
  379. unsigned long address, pte_t *ptep,
  380. int full)
  381. {
  382. pte_t pte;
  383. pte = ptep_get_and_clear(mm, address, ptep);
  384. return pte;
  385. }
  386. #endif
  387. /*
  388. * If two threads concurrently fault at the same page, the thread that
  389. * won the race updates the PTE and its local TLB/Cache. The other thread
  390. * gives up, simply does nothing, and continues; on architectures where
  391. * software can update TLB, local TLB can be updated here to avoid next page
  392. * fault. This function updates TLB only, do nothing with cache or others.
  393. * It is the difference with function update_mmu_cache.
  394. */
  395. #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
  396. static inline void update_mmu_tlb(struct vm_area_struct *vma,
  397. unsigned long address, pte_t *ptep)
  398. {
  399. }
  400. #define __HAVE_ARCH_UPDATE_MMU_TLB
  401. #endif
  402. /*
  403. * Some architectures may be able to avoid expensive synchronization
  404. * primitives when modifications are made to PTE's which are already
  405. * not present, or in the process of an address space destruction.
  406. */
  407. #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
  408. static inline void pte_clear_not_present_full(struct mm_struct *mm,
  409. unsigned long address,
  410. pte_t *ptep,
  411. int full)
  412. {
  413. pte_clear(mm, address, ptep);
  414. }
  415. #endif
  416. #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
  417. extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
  418. unsigned long address,
  419. pte_t *ptep);
  420. #endif
  421. #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
  422. extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
  423. unsigned long address,
  424. pmd_t *pmdp);
  425. extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
  426. unsigned long address,
  427. pud_t *pudp);
  428. #endif
  429. #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
  430. struct mm_struct;
  431. static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
  432. {
  433. pte_t old_pte = *ptep;
  434. set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
  435. }
  436. #endif
  437. /*
  438. * On some architectures hardware does not set page access bit when accessing
  439. * memory page, it is responsibility of software setting this bit. It brings
  440. * out extra page fault penalty to track page access bit. For optimization page
  441. * access bit can be set during all page fault flow on these arches.
  442. * To be differentiate with macro pte_mkyoung, this macro is used on platforms
  443. * where software maintains page access bit.
  444. */
  445. #ifndef pte_sw_mkyoung
  446. static inline pte_t pte_sw_mkyoung(pte_t pte)
  447. {
  448. return pte;
  449. }
  450. #define pte_sw_mkyoung pte_sw_mkyoung
  451. #endif
  452. #ifndef pte_savedwrite
  453. #define pte_savedwrite pte_write
  454. #endif
  455. #ifndef pte_mk_savedwrite
  456. #define pte_mk_savedwrite pte_mkwrite
  457. #endif
  458. #ifndef pte_clear_savedwrite
  459. #define pte_clear_savedwrite pte_wrprotect
  460. #endif
  461. #ifndef pmd_savedwrite
  462. #define pmd_savedwrite pmd_write
  463. #endif
  464. #ifndef pmd_mk_savedwrite
  465. #define pmd_mk_savedwrite pmd_mkwrite
  466. #endif
  467. #ifndef pmd_clear_savedwrite
  468. #define pmd_clear_savedwrite pmd_wrprotect
  469. #endif
  470. #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
  471. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  472. static inline void pmdp_set_wrprotect(struct mm_struct *mm,
  473. unsigned long address, pmd_t *pmdp)
  474. {
  475. pmd_t old_pmd = *pmdp;
  476. set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
  477. }
  478. #else
  479. static inline void pmdp_set_wrprotect(struct mm_struct *mm,
  480. unsigned long address, pmd_t *pmdp)
  481. {
  482. BUILD_BUG();
  483. }
  484. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
  485. #endif
  486. #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
  487. #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
  488. static inline void pudp_set_wrprotect(struct mm_struct *mm,
  489. unsigned long address, pud_t *pudp)
  490. {
  491. pud_t old_pud = *pudp;
  492. set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
  493. }
  494. #else
  495. static inline void pudp_set_wrprotect(struct mm_struct *mm,
  496. unsigned long address, pud_t *pudp)
  497. {
  498. BUILD_BUG();
  499. }
  500. #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
  501. #endif
  502. #ifndef pmdp_collapse_flush
  503. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  504. extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
  505. unsigned long address, pmd_t *pmdp);
  506. #else
  507. static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
  508. unsigned long address,
  509. pmd_t *pmdp)
  510. {
  511. BUILD_BUG();
  512. return *pmdp;
  513. }
  514. #define pmdp_collapse_flush pmdp_collapse_flush
  515. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
  516. #endif
  517. #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
  518. extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
  519. pgtable_t pgtable);
  520. #endif
  521. #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
  522. extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
  523. #endif
  524. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  525. /*
  526. * This is an implementation of pmdp_establish() that is only suitable for an
  527. * architecture that doesn't have hardware dirty/accessed bits. In this case we
  528. * can't race with CPU which sets these bits and non-atomic approach is fine.
  529. */
  530. static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
  531. unsigned long address, pmd_t *pmdp, pmd_t pmd)
  532. {
  533. pmd_t old_pmd = *pmdp;
  534. set_pmd_at(vma->vm_mm, address, pmdp, pmd);
  535. return old_pmd;
  536. }
  537. #endif
  538. #ifndef __HAVE_ARCH_PMDP_INVALIDATE
  539. extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
  540. pmd_t *pmdp);
  541. #endif
  542. #ifndef __HAVE_ARCH_PMDP_INVALIDATE_AD
  543. /*
  544. * pmdp_invalidate_ad() invalidates the PMD while changing a transparent
  545. * hugepage mapping in the page tables. This function is similar to
  546. * pmdp_invalidate(), but should only be used if the access and dirty bits would
  547. * not be cleared by the software in the new PMD value. The function ensures
  548. * that hardware changes of the access and dirty bits updates would not be lost.
  549. *
  550. * Doing so can allow in certain architectures to avoid a TLB flush in most
  551. * cases. Yet, another TLB flush might be necessary later if the PMD update
  552. * itself requires such flush (e.g., if protection was set to be stricter). Yet,
  553. * even when a TLB flush is needed because of the update, the caller may be able
  554. * to batch these TLB flushing operations, so fewer TLB flush operations are
  555. * needed.
  556. */
  557. extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma,
  558. unsigned long address, pmd_t *pmdp);
  559. #endif
  560. #ifndef __HAVE_ARCH_PTE_SAME
  561. static inline int pte_same(pte_t pte_a, pte_t pte_b)
  562. {
  563. return pte_val(pte_a) == pte_val(pte_b);
  564. }
  565. #endif
  566. #ifndef __HAVE_ARCH_PTE_UNUSED
  567. /*
  568. * Some architectures provide facilities to virtualization guests
  569. * so that they can flag allocated pages as unused. This allows the
  570. * host to transparently reclaim unused pages. This function returns
  571. * whether the pte's page is unused.
  572. */
  573. static inline int pte_unused(pte_t pte)
  574. {
  575. return 0;
  576. }
  577. #endif
  578. #ifndef pte_access_permitted
  579. #define pte_access_permitted(pte, write) \
  580. (pte_present(pte) && (!(write) || pte_write(pte)))
  581. #endif
  582. #ifndef pmd_access_permitted
  583. #define pmd_access_permitted(pmd, write) \
  584. (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
  585. #endif
  586. #ifndef pud_access_permitted
  587. #define pud_access_permitted(pud, write) \
  588. (pud_present(pud) && (!(write) || pud_write(pud)))
  589. #endif
  590. #ifndef p4d_access_permitted
  591. #define p4d_access_permitted(p4d, write) \
  592. (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
  593. #endif
  594. #ifndef pgd_access_permitted
  595. #define pgd_access_permitted(pgd, write) \
  596. (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
  597. #endif
  598. #ifndef __HAVE_ARCH_PMD_SAME
  599. static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
  600. {
  601. return pmd_val(pmd_a) == pmd_val(pmd_b);
  602. }
  603. static inline int pud_same(pud_t pud_a, pud_t pud_b)
  604. {
  605. return pud_val(pud_a) == pud_val(pud_b);
  606. }
  607. #endif
  608. #ifndef __HAVE_ARCH_P4D_SAME
  609. static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
  610. {
  611. return p4d_val(p4d_a) == p4d_val(p4d_b);
  612. }
  613. #endif
  614. #ifndef __HAVE_ARCH_PGD_SAME
  615. static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
  616. {
  617. return pgd_val(pgd_a) == pgd_val(pgd_b);
  618. }
  619. #endif
  620. /*
  621. * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
  622. * TLB flush will be required as a result of the "set". For example, use
  623. * in scenarios where it is known ahead of time that the routine is
  624. * setting non-present entries, or re-setting an existing entry to the
  625. * same value. Otherwise, use the typical "set" helpers and flush the
  626. * TLB.
  627. */
  628. #define set_pte_safe(ptep, pte) \
  629. ({ \
  630. WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
  631. set_pte(ptep, pte); \
  632. })
  633. #define set_pmd_safe(pmdp, pmd) \
  634. ({ \
  635. WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
  636. set_pmd(pmdp, pmd); \
  637. })
  638. #define set_pud_safe(pudp, pud) \
  639. ({ \
  640. WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
  641. set_pud(pudp, pud); \
  642. })
  643. #define set_p4d_safe(p4dp, p4d) \
  644. ({ \
  645. WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
  646. set_p4d(p4dp, p4d); \
  647. })
  648. #define set_pgd_safe(pgdp, pgd) \
  649. ({ \
  650. WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
  651. set_pgd(pgdp, pgd); \
  652. })
  653. #ifndef __HAVE_ARCH_DO_SWAP_PAGE
  654. /*
  655. * Some architectures support metadata associated with a page. When a
  656. * page is being swapped out, this metadata must be saved so it can be
  657. * restored when the page is swapped back in. SPARC M7 and newer
  658. * processors support an ADI (Application Data Integrity) tag for the
  659. * page as metadata for the page. arch_do_swap_page() can restore this
  660. * metadata when a page is swapped back in.
  661. */
  662. static inline void arch_do_swap_page(struct mm_struct *mm,
  663. struct vm_area_struct *vma,
  664. unsigned long addr,
  665. pte_t pte, pte_t oldpte)
  666. {
  667. }
  668. #endif
  669. #ifndef __HAVE_ARCH_UNMAP_ONE
  670. /*
  671. * Some architectures support metadata associated with a page. When a
  672. * page is being swapped out, this metadata must be saved so it can be
  673. * restored when the page is swapped back in. SPARC M7 and newer
  674. * processors support an ADI (Application Data Integrity) tag for the
  675. * page as metadata for the page. arch_unmap_one() can save this
  676. * metadata on a swap-out of a page.
  677. */
  678. static inline int arch_unmap_one(struct mm_struct *mm,
  679. struct vm_area_struct *vma,
  680. unsigned long addr,
  681. pte_t orig_pte)
  682. {
  683. return 0;
  684. }
  685. #endif
  686. /*
  687. * Allow architectures to preserve additional metadata associated with
  688. * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function
  689. * prototypes must be defined in the arch-specific asm/pgtable.h file.
  690. */
  691. #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
  692. static inline int arch_prepare_to_swap(struct page *page)
  693. {
  694. return 0;
  695. }
  696. #endif
  697. #ifndef __HAVE_ARCH_SWAP_INVALIDATE
  698. static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
  699. {
  700. }
  701. static inline void arch_swap_invalidate_area(int type)
  702. {
  703. }
  704. #endif
  705. #ifndef __HAVE_ARCH_SWAP_RESTORE
  706. static inline void arch_swap_restore(swp_entry_t entry, struct folio *folio)
  707. {
  708. }
  709. #endif
  710. #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
  711. #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
  712. #endif
  713. #ifndef __HAVE_ARCH_MOVE_PTE
  714. #define move_pte(pte, prot, old_addr, new_addr) (pte)
  715. #endif
  716. #ifndef pte_accessible
  717. # define pte_accessible(mm, pte) ((void)(pte), 1)
  718. #endif
  719. #ifndef flush_tlb_fix_spurious_fault
  720. #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
  721. #endif
  722. /*
  723. * When walking page tables, get the address of the next boundary,
  724. * or the end address of the range if that comes earlier. Although no
  725. * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
  726. */
  727. #define pgd_addr_end(addr, end) \
  728. ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
  729. (__boundary - 1 < (end) - 1)? __boundary: (end); \
  730. })
  731. #ifndef p4d_addr_end
  732. #define p4d_addr_end(addr, end) \
  733. ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
  734. (__boundary - 1 < (end) - 1)? __boundary: (end); \
  735. })
  736. #endif
  737. #ifndef pud_addr_end
  738. #define pud_addr_end(addr, end) \
  739. ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
  740. (__boundary - 1 < (end) - 1)? __boundary: (end); \
  741. })
  742. #endif
  743. #ifndef pmd_addr_end
  744. #define pmd_addr_end(addr, end) \
  745. ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
  746. (__boundary - 1 < (end) - 1)? __boundary: (end); \
  747. })
  748. #endif
  749. /*
  750. * When walking page tables, we usually want to skip any p?d_none entries;
  751. * and any p?d_bad entries - reporting the error before resetting to none.
  752. * Do the tests inline, but report and clear the bad entry in mm/memory.c.
  753. */
  754. void pgd_clear_bad(pgd_t *);
  755. #ifndef __PAGETABLE_P4D_FOLDED
  756. void p4d_clear_bad(p4d_t *);
  757. #else
  758. #define p4d_clear_bad(p4d) do { } while (0)
  759. #endif
  760. #ifndef __PAGETABLE_PUD_FOLDED
  761. void pud_clear_bad(pud_t *);
  762. #else
  763. #define pud_clear_bad(p4d) do { } while (0)
  764. #endif
  765. void pmd_clear_bad(pmd_t *);
  766. static inline int pgd_none_or_clear_bad(pgd_t *pgd)
  767. {
  768. if (pgd_none(*pgd))
  769. return 1;
  770. if (unlikely(pgd_bad(*pgd))) {
  771. pgd_clear_bad(pgd);
  772. return 1;
  773. }
  774. return 0;
  775. }
  776. static inline int p4d_none_or_clear_bad(p4d_t *p4d)
  777. {
  778. if (p4d_none(*p4d))
  779. return 1;
  780. if (unlikely(p4d_bad(*p4d))) {
  781. p4d_clear_bad(p4d);
  782. return 1;
  783. }
  784. return 0;
  785. }
  786. static inline int pud_none_or_clear_bad(pud_t *pud)
  787. {
  788. if (pud_none(*pud))
  789. return 1;
  790. if (unlikely(pud_bad(*pud))) {
  791. pud_clear_bad(pud);
  792. return 1;
  793. }
  794. return 0;
  795. }
  796. static inline int pmd_none_or_clear_bad(pmd_t *pmd)
  797. {
  798. if (pmd_none(*pmd))
  799. return 1;
  800. if (unlikely(pmd_bad(*pmd))) {
  801. pmd_clear_bad(pmd);
  802. return 1;
  803. }
  804. return 0;
  805. }
  806. static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
  807. unsigned long addr,
  808. pte_t *ptep)
  809. {
  810. /*
  811. * Get the current pte state, but zero it out to make it
  812. * non-present, preventing the hardware from asynchronously
  813. * updating it.
  814. */
  815. return ptep_get_and_clear(vma->vm_mm, addr, ptep);
  816. }
  817. static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
  818. unsigned long addr,
  819. pte_t *ptep, pte_t pte)
  820. {
  821. /*
  822. * The pte is non-present, so there's no hardware state to
  823. * preserve.
  824. */
  825. set_pte_at(vma->vm_mm, addr, ptep, pte);
  826. }
  827. #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
  828. /*
  829. * Start a pte protection read-modify-write transaction, which
  830. * protects against asynchronous hardware modifications to the pte.
  831. * The intention is not to prevent the hardware from making pte
  832. * updates, but to prevent any updates it may make from being lost.
  833. *
  834. * This does not protect against other software modifications of the
  835. * pte; the appropriate pte lock must be held over the transaction.
  836. *
  837. * Note that this interface is intended to be batchable, meaning that
  838. * ptep_modify_prot_commit may not actually update the pte, but merely
  839. * queue the update to be done at some later time. The update must be
  840. * actually committed before the pte lock is released, however.
  841. */
  842. static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
  843. unsigned long addr,
  844. pte_t *ptep)
  845. {
  846. return __ptep_modify_prot_start(vma, addr, ptep);
  847. }
  848. /*
  849. * Commit an update to a pte, leaving any hardware-controlled bits in
  850. * the PTE unmodified.
  851. */
  852. static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
  853. unsigned long addr,
  854. pte_t *ptep, pte_t old_pte, pte_t pte)
  855. {
  856. __ptep_modify_prot_commit(vma, addr, ptep, pte);
  857. }
  858. #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
  859. #endif /* CONFIG_MMU */
  860. /*
  861. * No-op macros that just return the current protection value. Defined here
  862. * because these macros can be used even if CONFIG_MMU is not defined.
  863. */
  864. #ifndef pgprot_nx
  865. #define pgprot_nx(prot) (prot)
  866. #endif
  867. #ifndef pgprot_noncached
  868. #define pgprot_noncached(prot) (prot)
  869. #endif
  870. #ifndef pgprot_writecombine
  871. #define pgprot_writecombine pgprot_noncached
  872. #endif
  873. #ifndef pgprot_writethrough
  874. #define pgprot_writethrough pgprot_noncached
  875. #endif
  876. #ifndef pgprot_device
  877. #define pgprot_device pgprot_noncached
  878. #endif
  879. #ifndef pgprot_mhp
  880. #define pgprot_mhp(prot) (prot)
  881. #endif
  882. #ifdef CONFIG_MMU
  883. #ifndef pgprot_modify
  884. #define pgprot_modify pgprot_modify
  885. static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
  886. {
  887. if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
  888. newprot = pgprot_noncached(newprot);
  889. if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
  890. newprot = pgprot_writecombine(newprot);
  891. if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
  892. newprot = pgprot_device(newprot);
  893. return newprot;
  894. }
  895. #endif
  896. #endif /* CONFIG_MMU */
  897. #ifndef pgprot_encrypted
  898. #define pgprot_encrypted(prot) (prot)
  899. #endif
  900. #ifndef pgprot_decrypted
  901. #define pgprot_decrypted(prot) (prot)
  902. #endif
  903. /*
  904. * A facility to provide lazy MMU batching. This allows PTE updates and
  905. * page invalidations to be delayed until a call to leave lazy MMU mode
  906. * is issued. Some architectures may benefit from doing this, and it is
  907. * beneficial for both shadow and direct mode hypervisors, which may batch
  908. * the PTE updates which happen during this window. Note that using this
  909. * interface requires that read hazards be removed from the code. A read
  910. * hazard could result in the direct mode hypervisor case, since the actual
  911. * write to the page tables may not yet have taken place, so reads though
  912. * a raw PTE pointer after it has been modified are not guaranteed to be
  913. * up to date. This mode can only be entered and left under the protection of
  914. * the page table locks for all page tables which may be modified. In the UP
  915. * case, this is required so that preemption is disabled, and in the SMP case,
  916. * it must synchronize the delayed page table writes properly on other CPUs.
  917. */
  918. #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
  919. #define arch_enter_lazy_mmu_mode() do {} while (0)
  920. #define arch_leave_lazy_mmu_mode() do {} while (0)
  921. #define arch_flush_lazy_mmu_mode() do {} while (0)
  922. #endif
  923. /*
  924. * A facility to provide batching of the reload of page tables and
  925. * other process state with the actual context switch code for
  926. * paravirtualized guests. By convention, only one of the batched
  927. * update (lazy) modes (CPU, MMU) should be active at any given time,
  928. * entry should never be nested, and entry and exits should always be
  929. * paired. This is for sanity of maintaining and reasoning about the
  930. * kernel code. In this case, the exit (end of the context switch) is
  931. * in architecture-specific code, and so doesn't need a generic
  932. * definition.
  933. */
  934. #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
  935. #define arch_start_context_switch(prev) do {} while (0)
  936. #endif
  937. /*
  938. * When replacing an anonymous page by a real (!non) swap entry, we clear
  939. * PG_anon_exclusive from the page and instead remember whether the flag was
  940. * set in the swp pte. During fork(), we have to mark the entry as !exclusive
  941. * (possibly shared). On swapin, we use that information to restore
  942. * PG_anon_exclusive, which is very helpful in cases where we might have
  943. * additional (e.g., FOLL_GET) references on a page and wouldn't be able to
  944. * detect exclusivity.
  945. *
  946. * These functions don't apply to non-swap entries (e.g., migration, hwpoison,
  947. * ...).
  948. */
  949. #ifndef __HAVE_ARCH_PTE_SWP_EXCLUSIVE
  950. static inline pte_t pte_swp_mkexclusive(pte_t pte)
  951. {
  952. return pte;
  953. }
  954. static inline int pte_swp_exclusive(pte_t pte)
  955. {
  956. return false;
  957. }
  958. static inline pte_t pte_swp_clear_exclusive(pte_t pte)
  959. {
  960. return pte;
  961. }
  962. #endif
  963. #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
  964. #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
  965. static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
  966. {
  967. return pmd;
  968. }
  969. static inline int pmd_swp_soft_dirty(pmd_t pmd)
  970. {
  971. return 0;
  972. }
  973. static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
  974. {
  975. return pmd;
  976. }
  977. #endif
  978. #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
  979. static inline int pte_soft_dirty(pte_t pte)
  980. {
  981. return 0;
  982. }
  983. static inline int pmd_soft_dirty(pmd_t pmd)
  984. {
  985. return 0;
  986. }
  987. static inline pte_t pte_mksoft_dirty(pte_t pte)
  988. {
  989. return pte;
  990. }
  991. static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
  992. {
  993. return pmd;
  994. }
  995. static inline pte_t pte_clear_soft_dirty(pte_t pte)
  996. {
  997. return pte;
  998. }
  999. static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
  1000. {
  1001. return pmd;
  1002. }
  1003. static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
  1004. {
  1005. return pte;
  1006. }
  1007. static inline int pte_swp_soft_dirty(pte_t pte)
  1008. {
  1009. return 0;
  1010. }
  1011. static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
  1012. {
  1013. return pte;
  1014. }
  1015. static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
  1016. {
  1017. return pmd;
  1018. }
  1019. static inline int pmd_swp_soft_dirty(pmd_t pmd)
  1020. {
  1021. return 0;
  1022. }
  1023. static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
  1024. {
  1025. return pmd;
  1026. }
  1027. #endif
  1028. #ifndef __HAVE_PFNMAP_TRACKING
  1029. /*
  1030. * Interfaces that can be used by architecture code to keep track of
  1031. * memory type of pfn mappings specified by the remap_pfn_range,
  1032. * vmf_insert_pfn.
  1033. */
  1034. /*
  1035. * track_pfn_remap is called when a _new_ pfn mapping is being established
  1036. * by remap_pfn_range() for physical range indicated by pfn and size.
  1037. */
  1038. static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
  1039. unsigned long pfn, unsigned long addr,
  1040. unsigned long size)
  1041. {
  1042. return 0;
  1043. }
  1044. /*
  1045. * track_pfn_insert is called when a _new_ single pfn is established
  1046. * by vmf_insert_pfn().
  1047. */
  1048. static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
  1049. pfn_t pfn)
  1050. {
  1051. }
  1052. /*
  1053. * track_pfn_copy is called when vma that is covering the pfnmap gets
  1054. * copied through copy_page_range().
  1055. */
  1056. static inline int track_pfn_copy(struct vm_area_struct *vma)
  1057. {
  1058. return 0;
  1059. }
  1060. /*
  1061. * untrack_pfn is called while unmapping a pfnmap for a region.
  1062. * untrack can be called for a specific region indicated by pfn and size or
  1063. * can be for the entire vma (in which case pfn, size are zero).
  1064. */
  1065. static inline void untrack_pfn(struct vm_area_struct *vma,
  1066. unsigned long pfn, unsigned long size,
  1067. bool mm_wr_locked)
  1068. {
  1069. }
  1070. /*
  1071. * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
  1072. */
  1073. static inline void untrack_pfn_moved(struct vm_area_struct *vma)
  1074. {
  1075. }
  1076. #else
  1077. extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
  1078. unsigned long pfn, unsigned long addr,
  1079. unsigned long size);
  1080. extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
  1081. pfn_t pfn);
  1082. extern int track_pfn_copy(struct vm_area_struct *vma);
  1083. extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
  1084. unsigned long size, bool mm_wr_locked);
  1085. extern void untrack_pfn_moved(struct vm_area_struct *vma);
  1086. #endif
  1087. #ifdef CONFIG_MMU
  1088. #ifdef __HAVE_COLOR_ZERO_PAGE
  1089. static inline int is_zero_pfn(unsigned long pfn)
  1090. {
  1091. extern unsigned long zero_pfn;
  1092. unsigned long offset_from_zero_pfn = pfn - zero_pfn;
  1093. return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
  1094. }
  1095. #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
  1096. #else
  1097. static inline int is_zero_pfn(unsigned long pfn)
  1098. {
  1099. extern unsigned long zero_pfn;
  1100. return pfn == zero_pfn;
  1101. }
  1102. static inline unsigned long my_zero_pfn(unsigned long addr)
  1103. {
  1104. extern unsigned long zero_pfn;
  1105. return zero_pfn;
  1106. }
  1107. #endif
  1108. #else
  1109. static inline int is_zero_pfn(unsigned long pfn)
  1110. {
  1111. return 0;
  1112. }
  1113. static inline unsigned long my_zero_pfn(unsigned long addr)
  1114. {
  1115. return 0;
  1116. }
  1117. #endif /* CONFIG_MMU */
  1118. #ifdef CONFIG_MMU
  1119. #ifndef CONFIG_TRANSPARENT_HUGEPAGE
  1120. static inline int pmd_trans_huge(pmd_t pmd)
  1121. {
  1122. return 0;
  1123. }
  1124. #ifndef pmd_write
  1125. static inline int pmd_write(pmd_t pmd)
  1126. {
  1127. BUG();
  1128. return 0;
  1129. }
  1130. #endif /* pmd_write */
  1131. #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
  1132. #ifndef pud_write
  1133. static inline int pud_write(pud_t pud)
  1134. {
  1135. BUG();
  1136. return 0;
  1137. }
  1138. #endif /* pud_write */
  1139. #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
  1140. static inline int pmd_devmap(pmd_t pmd)
  1141. {
  1142. return 0;
  1143. }
  1144. static inline int pud_devmap(pud_t pud)
  1145. {
  1146. return 0;
  1147. }
  1148. static inline int pgd_devmap(pgd_t pgd)
  1149. {
  1150. return 0;
  1151. }
  1152. #endif
  1153. #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
  1154. !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
  1155. static inline int pud_trans_huge(pud_t pud)
  1156. {
  1157. return 0;
  1158. }
  1159. #endif
  1160. /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
  1161. static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
  1162. {
  1163. pud_t pudval = READ_ONCE(*pud);
  1164. if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
  1165. return 1;
  1166. if (unlikely(pud_bad(pudval))) {
  1167. pud_clear_bad(pud);
  1168. return 1;
  1169. }
  1170. return 0;
  1171. }
  1172. /* See pmd_trans_unstable for discussion. */
  1173. static inline int pud_trans_unstable(pud_t *pud)
  1174. {
  1175. #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
  1176. defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
  1177. return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
  1178. #else
  1179. return 0;
  1180. #endif
  1181. }
  1182. #ifndef pmd_read_atomic
  1183. static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
  1184. {
  1185. /*
  1186. * Depend on compiler for an atomic pmd read. NOTE: this is
  1187. * only going to work, if the pmdval_t isn't larger than
  1188. * an unsigned long.
  1189. */
  1190. return *pmdp;
  1191. }
  1192. #endif
  1193. #ifndef arch_needs_pgtable_deposit
  1194. #define arch_needs_pgtable_deposit() (false)
  1195. #endif
  1196. /*
  1197. * This function is meant to be used by sites walking pagetables with
  1198. * the mmap_lock held in read mode to protect against MADV_DONTNEED and
  1199. * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
  1200. * into a null pmd and the transhuge page fault can convert a null pmd
  1201. * into an hugepmd or into a regular pmd (if the hugepage allocation
  1202. * fails). While holding the mmap_lock in read mode the pmd becomes
  1203. * stable and stops changing under us only if it's not null and not a
  1204. * transhuge pmd. When those races occurs and this function makes a
  1205. * difference vs the standard pmd_none_or_clear_bad, the result is
  1206. * undefined so behaving like if the pmd was none is safe (because it
  1207. * can return none anyway). The compiler level barrier() is critically
  1208. * important to compute the two checks atomically on the same pmdval.
  1209. *
  1210. * For 32bit kernels with a 64bit large pmd_t this automatically takes
  1211. * care of reading the pmd atomically to avoid SMP race conditions
  1212. * against pmd_populate() when the mmap_lock is hold for reading by the
  1213. * caller (a special atomic read not done by "gcc" as in the generic
  1214. * version above, is also needed when THP is disabled because the page
  1215. * fault can populate the pmd from under us).
  1216. */
  1217. static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
  1218. {
  1219. pmd_t pmdval = pmd_read_atomic(pmd);
  1220. /*
  1221. * The barrier will stabilize the pmdval in a register or on
  1222. * the stack so that it will stop changing under the code.
  1223. *
  1224. * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
  1225. * pmd_read_atomic is allowed to return a not atomic pmdval
  1226. * (for example pointing to an hugepage that has never been
  1227. * mapped in the pmd). The below checks will only care about
  1228. * the low part of the pmd with 32bit PAE x86 anyway, with the
  1229. * exception of pmd_none(). So the important thing is that if
  1230. * the low part of the pmd is found null, the high part will
  1231. * be also null or the pmd_none() check below would be
  1232. * confused.
  1233. */
  1234. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  1235. barrier();
  1236. #endif
  1237. /*
  1238. * !pmd_present() checks for pmd migration entries
  1239. *
  1240. * The complete check uses is_pmd_migration_entry() in linux/swapops.h
  1241. * But using that requires moving current function and pmd_trans_unstable()
  1242. * to linux/swapops.h to resolve dependency, which is too much code move.
  1243. *
  1244. * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
  1245. * because !pmd_present() pages can only be under migration not swapped
  1246. * out.
  1247. *
  1248. * pmd_none() is preserved for future condition checks on pmd migration
  1249. * entries and not confusing with this function name, although it is
  1250. * redundant with !pmd_present().
  1251. */
  1252. if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
  1253. (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
  1254. return 1;
  1255. if (unlikely(pmd_bad(pmdval))) {
  1256. pmd_clear_bad(pmd);
  1257. return 1;
  1258. }
  1259. return 0;
  1260. }
  1261. /*
  1262. * This is a noop if Transparent Hugepage Support is not built into
  1263. * the kernel. Otherwise it is equivalent to
  1264. * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
  1265. * places that already verified the pmd is not none and they want to
  1266. * walk ptes while holding the mmap sem in read mode (write mode don't
  1267. * need this). If THP is not enabled, the pmd can't go away under the
  1268. * code even if MADV_DONTNEED runs, but if THP is enabled we need to
  1269. * run a pmd_trans_unstable before walking the ptes after
  1270. * split_huge_pmd returns (because it may have run when the pmd become
  1271. * null, but then a page fault can map in a THP and not a regular page).
  1272. */
  1273. static inline int pmd_trans_unstable(pmd_t *pmd)
  1274. {
  1275. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  1276. return pmd_none_or_trans_huge_or_clear_bad(pmd);
  1277. #else
  1278. return 0;
  1279. #endif
  1280. }
  1281. /*
  1282. * the ordering of these checks is important for pmds with _page_devmap set.
  1283. * if we check pmd_trans_unstable() first we will trip the bad_pmd() check
  1284. * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly
  1285. * returning 1 but not before it spams dmesg with the pmd_clear_bad() output.
  1286. */
  1287. static inline int pmd_devmap_trans_unstable(pmd_t *pmd)
  1288. {
  1289. return pmd_devmap(*pmd) || pmd_trans_unstable(pmd);
  1290. }
  1291. #ifndef CONFIG_NUMA_BALANCING
  1292. /*
  1293. * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
  1294. * the only case the kernel cares is for NUMA balancing and is only ever set
  1295. * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
  1296. * _PAGE_PROTNONE so by default, implement the helper as "always no". It
  1297. * is the responsibility of the caller to distinguish between PROT_NONE
  1298. * protections and NUMA hinting fault protections.
  1299. */
  1300. static inline int pte_protnone(pte_t pte)
  1301. {
  1302. return 0;
  1303. }
  1304. static inline int pmd_protnone(pmd_t pmd)
  1305. {
  1306. return 0;
  1307. }
  1308. #endif /* CONFIG_NUMA_BALANCING */
  1309. #endif /* CONFIG_MMU */
  1310. #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
  1311. #ifndef __PAGETABLE_P4D_FOLDED
  1312. int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
  1313. void p4d_clear_huge(p4d_t *p4d);
  1314. #else
  1315. static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
  1316. {
  1317. return 0;
  1318. }
  1319. static inline void p4d_clear_huge(p4d_t *p4d) { }
  1320. #endif /* !__PAGETABLE_P4D_FOLDED */
  1321. int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
  1322. int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
  1323. int pud_clear_huge(pud_t *pud);
  1324. int pmd_clear_huge(pmd_t *pmd);
  1325. int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
  1326. int pud_free_pmd_page(pud_t *pud, unsigned long addr);
  1327. int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
  1328. #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
  1329. static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
  1330. {
  1331. return 0;
  1332. }
  1333. static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
  1334. {
  1335. return 0;
  1336. }
  1337. static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
  1338. {
  1339. return 0;
  1340. }
  1341. static inline void p4d_clear_huge(p4d_t *p4d) { }
  1342. static inline int pud_clear_huge(pud_t *pud)
  1343. {
  1344. return 0;
  1345. }
  1346. static inline int pmd_clear_huge(pmd_t *pmd)
  1347. {
  1348. return 0;
  1349. }
  1350. static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
  1351. {
  1352. return 0;
  1353. }
  1354. static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
  1355. {
  1356. return 0;
  1357. }
  1358. static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
  1359. {
  1360. return 0;
  1361. }
  1362. #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
  1363. #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
  1364. #ifdef CONFIG_TRANSPARENT_HUGEPAGE
  1365. /*
  1366. * ARCHes with special requirements for evicting THP backing TLB entries can
  1367. * implement this. Otherwise also, it can help optimize normal TLB flush in
  1368. * THP regime. Stock flush_tlb_range() typically has optimization to nuke the
  1369. * entire TLB if flush span is greater than a threshold, which will
  1370. * likely be true for a single huge page. Thus a single THP flush will
  1371. * invalidate the entire TLB which is not desirable.
  1372. * e.g. see arch/arc: flush_pmd_tlb_range
  1373. */
  1374. #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
  1375. #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
  1376. #else
  1377. #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
  1378. #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
  1379. #endif
  1380. #endif
  1381. struct file;
  1382. int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
  1383. unsigned long size, pgprot_t *vma_prot);
  1384. #ifndef CONFIG_X86_ESPFIX64
  1385. static inline void init_espfix_bsp(void) { }
  1386. #endif
  1387. extern void __init pgtable_cache_init(void);
  1388. #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
  1389. static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
  1390. {
  1391. return true;
  1392. }
  1393. static inline bool arch_has_pfn_modify_check(void)
  1394. {
  1395. return false;
  1396. }
  1397. #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
  1398. /*
  1399. * Architecture PAGE_KERNEL_* fallbacks
  1400. *
  1401. * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
  1402. * because they really don't support them, or the port needs to be updated to
  1403. * reflect the required functionality. Below are a set of relatively safe
  1404. * fallbacks, as best effort, which we can count on in lieu of the architectures
  1405. * not defining them on their own yet.
  1406. */
  1407. #ifndef PAGE_KERNEL_RO
  1408. # define PAGE_KERNEL_RO PAGE_KERNEL
  1409. #endif
  1410. #ifndef PAGE_KERNEL_EXEC
  1411. # define PAGE_KERNEL_EXEC PAGE_KERNEL
  1412. #endif
  1413. /*
  1414. * Page Table Modification bits for pgtbl_mod_mask.
  1415. *
  1416. * These are used by the p?d_alloc_track*() set of functions an in the generic
  1417. * vmalloc/ioremap code to track at which page-table levels entries have been
  1418. * modified. Based on that the code can better decide when vmalloc and ioremap
  1419. * mapping changes need to be synchronized to other page-tables in the system.
  1420. */
  1421. #define __PGTBL_PGD_MODIFIED 0
  1422. #define __PGTBL_P4D_MODIFIED 1
  1423. #define __PGTBL_PUD_MODIFIED 2
  1424. #define __PGTBL_PMD_MODIFIED 3
  1425. #define __PGTBL_PTE_MODIFIED 4
  1426. #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
  1427. #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
  1428. #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
  1429. #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
  1430. #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
  1431. /* Page-Table Modification Mask */
  1432. typedef unsigned int pgtbl_mod_mask;
  1433. #endif /* !__ASSEMBLY__ */
  1434. #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
  1435. #ifdef CONFIG_PHYS_ADDR_T_64BIT
  1436. /*
  1437. * ZSMALLOC needs to know the highest PFN on 32-bit architectures
  1438. * with physical address space extension, but falls back to
  1439. * BITS_PER_LONG otherwise.
  1440. */
  1441. #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
  1442. #else
  1443. #define MAX_POSSIBLE_PHYSMEM_BITS 32
  1444. #endif
  1445. #endif
  1446. #ifndef has_transparent_hugepage
  1447. #define has_transparent_hugepage() IS_BUILTIN(CONFIG_TRANSPARENT_HUGEPAGE)
  1448. #endif
  1449. /*
  1450. * On some architectures it depends on the mm if the p4d/pud or pmd
  1451. * layer of the page table hierarchy is folded or not.
  1452. */
  1453. #ifndef mm_p4d_folded
  1454. #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
  1455. #endif
  1456. #ifndef mm_pud_folded
  1457. #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
  1458. #endif
  1459. #ifndef mm_pmd_folded
  1460. #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
  1461. #endif
  1462. #ifndef p4d_offset_lockless
  1463. #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
  1464. #endif
  1465. #ifndef pud_offset_lockless
  1466. #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
  1467. #endif
  1468. #ifndef pmd_offset_lockless
  1469. #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
  1470. #endif
  1471. /*
  1472. * p?d_leaf() - true if this entry is a final mapping to a physical address.
  1473. * This differs from p?d_huge() by the fact that they are always available (if
  1474. * the architecture supports large pages at the appropriate level) even
  1475. * if CONFIG_HUGETLB_PAGE is not defined.
  1476. * Only meaningful when called on a valid entry.
  1477. */
  1478. #ifndef pgd_leaf
  1479. #define pgd_leaf(x) 0
  1480. #endif
  1481. #ifndef p4d_leaf
  1482. #define p4d_leaf(x) 0
  1483. #endif
  1484. #ifndef pud_leaf
  1485. #define pud_leaf(x) 0
  1486. #endif
  1487. #ifndef pmd_leaf
  1488. #define pmd_leaf(x) 0
  1489. #endif
  1490. #ifndef pgd_leaf_size
  1491. #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT)
  1492. #endif
  1493. #ifndef p4d_leaf_size
  1494. #define p4d_leaf_size(x) P4D_SIZE
  1495. #endif
  1496. #ifndef pud_leaf_size
  1497. #define pud_leaf_size(x) PUD_SIZE
  1498. #endif
  1499. #ifndef pmd_leaf_size
  1500. #define pmd_leaf_size(x) PMD_SIZE
  1501. #endif
  1502. #ifndef pte_leaf_size
  1503. #define pte_leaf_size(x) PAGE_SIZE
  1504. #endif
  1505. /*
  1506. * Some architectures have MMUs that are configurable or selectable at boot
  1507. * time. These lead to variable PTRS_PER_x. For statically allocated arrays it
  1508. * helps to have a static maximum value.
  1509. */
  1510. #ifndef MAX_PTRS_PER_PTE
  1511. #define MAX_PTRS_PER_PTE PTRS_PER_PTE
  1512. #endif
  1513. #ifndef MAX_PTRS_PER_PMD
  1514. #define MAX_PTRS_PER_PMD PTRS_PER_PMD
  1515. #endif
  1516. #ifndef MAX_PTRS_PER_PUD
  1517. #define MAX_PTRS_PER_PUD PTRS_PER_PUD
  1518. #endif
  1519. #ifndef MAX_PTRS_PER_P4D
  1520. #define MAX_PTRS_PER_P4D PTRS_PER_P4D
  1521. #endif
  1522. /* description of effects of mapping type and prot in current implementation.
  1523. * this is due to the limited x86 page protection hardware. The expected
  1524. * behavior is in parens:
  1525. *
  1526. * map_type prot
  1527. * PROT_NONE PROT_READ PROT_WRITE PROT_EXEC
  1528. * MAP_SHARED r: (no) no r: (yes) yes r: (no) yes r: (no) yes
  1529. * w: (no) no w: (no) no w: (yes) yes w: (no) no
  1530. * x: (no) no x: (no) yes x: (no) yes x: (yes) yes
  1531. *
  1532. * MAP_PRIVATE r: (no) no r: (yes) yes r: (no) yes r: (no) yes
  1533. * w: (no) no w: (no) no w: (copy) copy w: (no) no
  1534. * x: (no) no x: (no) yes x: (no) yes x: (yes) yes
  1535. *
  1536. * On arm64, PROT_EXEC has the following behaviour for both MAP_SHARED and
  1537. * MAP_PRIVATE (with Enhanced PAN supported):
  1538. * r: (no) no
  1539. * w: (no) no
  1540. * x: (yes) yes
  1541. */
  1542. #define DECLARE_VM_GET_PAGE_PROT \
  1543. pgprot_t vm_get_page_prot(unsigned long vm_flags) \
  1544. { \
  1545. return protection_map[vm_flags & \
  1546. (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)]; \
  1547. } \
  1548. EXPORT_SYMBOL(vm_get_page_prot);
  1549. #endif /* _LINUX_PGTABLE_H */