master.h 25 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2018 Cadence Design Systems Inc.
  4. *
  5. * Author: Boris Brezillon <[email protected]>
  6. */
  7. #ifndef I3C_MASTER_H
  8. #define I3C_MASTER_H
  9. #include <asm/bitsperlong.h>
  10. #include <linux/bitops.h>
  11. #include <linux/i2c.h>
  12. #include <linux/i3c/ccc.h>
  13. #include <linux/i3c/device.h>
  14. #include <linux/rwsem.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/workqueue.h>
  17. #define I3C_HOT_JOIN_ADDR 0x2
  18. #define I3C_BROADCAST_ADDR 0x7e
  19. #define I3C_MAX_ADDR GENMASK(6, 0)
  20. struct i3c_master_controller;
  21. struct i3c_bus;
  22. struct i2c_device;
  23. struct i3c_device;
  24. /**
  25. * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
  26. * @node: node element used to insert the slot into the I2C or I3C device
  27. * list
  28. * @master: I3C master that instantiated this device. Will be used to do
  29. * I2C/I3C transfers
  30. * @master_priv: master private data assigned to the device. Can be used to
  31. * add master specific information
  32. *
  33. * This structure is describing common I3C/I2C dev information.
  34. */
  35. struct i3c_i2c_dev_desc {
  36. struct list_head node;
  37. struct i3c_master_controller *master;
  38. void *master_priv;
  39. };
  40. #define I3C_LVR_I2C_INDEX_MASK GENMASK(7, 5)
  41. #define I3C_LVR_I2C_INDEX(x) ((x) << 5)
  42. #define I3C_LVR_I2C_FM_MODE BIT(4)
  43. #define I2C_MAX_ADDR GENMASK(6, 0)
  44. /**
  45. * struct i2c_dev_boardinfo - I2C device board information
  46. * @node: used to insert the boardinfo object in the I2C boardinfo list
  47. * @base: regular I2C board information
  48. * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
  49. * the I2C device limitations
  50. *
  51. * This structure is used to attach board-level information to an I2C device.
  52. * Each I2C device connected on the I3C bus should have one.
  53. */
  54. struct i2c_dev_boardinfo {
  55. struct list_head node;
  56. struct i2c_board_info base;
  57. u8 lvr;
  58. };
  59. /**
  60. * struct i2c_dev_desc - I2C device descriptor
  61. * @common: common part of the I2C device descriptor
  62. * @boardinfo: pointer to the boardinfo attached to this I2C device
  63. * @dev: I2C device object registered to the I2C framework
  64. * @addr: I2C device address
  65. * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
  66. * the I2C device limitations
  67. *
  68. * Each I2C device connected on the bus will have an i2c_dev_desc.
  69. * This object is created by the core and later attached to the controller
  70. * using &struct_i3c_master_controller->ops->attach_i2c_dev().
  71. *
  72. * &struct_i2c_dev_desc is the internal representation of an I2C device
  73. * connected on an I3C bus. This object is also passed to all
  74. * &struct_i3c_master_controller_ops hooks.
  75. */
  76. struct i2c_dev_desc {
  77. struct i3c_i2c_dev_desc common;
  78. struct i2c_client *dev;
  79. u16 addr;
  80. u8 lvr;
  81. };
  82. /**
  83. * struct i3c_ibi_slot - I3C IBI (In-Band Interrupt) slot
  84. * @work: work associated to this slot. The IBI handler will be called from
  85. * there
  86. * @dev: the I3C device that has generated this IBI
  87. * @len: length of the payload associated to this IBI
  88. * @data: payload buffer
  89. *
  90. * An IBI slot is an object pre-allocated by the controller and used when an
  91. * IBI comes in.
  92. * Every time an IBI comes in, the I3C master driver should find a free IBI
  93. * slot in its IBI slot pool, retrieve the IBI payload and queue the IBI using
  94. * i3c_master_queue_ibi().
  95. *
  96. * How IBI slots are allocated is left to the I3C master driver, though, for
  97. * simple kmalloc-based allocation, the generic IBI slot pool can be used.
  98. */
  99. struct i3c_ibi_slot {
  100. struct work_struct work;
  101. struct i3c_dev_desc *dev;
  102. unsigned int len;
  103. void *data;
  104. };
  105. /**
  106. * struct i3c_device_ibi_info - IBI information attached to a specific device
  107. * @all_ibis_handled: used to be informed when no more IBIs are waiting to be
  108. * processed. Used by i3c_device_disable_ibi() to wait for
  109. * all IBIs to be dequeued
  110. * @pending_ibis: count the number of pending IBIs. Each pending IBI has its
  111. * work element queued to the controller workqueue
  112. * @max_payload_len: maximum payload length for an IBI coming from this device.
  113. * this value is specified when calling
  114. * i3c_device_request_ibi() and should not change at run
  115. * time. All messages IBIs exceeding this limit should be
  116. * rejected by the master
  117. * @num_slots: number of IBI slots reserved for this device
  118. * @enabled: reflect the IBI status
  119. * @handler: IBI handler specified at i3c_device_request_ibi() call time. This
  120. * handler will be called from the controller workqueue, and as such
  121. * is allowed to sleep (though it is recommended to process the IBI
  122. * as fast as possible to not stall processing of other IBIs queued
  123. * on the same workqueue).
  124. * New I3C messages can be sent from the IBI handler
  125. *
  126. * The &struct_i3c_device_ibi_info object is allocated when
  127. * i3c_device_request_ibi() is called and attached to a specific device. This
  128. * object is here to manage IBIs coming from a specific I3C device.
  129. *
  130. * Note that this structure is the generic view of the IBI management
  131. * infrastructure. I3C master drivers may have their own internal
  132. * representation which they can associate to the device using
  133. * controller-private data.
  134. */
  135. struct i3c_device_ibi_info {
  136. struct completion all_ibis_handled;
  137. atomic_t pending_ibis;
  138. unsigned int max_payload_len;
  139. unsigned int num_slots;
  140. unsigned int enabled;
  141. void (*handler)(struct i3c_device *dev,
  142. const struct i3c_ibi_payload *payload);
  143. };
  144. /**
  145. * struct i3c_dev_boardinfo - I3C device board information
  146. * @node: used to insert the boardinfo object in the I3C boardinfo list
  147. * @init_dyn_addr: initial dynamic address requested by the FW. We provide no
  148. * guarantee that the device will end up using this address,
  149. * but try our best to assign this specific address to the
  150. * device
  151. * @static_addr: static address the I3C device listen on before it's been
  152. * assigned a dynamic address by the master. Will be used during
  153. * bus initialization to assign it a specific dynamic address
  154. * before starting DAA (Dynamic Address Assignment)
  155. * @pid: I3C Provisional ID exposed by the device. This is a unique identifier
  156. * that may be used to attach boardinfo to i3c_dev_desc when the device
  157. * does not have a static address
  158. * @of_node: optional DT node in case the device has been described in the DT
  159. *
  160. * This structure is used to attach board-level information to an I3C device.
  161. * Not all I3C devices connected on the bus will have a boardinfo. It's only
  162. * needed if you want to attach extra resources to a device or assign it a
  163. * specific dynamic address.
  164. */
  165. struct i3c_dev_boardinfo {
  166. struct list_head node;
  167. u8 init_dyn_addr;
  168. u8 static_addr;
  169. u64 pid;
  170. struct device_node *of_node;
  171. };
  172. /**
  173. * struct i3c_dev_desc - I3C device descriptor
  174. * @common: common part of the I3C device descriptor
  175. * @info: I3C device information. Will be automatically filled when you create
  176. * your device with i3c_master_add_i3c_dev_locked()
  177. * @ibi_lock: lock used to protect the &struct_i3c_device->ibi
  178. * @ibi: IBI info attached to a device. Should be NULL until
  179. * i3c_device_request_ibi() is called
  180. * @dev: pointer to the I3C device object exposed to I3C device drivers. This
  181. * should never be accessed from I3C master controller drivers. Only core
  182. * code should manipulate it in when updating the dev <-> desc link or
  183. * when propagating IBI events to the driver
  184. * @boardinfo: pointer to the boardinfo attached to this I3C device
  185. *
  186. * Internal representation of an I3C device. This object is only used by the
  187. * core and passed to I3C master controller drivers when they're requested to
  188. * do some operations on the device.
  189. * The core maintains the link between the internal I3C dev descriptor and the
  190. * object exposed to the I3C device drivers (&struct_i3c_device).
  191. */
  192. struct i3c_dev_desc {
  193. struct i3c_i2c_dev_desc common;
  194. struct i3c_device_info info;
  195. struct mutex ibi_lock;
  196. struct i3c_device_ibi_info *ibi;
  197. struct i3c_device *dev;
  198. const struct i3c_dev_boardinfo *boardinfo;
  199. };
  200. /**
  201. * struct i3c_device - I3C device object
  202. * @dev: device object to register the I3C dev to the device model
  203. * @desc: pointer to an i3c device descriptor object. This link is updated
  204. * every time the I3C device is rediscovered with a different dynamic
  205. * address assigned
  206. * @bus: I3C bus this device is attached to
  207. *
  208. * I3C device object exposed to I3C device drivers. The takes care of linking
  209. * this object to the relevant &struct_i3c_dev_desc one.
  210. * All I3C devs on the I3C bus are represented, including I3C masters. For each
  211. * of them, we have an instance of &struct i3c_device.
  212. */
  213. struct i3c_device {
  214. struct device dev;
  215. struct i3c_dev_desc *desc;
  216. struct i3c_bus *bus;
  217. };
  218. /*
  219. * The I3C specification says the maximum number of devices connected on the
  220. * bus is 11, but this number depends on external parameters like trace length,
  221. * capacitive load per Device, and the types of Devices present on the Bus.
  222. * I3C master can also have limitations, so this number is just here as a
  223. * reference and should be adjusted on a per-controller/per-board basis.
  224. */
  225. #define I3C_BUS_MAX_DEVS 11
  226. #define I3C_BUS_MAX_I3C_SCL_RATE 12900000
  227. #define I3C_BUS_TYP_I3C_SCL_RATE 12500000
  228. #define I3C_BUS_I2C_FM_PLUS_SCL_RATE 1000000
  229. #define I3C_BUS_I2C_FM_SCL_RATE 400000
  230. #define I3C_BUS_TLOW_OD_MIN_NS 200
  231. /**
  232. * enum i3c_bus_mode - I3C bus mode
  233. * @I3C_BUS_MODE_PURE: only I3C devices are connected to the bus. No limitation
  234. * expected
  235. * @I3C_BUS_MODE_MIXED_FAST: I2C devices with 50ns spike filter are present on
  236. * the bus. The only impact in this mode is that the
  237. * high SCL pulse has to stay below 50ns to trick I2C
  238. * devices when transmitting I3C frames
  239. * @I3C_BUS_MODE_MIXED_LIMITED: I2C devices without 50ns spike filter are
  240. * present on the bus. However they allow
  241. * compliance up to the maximum SDR SCL clock
  242. * frequency.
  243. * @I3C_BUS_MODE_MIXED_SLOW: I2C devices without 50ns spike filter are present
  244. * on the bus
  245. */
  246. enum i3c_bus_mode {
  247. I3C_BUS_MODE_PURE,
  248. I3C_BUS_MODE_MIXED_FAST,
  249. I3C_BUS_MODE_MIXED_LIMITED,
  250. I3C_BUS_MODE_MIXED_SLOW,
  251. };
  252. /**
  253. * enum i3c_addr_slot_status - I3C address slot status
  254. * @I3C_ADDR_SLOT_FREE: address is free
  255. * @I3C_ADDR_SLOT_RSVD: address is reserved
  256. * @I3C_ADDR_SLOT_I2C_DEV: address is assigned to an I2C device
  257. * @I3C_ADDR_SLOT_I3C_DEV: address is assigned to an I3C device
  258. * @I3C_ADDR_SLOT_STATUS_MASK: address slot mask
  259. *
  260. * On an I3C bus, addresses are assigned dynamically, and we need to know which
  261. * addresses are free to use and which ones are already assigned.
  262. *
  263. * Addresses marked as reserved are those reserved by the I3C protocol
  264. * (broadcast address, ...).
  265. */
  266. enum i3c_addr_slot_status {
  267. I3C_ADDR_SLOT_FREE,
  268. I3C_ADDR_SLOT_RSVD,
  269. I3C_ADDR_SLOT_I2C_DEV,
  270. I3C_ADDR_SLOT_I3C_DEV,
  271. I3C_ADDR_SLOT_STATUS_MASK = 3,
  272. };
  273. /**
  274. * struct i3c_bus - I3C bus object
  275. * @cur_master: I3C master currently driving the bus. Since I3C is multi-master
  276. * this can change over the time. Will be used to let a master
  277. * know whether it needs to request bus ownership before sending
  278. * a frame or not
  279. * @id: bus ID. Assigned by the framework when register the bus
  280. * @addrslots: a bitmap with 2-bits per-slot to encode the address status and
  281. * ease the DAA (Dynamic Address Assignment) procedure (see
  282. * &enum i3c_addr_slot_status)
  283. * @mode: bus mode (see &enum i3c_bus_mode)
  284. * @scl_rate.i3c: maximum rate for the clock signal when doing I3C SDR/priv
  285. * transfers
  286. * @scl_rate.i2c: maximum rate for the clock signal when doing I2C transfers
  287. * @scl_rate: SCL signal rate for I3C and I2C mode
  288. * @devs.i3c: contains a list of I3C device descriptors representing I3C
  289. * devices connected on the bus and successfully attached to the
  290. * I3C master
  291. * @devs.i2c: contains a list of I2C device descriptors representing I2C
  292. * devices connected on the bus and successfully attached to the
  293. * I3C master
  294. * @devs: 2 lists containing all I3C/I2C devices connected to the bus
  295. * @lock: read/write lock on the bus. This is needed to protect against
  296. * operations that have an impact on the whole bus and the devices
  297. * connected to it. For example, when asking slaves to drop their
  298. * dynamic address (RSTDAA CCC), we need to make sure no one is trying
  299. * to send I3C frames to these devices.
  300. * Note that this lock does not protect against concurrency between
  301. * devices: several drivers can send different I3C/I2C frames through
  302. * the same master in parallel. This is the responsibility of the
  303. * master to guarantee that frames are actually sent sequentially and
  304. * not interlaced
  305. *
  306. * The I3C bus is represented with its own object and not implicitly described
  307. * by the I3C master to cope with the multi-master functionality, where one bus
  308. * can be shared amongst several masters, each of them requesting bus ownership
  309. * when they need to.
  310. */
  311. struct i3c_bus {
  312. struct i3c_dev_desc *cur_master;
  313. int id;
  314. unsigned long addrslots[((I2C_MAX_ADDR + 1) * 2) / BITS_PER_LONG];
  315. enum i3c_bus_mode mode;
  316. struct {
  317. unsigned long i3c;
  318. unsigned long i2c;
  319. } scl_rate;
  320. struct {
  321. struct list_head i3c;
  322. struct list_head i2c;
  323. } devs;
  324. struct rw_semaphore lock;
  325. };
  326. /**
  327. * struct i3c_master_controller_ops - I3C master methods
  328. * @bus_init: hook responsible for the I3C bus initialization. You should at
  329. * least call master_set_info() from there and set the bus mode.
  330. * You can also put controller specific initialization in there.
  331. * This method is mandatory.
  332. * @bus_cleanup: cleanup everything done in
  333. * &i3c_master_controller_ops->bus_init().
  334. * This method is optional.
  335. * @attach_i3c_dev: called every time an I3C device is attached to the bus. It
  336. * can be after a DAA or when a device is statically declared
  337. * by the FW, in which case it will only have a static address
  338. * and the dynamic address will be 0.
  339. * When this function is called, device information have not
  340. * been retrieved yet.
  341. * This is a good place to attach master controller specific
  342. * data to I3C devices.
  343. * This method is optional.
  344. * @reattach_i3c_dev: called every time an I3C device has its addressed
  345. * changed. It can be because the device has been powered
  346. * down and has lost its address, or it can happen when a
  347. * device had a static address and has been assigned a
  348. * dynamic address with SETDASA.
  349. * This method is optional.
  350. * @detach_i3c_dev: called when an I3C device is detached from the bus. Usually
  351. * happens when the master device is unregistered.
  352. * This method is optional.
  353. * @do_daa: do a DAA (Dynamic Address Assignment) procedure. This is procedure
  354. * should send an ENTDAA CCC command and then add all devices
  355. * discovered sure the DAA using i3c_master_add_i3c_dev_locked().
  356. * Add devices added with i3c_master_add_i3c_dev_locked() will then be
  357. * attached or re-attached to the controller.
  358. * This method is mandatory.
  359. * @supports_ccc_cmd: should return true if the CCC command is supported, false
  360. * otherwise.
  361. * This method is optional, if not provided the core assumes
  362. * all CCC commands are supported.
  363. * @send_ccc_cmd: send a CCC command
  364. * This method is mandatory.
  365. * @priv_xfers: do one or several private I3C SDR transfers
  366. * This method is mandatory.
  367. * @attach_i2c_dev: called every time an I2C device is attached to the bus.
  368. * This is a good place to attach master controller specific
  369. * data to I2C devices.
  370. * This method is optional.
  371. * @detach_i2c_dev: called when an I2C device is detached from the bus. Usually
  372. * happens when the master device is unregistered.
  373. * This method is optional.
  374. * @i2c_xfers: do one or several I2C transfers. Note that, unlike i3c
  375. * transfers, the core does not guarantee that buffers attached to
  376. * the transfers are DMA-safe. If drivers want to have DMA-safe
  377. * buffers, they should use the i2c_get_dma_safe_msg_buf()
  378. * and i2c_put_dma_safe_msg_buf() helpers provided by the I2C
  379. * framework.
  380. * This method is mandatory.
  381. * @request_ibi: attach an IBI handler to an I3C device. This implies defining
  382. * an IBI handler and the constraints of the IBI (maximum payload
  383. * length and number of pre-allocated slots).
  384. * Some controllers support less IBI-capable devices than regular
  385. * devices, so this method might return -%EBUSY if there's no
  386. * more space for an extra IBI registration
  387. * This method is optional.
  388. * @free_ibi: free an IBI previously requested with ->request_ibi(). The IBI
  389. * should have been disabled with ->disable_irq() prior to that
  390. * This method is mandatory only if ->request_ibi is not NULL.
  391. * @enable_ibi: enable the IBI. Only valid if ->request_ibi() has been called
  392. * prior to ->enable_ibi(). The controller should first enable
  393. * the IBI on the controller end (for example, unmask the hardware
  394. * IRQ) and then send the ENEC CCC command (with the IBI flag set)
  395. * to the I3C device.
  396. * This method is mandatory only if ->request_ibi is not NULL.
  397. * @disable_ibi: disable an IBI. First send the DISEC CCC command with the IBI
  398. * flag set and then deactivate the hardware IRQ on the
  399. * controller end.
  400. * This method is mandatory only if ->request_ibi is not NULL.
  401. * @recycle_ibi_slot: recycle an IBI slot. Called every time an IBI has been
  402. * processed by its handler. The IBI slot should be put back
  403. * in the IBI slot pool so that the controller can re-use it
  404. * for a future IBI
  405. * This method is mandatory only if ->request_ibi is not
  406. * NULL.
  407. */
  408. struct i3c_master_controller_ops {
  409. int (*bus_init)(struct i3c_master_controller *master);
  410. void (*bus_cleanup)(struct i3c_master_controller *master);
  411. int (*attach_i3c_dev)(struct i3c_dev_desc *dev);
  412. int (*reattach_i3c_dev)(struct i3c_dev_desc *dev, u8 old_dyn_addr);
  413. void (*detach_i3c_dev)(struct i3c_dev_desc *dev);
  414. int (*do_daa)(struct i3c_master_controller *master);
  415. bool (*supports_ccc_cmd)(struct i3c_master_controller *master,
  416. const struct i3c_ccc_cmd *cmd);
  417. int (*send_ccc_cmd)(struct i3c_master_controller *master,
  418. struct i3c_ccc_cmd *cmd);
  419. int (*priv_xfers)(struct i3c_dev_desc *dev,
  420. struct i3c_priv_xfer *xfers,
  421. int nxfers);
  422. int (*attach_i2c_dev)(struct i2c_dev_desc *dev);
  423. void (*detach_i2c_dev)(struct i2c_dev_desc *dev);
  424. int (*i2c_xfers)(struct i2c_dev_desc *dev,
  425. const struct i2c_msg *xfers, int nxfers);
  426. int (*request_ibi)(struct i3c_dev_desc *dev,
  427. const struct i3c_ibi_setup *req);
  428. void (*free_ibi)(struct i3c_dev_desc *dev);
  429. int (*enable_ibi)(struct i3c_dev_desc *dev);
  430. int (*disable_ibi)(struct i3c_dev_desc *dev);
  431. void (*recycle_ibi_slot)(struct i3c_dev_desc *dev,
  432. struct i3c_ibi_slot *slot);
  433. };
  434. /**
  435. * struct i3c_master_controller - I3C master controller object
  436. * @dev: device to be registered to the device-model
  437. * @this: an I3C device object representing this master. This device will be
  438. * added to the list of I3C devs available on the bus
  439. * @i2c: I2C adapter used for backward compatibility. This adapter is
  440. * registered to the I2C subsystem to be as transparent as possible to
  441. * existing I2C drivers
  442. * @ops: master operations. See &struct i3c_master_controller_ops
  443. * @secondary: true if the master is a secondary master
  444. * @init_done: true when the bus initialization is done
  445. * @boardinfo.i3c: list of I3C boardinfo objects
  446. * @boardinfo.i2c: list of I2C boardinfo objects
  447. * @boardinfo: board-level information attached to devices connected on the bus
  448. * @bus: I3C bus exposed by this master
  449. * @wq: workqueue used to execute IBI handlers. Can also be used by master
  450. * drivers if they need to postpone operations that need to take place
  451. * in a thread context. Typical examples are Hot Join processing which
  452. * requires taking the bus lock in maintenance, which in turn, can only
  453. * be done from a sleep-able context
  454. *
  455. * A &struct i3c_master_controller has to be registered to the I3C subsystem
  456. * through i3c_master_register(). None of &struct i3c_master_controller fields
  457. * should be set manually, just pass appropriate values to
  458. * i3c_master_register().
  459. */
  460. struct i3c_master_controller {
  461. struct device dev;
  462. struct i3c_dev_desc *this;
  463. struct i2c_adapter i2c;
  464. const struct i3c_master_controller_ops *ops;
  465. unsigned int secondary : 1;
  466. unsigned int init_done : 1;
  467. struct {
  468. struct list_head i3c;
  469. struct list_head i2c;
  470. } boardinfo;
  471. struct i3c_bus bus;
  472. struct workqueue_struct *wq;
  473. };
  474. /**
  475. * i3c_bus_for_each_i2cdev() - iterate over all I2C devices present on the bus
  476. * @bus: the I3C bus
  477. * @dev: an I2C device descriptor pointer updated to point to the current slot
  478. * at each iteration of the loop
  479. *
  480. * Iterate over all I2C devs present on the bus.
  481. */
  482. #define i3c_bus_for_each_i2cdev(bus, dev) \
  483. list_for_each_entry(dev, &(bus)->devs.i2c, common.node)
  484. /**
  485. * i3c_bus_for_each_i3cdev() - iterate over all I3C devices present on the bus
  486. * @bus: the I3C bus
  487. * @dev: and I3C device descriptor pointer updated to point to the current slot
  488. * at each iteration of the loop
  489. *
  490. * Iterate over all I3C devs present on the bus.
  491. */
  492. #define i3c_bus_for_each_i3cdev(bus, dev) \
  493. list_for_each_entry(dev, &(bus)->devs.i3c, common.node)
  494. int i3c_master_do_i2c_xfers(struct i3c_master_controller *master,
  495. const struct i2c_msg *xfers,
  496. int nxfers);
  497. int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
  498. u8 evts);
  499. int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
  500. u8 evts);
  501. int i3c_master_entdaa_locked(struct i3c_master_controller *master);
  502. int i3c_master_defslvs_locked(struct i3c_master_controller *master);
  503. int i3c_master_get_free_addr(struct i3c_master_controller *master,
  504. u8 start_addr);
  505. int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
  506. u8 addr);
  507. int i3c_master_do_daa(struct i3c_master_controller *master);
  508. int i3c_master_set_info(struct i3c_master_controller *master,
  509. const struct i3c_device_info *info);
  510. int i3c_master_register(struct i3c_master_controller *master,
  511. struct device *parent,
  512. const struct i3c_master_controller_ops *ops,
  513. bool secondary);
  514. int i3c_master_unregister(struct i3c_master_controller *master);
  515. /**
  516. * i3c_dev_get_master_data() - get master private data attached to an I3C
  517. * device descriptor
  518. * @dev: the I3C device descriptor to get private data from
  519. *
  520. * Return: the private data previously attached with i3c_dev_set_master_data()
  521. * or NULL if no data has been attached to the device.
  522. */
  523. static inline void *i3c_dev_get_master_data(const struct i3c_dev_desc *dev)
  524. {
  525. return dev->common.master_priv;
  526. }
  527. /**
  528. * i3c_dev_set_master_data() - attach master private data to an I3C device
  529. * descriptor
  530. * @dev: the I3C device descriptor to attach private data to
  531. * @data: private data
  532. *
  533. * This functions allows a master controller to attach per-device private data
  534. * which can then be retrieved with i3c_dev_get_master_data().
  535. */
  536. static inline void i3c_dev_set_master_data(struct i3c_dev_desc *dev,
  537. void *data)
  538. {
  539. dev->common.master_priv = data;
  540. }
  541. /**
  542. * i2c_dev_get_master_data() - get master private data attached to an I2C
  543. * device descriptor
  544. * @dev: the I2C device descriptor to get private data from
  545. *
  546. * Return: the private data previously attached with i2c_dev_set_master_data()
  547. * or NULL if no data has been attached to the device.
  548. */
  549. static inline void *i2c_dev_get_master_data(const struct i2c_dev_desc *dev)
  550. {
  551. return dev->common.master_priv;
  552. }
  553. /**
  554. * i2c_dev_set_master_data() - attach master private data to an I2C device
  555. * descriptor
  556. * @dev: the I2C device descriptor to attach private data to
  557. * @data: private data
  558. *
  559. * This functions allows a master controller to attach per-device private data
  560. * which can then be retrieved with i2c_device_get_master_data().
  561. */
  562. static inline void i2c_dev_set_master_data(struct i2c_dev_desc *dev,
  563. void *data)
  564. {
  565. dev->common.master_priv = data;
  566. }
  567. /**
  568. * i3c_dev_get_master() - get master used to communicate with a device
  569. * @dev: I3C dev
  570. *
  571. * Return: the master controller driving @dev
  572. */
  573. static inline struct i3c_master_controller *
  574. i3c_dev_get_master(struct i3c_dev_desc *dev)
  575. {
  576. return dev->common.master;
  577. }
  578. /**
  579. * i2c_dev_get_master() - get master used to communicate with a device
  580. * @dev: I2C dev
  581. *
  582. * Return: the master controller driving @dev
  583. */
  584. static inline struct i3c_master_controller *
  585. i2c_dev_get_master(struct i2c_dev_desc *dev)
  586. {
  587. return dev->common.master;
  588. }
  589. /**
  590. * i3c_master_get_bus() - get the bus attached to a master
  591. * @master: master object
  592. *
  593. * Return: the I3C bus @master is connected to
  594. */
  595. static inline struct i3c_bus *
  596. i3c_master_get_bus(struct i3c_master_controller *master)
  597. {
  598. return &master->bus;
  599. }
  600. struct i3c_generic_ibi_pool;
  601. struct i3c_generic_ibi_pool *
  602. i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
  603. const struct i3c_ibi_setup *req);
  604. void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool);
  605. struct i3c_ibi_slot *
  606. i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool);
  607. void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
  608. struct i3c_ibi_slot *slot);
  609. void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot);
  610. struct i3c_ibi_slot *i3c_master_get_free_ibi_slot(struct i3c_dev_desc *dev);
  611. #endif /* I3C_MASTER_H */