gh_dbl.h 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110
  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #ifndef __GH_DBL_H
  7. #define __GH_DBL_H
  8. #include "gh_common.h"
  9. typedef void (*dbl_rx_cb_t)(int irq, void *priv_data);
  10. enum gh_dbl_label {
  11. GH_DBL_TUI_LABEL,
  12. GH_DBL_TUI_NEURON_BLK0,
  13. GH_DBL_TUI_NEURON_BLK1,
  14. GH_DBL_TUI_QRTR,
  15. GH_DBL_TEST_TUIVM,
  16. GH_DBL_TEST_OEMVM,
  17. GH_DBL_HW_FENCE,
  18. GH_DBL_TUI_DDUMP,
  19. GH_DBL_OEMVM_QRTR,
  20. GH_DBL_VM_PANIC_NOTIFY,
  21. GH_DBL_LABEL_MAX
  22. };
  23. /* Possible flags to pass for send, set_mask, read, reset */
  24. #define GH_DBL_NONBLOCK BIT(32)
  25. #if IS_ENABLED(CONFIG_GH_DBL)
  26. void *gh_dbl_tx_register(enum gh_dbl_label label);
  27. void *gh_dbl_rx_register(enum gh_dbl_label label, dbl_rx_cb_t rx_cb,
  28. void *priv);
  29. int gh_dbl_tx_unregister(void *dbl_client_desc);
  30. int gh_dbl_rx_unregister(void *dbl_client_desc);
  31. int gh_dbl_send(void *dbl_client_desc, uint64_t *newflags,
  32. const unsigned long flags);
  33. int gh_dbl_set_mask(void *dbl_client_desc, gh_dbl_flags_t enable_mask,
  34. gh_dbl_flags_t ack_mask, const unsigned long flags);
  35. int gh_dbl_read_and_clean(void *dbl_client_desc, gh_dbl_flags_t *clear_flags,
  36. const unsigned long flags);
  37. int gh_dbl_reset(void *dbl_client_desc, const unsigned long flags);
  38. int gh_dbl_populate_cap_info(enum gh_dbl_label label, u64 cap_id,
  39. int direction, int rx_irq);
  40. int gh_dbl_reset_cap_info(enum gh_dbl_label label, int direction, int *irq);
  41. #else
  42. static inline void *gh_dbl_tx_register(enum gh_dbl_label label)
  43. {
  44. return ERR_PTR(-ENODEV);
  45. }
  46. static inline void *gh_dbl_rx_register(enum gh_dbl_label label,
  47. dbl_rx_cb_t rx_cb,
  48. void *priv)
  49. {
  50. return ERR_PTR(-ENODEV);
  51. }
  52. static inline int gh_dbl_tx_unregister(void *dbl_client_desc)
  53. {
  54. return -EINVAL;
  55. }
  56. static inline int gh_dbl_rx_unregister(void *dbl_client_desc)
  57. {
  58. return -EINVAL;
  59. }
  60. static inline int gh_dbl_send(void *dbl_client_desc, uint64_t *newflags,
  61. const unsigned long flags)
  62. {
  63. return -EINVAL;
  64. }
  65. static inline int gh_dbl_set_mask(void *dbl_client_desc,
  66. gh_dbl_flags_t enable_mask,
  67. gh_dbl_flags_t ack_mask,
  68. const unsigned long flags)
  69. {
  70. return -EINVAL;
  71. }
  72. static inline int gh_dbl_read_and_clean(void *dbl_client_desc,
  73. gh_dbl_flags_t *clear_flags,
  74. const unsigned long flags)
  75. {
  76. return -EINVAL;
  77. }
  78. static inline int gh_dbl_reset(void *dbl_client_desc, const unsigned long flags)
  79. {
  80. return -EINVAL;
  81. }
  82. static inline int gh_dbl_populate_cap_info(enum gh_dbl_label label, u64 cap_id,
  83. int direction, int rx_irq)
  84. {
  85. return -EINVAL;
  86. }
  87. static inline
  88. int gh_dbl_reset_cap_info(enum gh_dbl_label label, int direction, int *irq)
  89. {
  90. return -EINVAL;
  91. }
  92. #endif
  93. #endif