qcom,niobe.h 4.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_NIOBE_H
  6. #define __DT_BINDINGS_INTERCONNECT_QCOM_NIOBE_H
  7. #define MASTER_GPU_TCU 0
  8. #define MASTER_SYS_TCU 1
  9. #define MASTER_APPSS_PROC 2
  10. #define MASTER_LLCC 3
  11. #define MASTER_DDR_RT 4
  12. #define MASTER_CNOC_LPASS_AG_NOC 5
  13. #define MASTER_GIC_AHB 6
  14. #define MASTER_QDSS_BAM 7
  15. #define MASTER_QUP_1 8
  16. #define MASTER_QUP_2 9
  17. #define MASTER_QUP_3 10
  18. #define MASTER_A1NOC_SNOC 11
  19. #define MASTER_A2NOC_SNOC 12
  20. #define MASTER_CAMNOC_HF 13
  21. #define MASTER_CAMNOC_ICP 14
  22. #define MASTER_CAMNOC_SF 15
  23. #define MASTER_CNOC_SNOC 16
  24. #define MASTER_GEM_NOC_CNOC 17
  25. #define MASTER_GEM_NOC_PCIE_SNOC 18
  26. #define MASTER_GFX3D 19
  27. #define MASTER_LPASS_GEM_NOC 20
  28. #define MASTER_MDP0 21
  29. #define MASTER_MDP1 22
  30. #define MASTER_MNOC_HF_MEM_NOC 23
  31. #define MASTER_MNOC_SF_MEM_NOC 24
  32. #define MASTER_CDSP_PROC 25
  33. #define MASTER_COMPUTE_NOC 26
  34. #define MASTER_ANOC_PCIE_GEM_NOC 27
  35. #define MASTER_SNOC_SF_MEM_NOC 28
  36. #define MASTER_VIDEO 29
  37. #define MASTER_VIDEO_CV_PROC 30
  38. #define MASTER_VIDEO_PROC 31
  39. #define MASTER_VIDEO_V_PROC 32
  40. #define MASTER_CNOC_CFG 33
  41. #define MASTER_CNOC_MNOC_HF_CFG 34
  42. #define MASTER_PCIE_ANOC_CFG 35
  43. #define MASTER_CNOC_MNOC_SF_CFG 36
  44. #define MASTER_QUP_CORE_1 37
  45. #define MASTER_QUP_CORE_2 38
  46. #define MASTER_QUP_CORE_3 39
  47. #define MASTER_CRYPTO 40
  48. #define MASTER_IPA 41
  49. #define MASTER_LPASS_PROC 42
  50. #define MASTER_SOCCP_AGGR_NOC 43
  51. #define MASTER_SP 44
  52. #define MASTER_GIC 45
  53. #define MASTER_PCIE_0 46
  54. #define MASTER_PCIE_2 47
  55. #define MASTER_PCIE_1 48
  56. #define MASTER_QDSS_ETR 49
  57. #define MASTER_QDSS_ETR_1 50
  58. #define MASTER_SDCC_2 51
  59. #define MASTER_UFS_MEM 52
  60. #define MASTER_USB3_0 53
  61. #define MASTER_USB3_1 54
  62. #define SLAVE_EBI1 512
  63. #define SLAVE_AHB2PHY_SOUTH 513
  64. #define SLAVE_AHB2PHY_CENTER 514
  65. #define SLAVE_AHB2PHY_WEST 515
  66. #define SLAVE_AOSS 516
  67. #define SLAVE_APPSS 517
  68. #define SLAVE_CAMERA_CFG 518
  69. #define SLAVE_CLK_CTL 519
  70. #define SLAVE_CRYPTO_0_CFG 520
  71. #define SLAVE_DISPLAY1_CFG 521
  72. #define SLAVE_DISPLAY_CFG 522
  73. #define SLAVE_GFX3D_CFG 523
  74. #define SLAVE_IMEM_CFG 524
  75. #define SLAVE_IPA_CFG 525
  76. #define SLAVE_IPC_ROUTER_CFG 526
  77. #define SLAVE_LPASS 527
  78. #define SLAVE_LPASS_CORE_CFG 528
  79. #define SLAVE_LPASS_LPI_CFG 529
  80. #define SLAVE_LPASS_MPU_CFG 530
  81. #define SLAVE_LPASS_TOP_CFG 531
  82. #define SLAVE_PCIE_0_CFG 532
  83. #define SLAVE_PCIE_2_CFG 533
  84. #define SLAVE_PCIE_1_CFG 534
  85. #define SLAVE_PRNG 535
  86. #define SLAVE_QDSS_CFG 536
  87. #define SLAVE_QUP_1 537
  88. #define SLAVE_QUP_2 538
  89. #define SLAVE_QUP_3 539
  90. #define SLAVE_SDCC_2 540
  91. #define SLAVE_SOCCP 541
  92. #define SLAVE_SPSS_CFG 542
  93. #define SLAVE_TCSR 543
  94. #define SLAVE_TLMM 544
  95. #define SLAVE_TME_CFG 545
  96. #define SLAVE_UFS_MEM_CFG 546
  97. #define SLAVE_USB3_0 547
  98. #define SLAVE_USB3_1 548
  99. #define SLAVE_VENUS_CFG 549
  100. #define SLAVE_VSENSE_CTRL_CFG 550
  101. #define SLAVE_A1NOC_SNOC 551
  102. #define SLAVE_A2NOC_SNOC 552
  103. #define SLAVE_GEM_NOC_CNOC 553
  104. #define SLAVE_SNOC_GEM_NOC_SF 554
  105. #define SLAVE_LLCC 555
  106. #define SLAVE_LPASS_GEM_NOC 556
  107. #define SLAVE_MNOC_HF_MEM_NOC 557
  108. #define SLAVE_MNOC_SF_MEM_NOC 558
  109. #define SLAVE_CDSP_MEM_NOC 559
  110. #define SLAVE_MEM_NOC_PCIE_SNOC 560
  111. #define SLAVE_ANOC_PCIE_GEM_NOC 561
  112. #define SLAVE_CNOC_CFG 562
  113. #define SLAVE_DDRSS_CFG 563
  114. #define SLAVE_CNOC_MNOC_HF_CFG 564
  115. #define SLAVE_CNOC_MNOC_SF_CFG 565
  116. #define SLAVE_PCIE_ANOC_CFG 566
  117. #define SLAVE_QUP_CORE_1 567
  118. #define SLAVE_QUP_CORE_2 568
  119. #define SLAVE_QUP_CORE_3 569
  120. #define SLAVE_BOOT_IMEM 570
  121. #define SLAVE_BOOT_IMEM_2 571
  122. #define SLAVE_IMEM 572
  123. #define SLAVE_DDR_RT 573
  124. #define SLAVE_SERVICE_CNOC 574
  125. #define SLAVE_SERVICE_MNOC_HF 575
  126. #define SLAVE_SERVICE_MNOC_SF 576
  127. #define SLAVE_SERVICES_LPASS_AML_NOC 577
  128. #define SLAVE_SERVICE_LPASS_AG_NOC 578
  129. #define SLAVE_SERVICE_PCIE_ANOC 579
  130. #define SLAVE_PCIE_0 580
  131. #define SLAVE_PCIE_2 581
  132. #define SLAVE_PCIE_1 582
  133. #define SLAVE_QDSS_STM 583
  134. #define SLAVE_TCU 584
  135. #define MASTER_LLCC_DISP 1000
  136. #define MASTER_MDP0_DISP 1001
  137. #define MASTER_MNOC_HF_MEM_NOC_DISP 1002
  138. #define MASTER_ANOC_PCIE_GEM_NOC_DISP 1003
  139. #define SLAVE_EBI1_DISP 1512
  140. #define SLAVE_LLCC_DISP 1513
  141. #define SLAVE_MNOC_HF_MEM_NOC_DISP 1514
  142. #define MASTER_LLCC_DISP2 2000
  143. #define MASTER_MDP1_DISP2 2001
  144. #define MASTER_MNOC_HF_MEM_NOC_DISP2 2002
  145. #define MASTER_ANOC_PCIE_GEM_NOC_DISP2 2003
  146. #define SLAVE_EBI1_DISP2 2512
  147. #define SLAVE_LLCC_DISP2 2513
  148. #define SLAVE_MNOC_HF_MEM_NOC_DISP2 2514
  149. #endif