qcom,msm8996.h 4.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163
  1. /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
  2. /*
  3. * Qualcomm MSM8996 interconnect IDs
  4. *
  5. * Copyright (c) 2021 Yassine Oudjana <[email protected]>
  6. */
  7. #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8996_H
  8. #define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8996_H
  9. /* A0NOC */
  10. #define MASTER_PCIE_0 0
  11. #define MASTER_PCIE_1 1
  12. #define MASTER_PCIE_2 2
  13. /* A1NOC */
  14. #define MASTER_CNOC_A1NOC 0
  15. #define MASTER_CRYPTO_CORE0 1
  16. #define MASTER_PNOC_A1NOC 2
  17. /* A2NOC */
  18. #define MASTER_USB3 0
  19. #define MASTER_IPA 1
  20. #define MASTER_UFS 2
  21. /* BIMC */
  22. #define MASTER_AMPSS_M0 0
  23. #define MASTER_GRAPHICS_3D 1
  24. #define MASTER_MNOC_BIMC 2
  25. #define MASTER_SNOC_BIMC 3
  26. #define SLAVE_EBI_CH0 4
  27. #define SLAVE_HMSS_L3 5
  28. #define SLAVE_BIMC_SNOC_0 6
  29. #define SLAVE_BIMC_SNOC_1 7
  30. /* CNOC */
  31. #define MASTER_SNOC_CNOC 0
  32. #define MASTER_QDSS_DAP 1
  33. #define SLAVE_CNOC_A1NOC 2
  34. #define SLAVE_CLK_CTL 3
  35. #define SLAVE_TCSR 4
  36. #define SLAVE_TLMM 5
  37. #define SLAVE_CRYPTO_0_CFG 6
  38. #define SLAVE_MPM 7
  39. #define SLAVE_PIMEM_CFG 8
  40. #define SLAVE_IMEM_CFG 9
  41. #define SLAVE_MESSAGE_RAM 10
  42. #define SLAVE_BIMC_CFG 11
  43. #define SLAVE_PMIC_ARB 12
  44. #define SLAVE_PRNG 13
  45. #define SLAVE_DCC_CFG 14
  46. #define SLAVE_RBCPR_MX 15
  47. #define SLAVE_QDSS_CFG 16
  48. #define SLAVE_RBCPR_CX 17
  49. #define SLAVE_QDSS_RBCPR_APU 18
  50. #define SLAVE_CNOC_MNOC_CFG 19
  51. #define SLAVE_SNOC_CFG 20
  52. #define SLAVE_SNOC_MPU_CFG 21
  53. #define SLAVE_EBI1_PHY_CFG 22
  54. #define SLAVE_A0NOC_CFG 23
  55. #define SLAVE_PCIE_1_CFG 24
  56. #define SLAVE_PCIE_2_CFG 25
  57. #define SLAVE_PCIE_0_CFG 26
  58. #define SLAVE_PCIE20_AHB2PHY 27
  59. #define SLAVE_A0NOC_MPU_CFG 28
  60. #define SLAVE_UFS_CFG 29
  61. #define SLAVE_A1NOC_CFG 30
  62. #define SLAVE_A1NOC_MPU_CFG 31
  63. #define SLAVE_A2NOC_CFG 32
  64. #define SLAVE_A2NOC_MPU_CFG 33
  65. #define SLAVE_SSC_CFG 34
  66. #define SLAVE_A0NOC_SMMU_CFG 35
  67. #define SLAVE_A1NOC_SMMU_CFG 36
  68. #define SLAVE_A2NOC_SMMU_CFG 37
  69. #define SLAVE_LPASS_SMMU_CFG 38
  70. #define SLAVE_CNOC_MNOC_MMSS_CFG 39
  71. /* MNOC */
  72. #define MASTER_CNOC_MNOC_CFG 0
  73. #define MASTER_CPP 1
  74. #define MASTER_JPEG 2
  75. #define MASTER_MDP_PORT0 3
  76. #define MASTER_MDP_PORT1 4
  77. #define MASTER_ROTATOR 5
  78. #define MASTER_VIDEO_P0 6
  79. #define MASTER_VFE 7
  80. #define MASTER_SNOC_VMEM 8
  81. #define MASTER_VIDEO_P0_OCMEM 9
  82. #define MASTER_CNOC_MNOC_MMSS_CFG 10
  83. #define SLAVE_MNOC_BIMC 11
  84. #define SLAVE_VMEM 12
  85. #define SLAVE_SERVICE_MNOC 13
  86. #define SLAVE_MMAGIC_CFG 14
  87. #define SLAVE_CPR_CFG 15
  88. #define SLAVE_MISC_CFG 16
  89. #define SLAVE_VENUS_THROTTLE_CFG 17
  90. #define SLAVE_VENUS_CFG 18
  91. #define SLAVE_VMEM_CFG 19
  92. #define SLAVE_DSA_CFG 20
  93. #define SLAVE_MMSS_CLK_CFG 21
  94. #define SLAVE_DSA_MPU_CFG 22
  95. #define SLAVE_MNOC_MPU_CFG 23
  96. #define SLAVE_DISPLAY_CFG 24
  97. #define SLAVE_DISPLAY_THROTTLE_CFG 25
  98. #define SLAVE_CAMERA_CFG 26
  99. #define SLAVE_CAMERA_THROTTLE_CFG 27
  100. #define SLAVE_GRAPHICS_3D_CFG 28
  101. #define SLAVE_SMMU_MDP_CFG 29
  102. #define SLAVE_SMMU_ROT_CFG 30
  103. #define SLAVE_SMMU_VENUS_CFG 31
  104. #define SLAVE_SMMU_CPP_CFG 32
  105. #define SLAVE_SMMU_JPEG_CFG 33
  106. #define SLAVE_SMMU_VFE_CFG 34
  107. /* PNOC */
  108. #define MASTER_SNOC_PNOC 0
  109. #define MASTER_SDCC_1 1
  110. #define MASTER_SDCC_2 2
  111. #define MASTER_SDCC_4 3
  112. #define MASTER_USB_HS 4
  113. #define MASTER_BLSP_1 5
  114. #define MASTER_BLSP_2 6
  115. #define MASTER_TSIF 7
  116. #define SLAVE_PNOC_A1NOC 8
  117. #define SLAVE_USB_HS 9
  118. #define SLAVE_SDCC_2 10
  119. #define SLAVE_SDCC_4 11
  120. #define SLAVE_TSIF 12
  121. #define SLAVE_BLSP_2 13
  122. #define SLAVE_SDCC_1 14
  123. #define SLAVE_BLSP_1 15
  124. #define SLAVE_PDM 16
  125. #define SLAVE_AHB2PHY 17
  126. /* SNOC */
  127. #define MASTER_HMSS 0
  128. #define MASTER_QDSS_BAM 1
  129. #define MASTER_SNOC_CFG 2
  130. #define MASTER_BIMC_SNOC_0 3
  131. #define MASTER_BIMC_SNOC_1 4
  132. #define MASTER_A0NOC_SNOC 5
  133. #define MASTER_A1NOC_SNOC 6
  134. #define MASTER_A2NOC_SNOC 7
  135. #define MASTER_QDSS_ETR 8
  136. #define SLAVE_A0NOC_SNOC 9
  137. #define SLAVE_A1NOC_SNOC 10
  138. #define SLAVE_A2NOC_SNOC 11
  139. #define SLAVE_HMSS 12
  140. #define SLAVE_LPASS 13
  141. #define SLAVE_USB3 14
  142. #define SLAVE_SNOC_BIMC 15
  143. #define SLAVE_SNOC_CNOC 16
  144. #define SLAVE_IMEM 17
  145. #define SLAVE_PIMEM 18
  146. #define SLAVE_SNOC_VMEM 19
  147. #define SLAVE_SNOC_PNOC 20
  148. #define SLAVE_QDSS_STM 21
  149. #define SLAVE_PCIE_0 22
  150. #define SLAVE_PCIE_1 23
  151. #define SLAVE_PCIE_2 24
  152. #define SLAVE_SERVICE_SNOC 25
  153. #endif