qcom,monaco_auto.h 5.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MONACO_AUTO_H
  6. #define __DT_BINDINGS_INTERCONNECT_QCOM_MONACO_AUTO_H
  7. #define MASTER_GPU_TCU 0
  8. #define MASTER_PCIE_TCU 1
  9. #define MASTER_SYS_TCU 2
  10. #define MASTER_APPSS_PROC 3
  11. #define MASTER_LLCC 4
  12. #define MASTER_CNOC_LPASS_AG_NOC 5
  13. #define MASTER_GIC_AHB 6
  14. #define MASTER_CDSP_NOC_CFG 7
  15. #define MASTER_QDSS_BAM 8
  16. #define MASTER_QUP_0 9
  17. #define MASTER_QUP_1 10
  18. #define MASTER_A1NOC_SNOC 11
  19. #define MASTER_A2NOC_SNOC 12
  20. #define MASTER_CAMNOC_HF 13
  21. #define MASTER_CAMNOC_ICP 14
  22. #define MASTER_CAMNOC_SF 15
  23. #define MASTER_COMPUTE_NOC 16
  24. #define MASTER_CNOC_A2NOC 17
  25. #define MASTER_CNOC_DC_NOC 18
  26. #define MASTER_GEM_NOC_CFG 19
  27. #define MASTER_GEM_NOC_CNOC 20
  28. #define MASTER_GEM_NOC_PCIE_SNOC 21
  29. #define MASTER_GPDSP_SAIL 22
  30. #define MASTER_GFX3D 23
  31. #define MASTER_LPASS_ANOC 24
  32. #define MASTER_MDP0 25
  33. #define MASTER_MDP1 26
  34. #define MASTER_MNOC_HF_MEM_NOC 27
  35. #define MASTER_CNOC_MNOC_HF_CFG 28
  36. #define MASTER_MNOC_SF_MEM_NOC 29
  37. #define MASTER_CNOC_MNOC_SF_CFG 30
  38. #define MASTER_ANOC_PCIE_GEM_NOC 31
  39. #define MASTER_SAILSS_MD0 32
  40. #define MASTER_SNOC_CFG 33
  41. #define MASTER_SNOC_GC_MEM_NOC 34
  42. #define MASTER_SNOC_SF_MEM_NOC 35
  43. #define MASTER_VIDEO_P0 36
  44. #define MASTER_VIDEO_PROC 37
  45. #define MASTER_VIDEO_V_PROC 38
  46. #define MASTER_QUP_CORE_0 39
  47. #define MASTER_QUP_CORE_1 40
  48. #define MASTER_QUP_CORE_3 41
  49. #define MASTER_CRYPTO_CORE0 42
  50. #define MASTER_CRYPTO_CORE1 43
  51. #define MASTER_DSP0 44
  52. #define MASTER_IPA 45
  53. #define MASTER_LPASS_PROC 46
  54. #define MASTER_CDSP_PROC 47
  55. #define MASTER_PIMEM 48
  56. #define MASTER_QUP_3 49
  57. #define MASTER_EMAC 50
  58. #define MASTER_GIC 51
  59. #define MASTER_PCIE_0 52
  60. #define MASTER_PCIE_1 53
  61. #define MASTER_QDSS_ETR_0 54
  62. #define MASTER_QDSS_ETR_1 55
  63. #define MASTER_SDC 56
  64. #define MASTER_UFS_MEM 57
  65. #define MASTER_USB2 58
  66. #define MASTER_USB3_0 59
  67. #define SLAVE_EBI1 512
  68. #define SLAVE_AHB2PHY_2 513
  69. #define SLAVE_AHB2PHY_3 514
  70. #define SLAVE_ANOC_THROTTLE_CFG 515
  71. #define SLAVE_AOSS 516
  72. #define SLAVE_APPSS 517
  73. #define SLAVE_BOOT_ROM 518
  74. #define SLAVE_CAMERA_CFG 519
  75. #define SLAVE_CAMERA_NRT_THROTTLE_CFG 520
  76. #define SLAVE_CAMERA_RT_THROTTLE_CFG 521
  77. #define SLAVE_CLK_CTL 522
  78. #define SLAVE_CDSP_CFG 523
  79. #define SLAVE_RBCPR_CX_CFG 524
  80. #define SLAVE_RBCPR_MMCX_CFG 525
  81. #define SLAVE_RBCPR_MX_CFG 526
  82. #define SLAVE_CPR_NSPCX 527
  83. #define SLAVE_CPR_NSPHMX 528
  84. #define SLAVE_CRYPTO_0_CFG 529
  85. #define SLAVE_CX_RDPM 530
  86. #define SLAVE_DISPLAY_CFG 531
  87. #define SLAVE_DISPLAY_RT_THROTTLE_CFG 532
  88. #define SLAVE_EMAC_CFG 533
  89. #define SLAVE_GP_DSP0_CFG 534
  90. #define SLAVE_GPDSP0_THROTTLE_CFG 535
  91. #define SLAVE_GPU_TCU_THROTTLE_CFG 536
  92. #define SLAVE_GFX3D_CFG 537
  93. #define SLAVE_HWKM 538
  94. #define SLAVE_IMEM_CFG 539
  95. #define SLAVE_IPA_CFG 540
  96. #define SLAVE_IPC_ROUTER_CFG 541
  97. #define SLAVE_LLCC_CFG 542
  98. #define SLAVE_LPASS 543
  99. #define SLAVE_LPASS_CORE_CFG 544
  100. #define SLAVE_LPASS_LPI_CFG 545
  101. #define SLAVE_LPASS_MPU_CFG 546
  102. #define SLAVE_LPASS_THROTTLE_CFG 547
  103. #define SLAVE_LPASS_TOP_CFG 548
  104. #define SLAVE_MX_RDPM 549
  105. #define SLAVE_MXC_RDPM 550
  106. #define SLAVE_PCIE_0_CFG 551
  107. #define SLAVE_PCIE_1_CFG 552
  108. #define SLAVE_PCIE_TCU_THROTTLE_CFG 553
  109. #define SLAVE_PCIE_THROTTLE_CFG 554
  110. #define SLAVE_PDM 555
  111. #define SLAVE_PIMEM_CFG 556
  112. #define SLAVE_PKA_WRAPPER_CFG 557
  113. #define SLAVE_QDSS_CFG 558
  114. #define SLAVE_QM_CFG 559
  115. #define SLAVE_QM_MPU_CFG 560
  116. #define SLAVE_QUP_0 561
  117. #define SLAVE_QUP_1 562
  118. #define SLAVE_QUP_3 563
  119. #define SLAVE_SAIL_THROTTLE_CFG 564
  120. #define SLAVE_SDC1 565
  121. #define SLAVE_SECURITY 566
  122. #define SLAVE_SNOC_THROTTLE_CFG 567
  123. #define SLAVE_TCSR 568
  124. #define SLAVE_TLMM 569
  125. #define SLAVE_TSC_CFG 570
  126. #define SLAVE_UFS_MEM_CFG 571
  127. #define SLAVE_USB2 572
  128. #define SLAVE_USB3_0 573
  129. #define SLAVE_VENUS_CFG 574
  130. #define SLAVE_VENUS_CVP_THROTTLE_CFG 575
  131. #define SLAVE_VENUS_V_CPU_THROTTLE_CFG 576
  132. #define SLAVE_VENUS_VCODEC_THROTTLE_CFG 577
  133. #define SLAVE_A1NOC_SNOC 578
  134. #define SLAVE_A2NOC_SNOC 579
  135. #define SLAVE_DDRSS_CFG 580
  136. #define SLAVE_GEM_NOC_CNOC 581
  137. #define SLAVE_GEM_NOC_CFG 582
  138. #define SLAVE_SNOC_GEM_NOC_GC 583
  139. #define SLAVE_SNOC_GEM_NOC_SF 584
  140. #define SLAVE_GP_DSP_SAIL_NOC 585
  141. #define SLAVE_GPDSP_NOC_CFG 586
  142. #define SLAVE_HCP_A 587
  143. #define SLAVE_LLCC 588
  144. #define SLAVE_MNOC_HF_MEM_NOC 589
  145. #define SLAVE_MNOC_SF_MEM_NOC 590
  146. #define SLAVE_CNOC_MNOC_HF_CFG 591
  147. #define SLAVE_CNOC_MNOC_SF_CFG 592
  148. #define SLAVE_CDSP_MEM_NOC 593
  149. #define SLAVE_GEM_NOC_PCIE_CNOC 594
  150. #define SLAVE_PCIE_ANOC_CFG 595
  151. #define SLAVE_ANOC_PCIE_GEM_NOC 596
  152. #define SLAVE_SNOC_CFG 597
  153. #define SLAVE_LPASS_SNOC 598
  154. #define SLAVE_QUP_CORE_0 599
  155. #define SLAVE_QUP_CORE_1 600
  156. #define SLAVE_QUP_CORE_3 601
  157. #define SLAVE_BOOT_IMEM 602
  158. #define SLAVE_IMEM 603
  159. #define SLAVE_PIMEM 604
  160. #define SLAVE_SERVICE_NSP_NOC 605
  161. #define SLAVE_SERVICE_GEM_NOC_1 606
  162. #define SLAVE_SERVICE_MNOC_HF 607
  163. #define SLAVE_SERVICE_MNOC_SF 608
  164. #define SLAVE_SERVICES_LPASS_AML_NOC 609
  165. #define SLAVE_SERVICE_LPASS_AG_NOC 610
  166. #define SLAVE_SERVICE_GEM_NOC_2 611
  167. #define SLAVE_SERVICE_SNOC 612
  168. #define SLAVE_SERVICE_GEM_NOC 613
  169. #define SLAVE_SERVICE_GEM_NOC2 614
  170. #define SLAVE_PCIE_0 615
  171. #define SLAVE_PCIE_1 616
  172. #define SLAVE_QDSS_STM 617
  173. #define SLAVE_TCU 618
  174. #endif