qcom,lemans.h 6.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_LEMANS_H
  6. #define __DT_BINDINGS_INTERCONNECT_QCOM_LEMANS_H
  7. #define MASTER_GPU_TCU 0
  8. #define MASTER_PCIE_TCU 1
  9. #define MASTER_SYS_TCU 2
  10. #define MASTER_APPSS_PROC 3
  11. #define MASTER_LLCC 4
  12. #define MASTER_CNOC_LPASS_AG_NOC 5
  13. #define MASTER_GIC_AHB 6
  14. #define MASTER_CDSP_NOC_CFG 7
  15. #define MASTER_CDSPB_NOC_CFG 8
  16. #define MASTER_QDSS_BAM 9
  17. #define MASTER_QUP_0 10
  18. #define MASTER_QUP_1 11
  19. #define MASTER_QUP_2 12
  20. #define MASTER_A1NOC_SNOC 13
  21. #define MASTER_A2NOC_SNOC 14
  22. #define MASTER_CAMNOC_HF 15
  23. #define MASTER_CAMNOC_ICP 16
  24. #define MASTER_CAMNOC_SF 17
  25. #define MASTER_COMPUTE_NOC 18
  26. #define MASTER_COMPUTE_NOC_1 19
  27. #define MASTER_CNOC_A2NOC 20
  28. #define MASTER_CNOC_DC_NOC 21
  29. #define MASTER_GEM_NOC_CFG 22
  30. #define MASTER_GEM_NOC_CNOC 23
  31. #define MASTER_GEM_NOC_PCIE_SNOC 24
  32. #define MASTER_GPDSP_SAIL 25
  33. #define MASTER_GFX3D 26
  34. #define MASTER_LPASS_ANOC 27
  35. #define MASTER_MDP0 28
  36. #define MASTER_MDP1 29
  37. #define MASTER_MDP_CORE1_0 30
  38. #define MASTER_MDP_CORE1_1 31
  39. #define MASTER_MNOC_HF_MEM_NOC 32
  40. #define MASTER_CNOC_MNOC_HF_CFG 33
  41. #define MASTER_MNOC_SF_MEM_NOC 34
  42. #define MASTER_CNOC_MNOC_SF_CFG 35
  43. #define MASTER_ANOC_PCIE_GEM_NOC 36
  44. #define MASTER_SNOC_CFG 37
  45. #define MASTER_SNOC_GC_MEM_NOC 38
  46. #define MASTER_SNOC_SF_MEM_NOC 39
  47. #define MASTER_VIDEO_P0 40
  48. #define MASTER_VIDEO_P1 41
  49. #define MASTER_VIDEO_PROC 42
  50. #define MASTER_VIDEO_V_PROC 43
  51. #define MASTER_QUP_CORE_0 44
  52. #define MASTER_QUP_CORE_1 45
  53. #define MASTER_QUP_CORE_2 46
  54. #define MASTER_QUP_CORE_3 47
  55. #define MASTER_CRYPTO_CORE0 48
  56. #define MASTER_CRYPTO_CORE1 49
  57. #define MASTER_DSP0 50
  58. #define MASTER_DSP1 51
  59. #define MASTER_IPA 52
  60. #define MASTER_LPASS_PROC 53
  61. #define MASTER_CDSP_PROC 54
  62. #define MASTER_CDSP_PROC_B 55
  63. #define MASTER_PIMEM 56
  64. #define MASTER_QUP_3 57
  65. #define MASTER_EMAC 58
  66. #define MASTER_EMAC_1 59
  67. #define MASTER_GIC 60
  68. #define MASTER_PCIE_0 61
  69. #define MASTER_PCIE_1 62
  70. #define MASTER_QDSS_ETR_0 63
  71. #define MASTER_QDSS_ETR_1 64
  72. #define MASTER_SDC 65
  73. #define MASTER_UFS_CARD 66
  74. #define MASTER_UFS_MEM 67
  75. #define MASTER_USB2 68
  76. #define MASTER_USB3_0 69
  77. #define MASTER_USB3_1 70
  78. #define SLAVE_EBI1 512
  79. #define SLAVE_AHB2PHY_0 513
  80. #define SLAVE_AHB2PHY_1 514
  81. #define SLAVE_AHB2PHY_2 515
  82. #define SLAVE_AHB2PHY_3 516
  83. #define SLAVE_ANOC_THROTTLE_CFG 517
  84. #define SLAVE_AOSS 518
  85. #define SLAVE_APPSS 519
  86. #define SLAVE_BOOT_ROM 520
  87. #define SLAVE_CAMERA_CFG 521
  88. #define SLAVE_CAMERA_NRT_THROTTLE_CFG 522
  89. #define SLAVE_CAMERA_RT_THROTTLE_CFG 523
  90. #define SLAVE_CLK_CTL 524
  91. #define SLAVE_CDSP_CFG 525
  92. #define SLAVE_CDSP1_CFG 526
  93. #define SLAVE_RBCPR_CX_CFG 527
  94. #define SLAVE_RBCPR_MMCX_CFG 528
  95. #define SLAVE_RBCPR_MX_CFG 529
  96. #define SLAVE_CPR_NSPCX 530
  97. #define SLAVE_CRYPTO_0_CFG 531
  98. #define SLAVE_CX_RDPM 532
  99. #define SLAVE_DISPLAY_CFG 533
  100. #define SLAVE_DISPLAY_RT_THROTTLE_CFG 534
  101. #define SLAVE_DISPLAY1_CFG 535
  102. #define SLAVE_DISPLAY1_RT_THROTTLE_CFG 536
  103. #define SLAVE_EMAC_CFG 537
  104. #define SLAVE_EMAC1_CFG 538
  105. #define SLAVE_GP_DSP0_CFG 539
  106. #define SLAVE_GP_DSP1_CFG 540
  107. #define SLAVE_GPDSP0_THROTTLE_CFG 541
  108. #define SLAVE_GPDSP1_THROTTLE_CFG 542
  109. #define SLAVE_GPU_TCU_THROTTLE_CFG 543
  110. #define SLAVE_GFX3D_CFG 544
  111. #define SLAVE_HWKM 545
  112. #define SLAVE_IMEM_CFG 546
  113. #define SLAVE_IPA_CFG 547
  114. #define SLAVE_IPC_ROUTER_CFG 548
  115. #define SLAVE_LLCC_CFG 549
  116. #define SLAVE_LPASS 550
  117. #define SLAVE_LPASS_CORE_CFG 551
  118. #define SLAVE_LPASS_LPI_CFG 552
  119. #define SLAVE_LPASS_MPU_CFG 553
  120. #define SLAVE_LPASS_THROTTLE_CFG 554
  121. #define SLAVE_LPASS_TOP_CFG 555
  122. #define SLAVE_MX_RDPM 556
  123. #define SLAVE_MXC_RDPM 557
  124. #define SLAVE_PCIE_0_CFG 558
  125. #define SLAVE_PCIE_1_CFG 559
  126. #define SLAVE_PCIE_RSC_CFG 560
  127. #define SLAVE_PCIE_TCU_THROTTLE_CFG 561
  128. #define SLAVE_PCIE_THROTTLE_CFG 562
  129. #define SLAVE_PDM 563
  130. #define SLAVE_PIMEM_CFG 564
  131. #define SLAVE_PKA_WRAPPER_CFG 565
  132. #define SLAVE_QDSS_CFG 566
  133. #define SLAVE_QM_CFG 567
  134. #define SLAVE_QM_MPU_CFG 568
  135. #define SLAVE_QUP_0 569
  136. #define SLAVE_QUP_1 570
  137. #define SLAVE_QUP_2 571
  138. #define SLAVE_QUP_3 572
  139. #define SLAVE_SAIL_THROTTLE_CFG 573
  140. #define SLAVE_SDC1 574
  141. #define SLAVE_SECURITY 575
  142. #define SLAVE_SNOC_THROTTLE_CFG 576
  143. #define SLAVE_TCSR 577
  144. #define SLAVE_TLMM 578
  145. #define SLAVE_TSC_CFG 579
  146. #define SLAVE_UFS_CARD_CFG 580
  147. #define SLAVE_UFS_MEM_CFG 581
  148. #define SLAVE_USB2 582
  149. #define SLAVE_USB3_0 583
  150. #define SLAVE_USB3_1 584
  151. #define SLAVE_VENUS_CFG 585
  152. #define SLAVE_VENUS_CVP_THROTTLE_CFG 586
  153. #define SLAVE_VENUS_V_CPU_THROTTLE_CFG 587
  154. #define SLAVE_VENUS_VCODEC_THROTTLE_CFG 588
  155. #define SLAVE_A1NOC_SNOC 589
  156. #define SLAVE_A2NOC_SNOC 590
  157. #define SLAVE_DDRSS_CFG 591
  158. #define SLAVE_GEM_NOC_CNOC 592
  159. #define SLAVE_GEM_NOC_CFG 593
  160. #define SLAVE_SNOC_GEM_NOC_GC 594
  161. #define SLAVE_SNOC_GEM_NOC_SF 595
  162. #define SLAVE_GP_DSP_SAIL_NOC 596
  163. #define SLAVE_GPDSP_NOC_CFG 597
  164. #define SLAVE_HCP_A 598
  165. #define SLAVE_LLCC 599
  166. #define SLAVE_MNOC_HF_MEM_NOC 600
  167. #define SLAVE_MNOC_SF_MEM_NOC 601
  168. #define SLAVE_CNOC_MNOC_HF_CFG 602
  169. #define SLAVE_CNOC_MNOC_SF_CFG 603
  170. #define SLAVE_CDSP_MEM_NOC 604
  171. #define SLAVE_CDSPB_MEM_NOC 605
  172. #define SLAVE_HCP_B 606
  173. #define SLAVE_GEM_NOC_PCIE_CNOC 607
  174. #define SLAVE_PCIE_ANOC_CFG 608
  175. #define SLAVE_ANOC_PCIE_GEM_NOC 609
  176. #define SLAVE_SNOC_CFG 610
  177. #define SLAVE_LPASS_SNOC 611
  178. #define SLAVE_QUP_CORE_0 612
  179. #define SLAVE_QUP_CORE_1 613
  180. #define SLAVE_QUP_CORE_2 614
  181. #define SLAVE_QUP_CORE_3 615
  182. #define SLAVE_BOOT_IMEM 616
  183. #define SLAVE_IMEM 617
  184. #define SLAVE_PIMEM 618
  185. #define SLAVE_SERVICE_NSP_NOC 619
  186. #define SLAVE_SERVICE_NSPB_NOC 620
  187. #define SLAVE_SERVICE_GEM_NOC_1 621
  188. #define SLAVE_SERVICE_MNOC_HF 622
  189. #define SLAVE_SERVICE_MNOC_SF 623
  190. #define SLAVE_SERVICES_LPASS_AML_NOC 624
  191. #define SLAVE_SERVICE_LPASS_AG_NOC 625
  192. #define SLAVE_SERVICE_GEM_NOC_2 626
  193. #define SLAVE_SERVICE_SNOC 627
  194. #define SLAVE_SERVICE_GEM_NOC 628
  195. #define SLAVE_SERVICE_GEM_NOC2 629
  196. #define SLAVE_PCIE_0 630
  197. #define SLAVE_PCIE_1 631
  198. #define SLAVE_QDSS_STM 632
  199. #define SLAVE_TCU 633
  200. #endif