qcom,blair.h 3.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
  4. */
  5. #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_BLAIR_H
  6. #define __DT_BINDINGS_INTERCONNECT_QCOM_BLAIR_H
  7. #define MASTER_AMPSS_M0 0
  8. #define MASTER_SNOC_BIMC_RT 1
  9. #define MASTER_SNOC_BIMC_NRT 2
  10. #define SNOC_BIMC_MAS 3
  11. #define MASTER_GRAPHICS_3D 4
  12. #define MASTER_CDSP_PROC 5
  13. #define MASTER_TCU_0 6
  14. #define MASTER_QUP_CORE_0 7
  15. #define MASTER_QUP_CORE_1 8
  16. #define MASTER_CRYPTO_CORE0 9
  17. #define SNOC_CNOC_MAS 10
  18. #define MASTER_QDSS_DAP 11
  19. #define MASTER_CAMNOC_SF 12
  20. #define MASTER_CAMNOC_HF 13
  21. #define MASTER_MDP_PORT0 14
  22. #define MASTER_VIDEO_P0 15
  23. #define MASTER_VIDEO_PROC 16
  24. #define MASTER_SNOC_CFG 17
  25. #define MASTER_TIC 18
  26. #define A1NOC_SNOC_MAS 19
  27. #define A2NOC_SNOC_MAS 20
  28. #define BIMC_SNOC_MAS 21
  29. #define MASTER_PIMEM 22
  30. #define MASTER_QUP_0 23
  31. #define MASTER_QUP_1 24
  32. #define MASTER_EMMC 25
  33. #define MASTER_SDCC_2 26
  34. #define MASTER_UFS_MEM 27
  35. #define MASTER_QDSS_BAM 28
  36. #define MASTER_IPA 29
  37. #define MASTER_QDSS_ETR 30
  38. #define MASTER_USB3_0 31
  39. #define MASTER_CAMNOC_SF_SNOC 32
  40. #define MASTER_CAMNOC_HF_SNOC 33
  41. #define MASTER_MDP_PORT0_SNOC 34
  42. #define MASTER_VIDEO_P0_SNOC 35
  43. #define MASTER_VIDEO_PROC_SNOC 36
  44. #define MASTER_SNOC_RT 37
  45. #define MASTER_SNOC_NRT 38
  46. #define SLAVE_EBI 512
  47. #define BIMC_SNOC_SLV 513
  48. #define SLAVE_PKA_CORE 514
  49. #define SLAVE_QUP_CORE_0 515
  50. #define SLAVE_QUP_CORE_1 516
  51. #define SLAVE_BIMC_CFG 517
  52. #define SLAVE_APPSS 518
  53. #define SLAVE_CAMERA_NRT_THROTTLE_CFG 519
  54. #define SLAVE_CAMERA_RT_THROTTLE_CFG 520
  55. #define SLAVE_CAMERA_CFG 521
  56. #define SLAVE_CLK_CTL 522
  57. #define SLAVE_DSP_CFG 523
  58. #define SLAVE_RBCPR_CX_CFG 524
  59. #define SLAVE_RBCPR_MX_CFG 525
  60. #define SLAVE_CRYPTO_0_CFG 526
  61. #define SLAVE_DCC_CFG 527
  62. #define SLAVE_DDR_PHY_CFG 528
  63. #define SLAVE_DDR_SS_CFG 529
  64. #define SLAVE_DISPLAY_CFG 530
  65. #define SLAVE_DISPLAY_THROTTLE_CFG 531
  66. #define SLAVE_EMMC_CFG 532
  67. #define SLAVE_GRAPHICS_3D_CFG 533
  68. #define SLAVE_HWKM 534
  69. #define SLAVE_IMEM_CFG 535
  70. #define SLAVE_IPA_CFG 536
  71. #define SLAVE_LPASS 537
  72. #define SLAVE_MAPSS 538
  73. #define SLAVE_MESSAGE_RAM 539
  74. #define SLAVE_PDM 540
  75. #define SLAVE_PIMEM_CFG 541
  76. #define SLAVE_PMIC_ARB 542
  77. #define SLAVE_QDSS_CFG 543
  78. #define SLAVE_QM_CFG 544
  79. #define SLAVE_QM_MPU_CFG 545
  80. #define SLAVE_QUP_0 546
  81. #define SLAVE_QUP_1 547
  82. #define SLAVE_RPM 548
  83. #define SLAVE_SDCC_2 549
  84. #define SLAVE_SECURITY 550
  85. #define SLAVE_SNOC_CFG 551
  86. #define SLAVE_TCSR 552
  87. #define SLAVE_TLMM 553
  88. #define SLAVE_UFS_MEM_CFG 554
  89. #define SLAVE_USB3 555
  90. #define SLAVE_VENUS_CFG 556
  91. #define SLAVE_VENUS_THROTTLE_CFG 557
  92. #define SLAVE_VSENSE_CTRL_CFG 558
  93. #define SLAVE_SNOC_BIMC_NRT 559
  94. #define SLAVE_SNOC_BIMC_RT 560
  95. #define SNOC_CNOC_SLV 561
  96. #define SLAVE_OCIMEM 562
  97. #define SLAVE_PIMEM 563
  98. #define SNOC_BIMC_SLV 564
  99. #define SLAVE_SERVICE_SNOC 565
  100. #define SLAVE_QDSS_STM 566
  101. #define A1NOC_SNOC_SLV 567
  102. #define A2NOC_SNOC_SLV 568
  103. #define SLAVE_CAMNOC_HF_SNOC 569
  104. #define SLAVE_MDP_PORT0_SNOC 570
  105. #define SLAVE_CAMNOC_SF_SNOC 571
  106. #define SLAVE_VIDEO_P0_SNOC 572
  107. #define SLAVE_VIDEO_PROC_SNOC 573
  108. #define SLAVE_SNOC_RT 574
  109. #define SLAVE_SNOC_NRT 575
  110. #define SLAVE_TCU 576
  111. #endif