mt8192-gce.h 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2020 MediaTek Inc.
  4. * Author: Yongqiang Niu <[email protected]>
  5. */
  6. #ifndef _DT_BINDINGS_GCE_MT8192_H
  7. #define _DT_BINDINGS_GCE_MT8192_H
  8. /* assign timeout 0 also means default */
  9. #define CMDQ_NO_TIMEOUT 0xffffffff
  10. #define CMDQ_TIMEOUT_DEFAULT 1000
  11. /* GCE thread priority */
  12. #define CMDQ_THR_PRIO_LOWEST 0
  13. #define CMDQ_THR_PRIO_1 1
  14. #define CMDQ_THR_PRIO_2 2
  15. #define CMDQ_THR_PRIO_3 3
  16. #define CMDQ_THR_PRIO_4 4
  17. #define CMDQ_THR_PRIO_5 5
  18. #define CMDQ_THR_PRIO_6 6
  19. #define CMDQ_THR_PRIO_HIGHEST 7
  20. /* CPR count in 32bit register */
  21. #define GCE_CPR_COUNT 1312
  22. /* GCE subsys table */
  23. #define SUBSYS_1300XXXX 0
  24. #define SUBSYS_1400XXXX 1
  25. #define SUBSYS_1401XXXX 2
  26. #define SUBSYS_1402XXXX 3
  27. #define SUBSYS_1502XXXX 4
  28. #define SUBSYS_1880XXXX 5
  29. #define SUBSYS_1881XXXX 6
  30. #define SUBSYS_1882XXXX 7
  31. #define SUBSYS_1883XXXX 8
  32. #define SUBSYS_1884XXXX 9
  33. #define SUBSYS_1000XXXX 10
  34. #define SUBSYS_1001XXXX 11
  35. #define SUBSYS_1002XXXX 12
  36. #define SUBSYS_1003XXXX 13
  37. #define SUBSYS_1004XXXX 14
  38. #define SUBSYS_1005XXXX 15
  39. #define SUBSYS_1020XXXX 16
  40. #define SUBSYS_1028XXXX 17
  41. #define SUBSYS_1700XXXX 18
  42. #define SUBSYS_1701XXXX 19
  43. #define SUBSYS_1702XXXX 20
  44. #define SUBSYS_1703XXXX 21
  45. #define SUBSYS_1800XXXX 22
  46. #define SUBSYS_1801XXXX 23
  47. #define SUBSYS_1802XXXX 24
  48. #define SUBSYS_1804XXXX 25
  49. #define SUBSYS_1805XXXX 26
  50. #define SUBSYS_1808XXXX 27
  51. #define SUBSYS_180aXXXX 28
  52. #define SUBSYS_180bXXXX 29
  53. #define CMDQ_EVENT_VDEC_LAT_SOF_0 0
  54. #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_0 1
  55. #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_1 2
  56. #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_2 3
  57. #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_3 4
  58. #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_4 5
  59. #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_5 6
  60. #define CMDQ_EVENT_VDEC_LAT_FRAME_DONE_6 7
  61. #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_0 8
  62. #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_1 9
  63. #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_2 10
  64. #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_3 11
  65. #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_4 12
  66. #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_5 13
  67. #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_6 14
  68. #define CMDQ_EVENT_VDEC_LAT_ENG_EVENT_7 15
  69. #define CMDQ_EVENT_ISP_FRAME_DONE_A 65
  70. #define CMDQ_EVENT_ISP_FRAME_DONE_B 66
  71. #define CMDQ_EVENT_ISP_FRAME_DONE_C 67
  72. #define CMDQ_EVENT_CAMSV0_PASS1_DONE 68
  73. #define CMDQ_EVENT_CAMSV02_PASS1_DONE 69
  74. #define CMDQ_EVENT_CAMSV1_PASS1_DONE 70
  75. #define CMDQ_EVENT_CAMSV2_PASS1_DONE 71
  76. #define CMDQ_EVENT_CAMSV3_PASS1_DONE 72
  77. #define CMDQ_EVENT_MRAW_0_PASS1_DONE 73
  78. #define CMDQ_EVENT_MRAW_1_PASS1_DONE 74
  79. #define CMDQ_EVENT_SENINF_CAM0_FIFO_FULL 75
  80. #define CMDQ_EVENT_SENINF_CAM1_FIFO_FULL 76
  81. #define CMDQ_EVENT_SENINF_CAM2_FIFO_FULL 77
  82. #define CMDQ_EVENT_SENINF_CAM3_FIFO_FULL 78
  83. #define CMDQ_EVENT_SENINF_CAM4_FIFO_FULL 79
  84. #define CMDQ_EVENT_SENINF_CAM5_FIFO_FULL 80
  85. #define CMDQ_EVENT_SENINF_CAM6_FIFO_FULL 81
  86. #define CMDQ_EVENT_SENINF_CAM7_FIFO_FULL 82
  87. #define CMDQ_EVENT_SENINF_CAM8_FIFO_FULL 83
  88. #define CMDQ_EVENT_SENINF_CAM9_FIFO_FULL 84
  89. #define CMDQ_EVENT_SENINF_CAM10_FIFO_FULL 85
  90. #define CMDQ_EVENT_SENINF_CAM11_FIFO_FULL 86
  91. #define CMDQ_EVENT_SENINF_CAM12_FIFO_FULL 87
  92. #define CMDQ_EVENT_TG_OVRUN_A_INT 88
  93. #define CMDQ_EVENT_DMA_R1_ERROR_A_INT 89
  94. #define CMDQ_EVENT_TG_OVRUN_B_INT 90
  95. #define CMDQ_EVENT_DMA_R1_ERROR_B_INT 91
  96. #define CMDQ_EVENT_TG_OVRUN_C_INT 92
  97. #define CMDQ_EVENT_DMA_R1_ERROR_C_INT 93
  98. #define CMDQ_EVENT_TG_OVRUN_M0_INT 94
  99. #define CMDQ_EVENT_DMA_R1_ERROR_M0_INT 95
  100. #define CMDQ_EVENT_TG_GRABERR_M0_INT 96
  101. #define CMDQ_EVENT_TG_GRABERR_M1_INT 97
  102. #define CMDQ_EVENT_TG_GRABERR_A_INT 98
  103. #define CMDQ_EVENT_CQ_VR_SNAP_A_INT 99
  104. #define CMDQ_EVENT_TG_GRABERR_B_INT 100
  105. #define CMDQ_EVENT_CQ_VR_SNAP_B_INT 101
  106. #define CMDQ_EVENT_TG_GRABERR_C_INT 102
  107. #define CMDQ_EVENT_CQ_VR_SNAP_C_INT 103
  108. #define CMDQ_EVENT_VENC_CMDQ_FRAME_DONE 129
  109. #define CMDQ_EVENT_VENC_CMDQ_PAUSE_DONE 130
  110. #define CMDQ_EVENT_JPGENC_CMDQ_DONE 131
  111. #define CMDQ_EVENT_VENC_CMDQ_MB_DONE 132
  112. #define CMDQ_EVENT_VENC_CMDQ_128BYTE_CNT_DONE 133
  113. #define CMDQ_EVENT_VENC_C0_CMDQ_WP_2ND_STAGE_DONE 134
  114. #define CMDQ_EVENT_VENC_C0_CMDQ_WP_3RD_STAGE_DONE 135
  115. #define CMDQ_EVENT_VENC_CMDQ_PPS_DONE 136
  116. #define CMDQ_EVENT_VENC_CMDQ_SPS_DONE 137
  117. #define CMDQ_EVENT_VENC_CMDQ_VPS_DONE 138
  118. #define CMDQ_EVENT_VDEC_CORE0_SOF_0 160
  119. #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_0 161
  120. #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_1 162
  121. #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_2 163
  122. #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_3 164
  123. #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_4 165
  124. #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_5 166
  125. #define CMDQ_EVENT_VDEC_CORE0_FRAME_DONE_6 167
  126. #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_0 168
  127. #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_1 169
  128. #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_2 170
  129. #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_3 171
  130. #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_4 172
  131. #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_5 173
  132. #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_6 174
  133. #define CMDQ_EVENT_VDEC_CORE0_ENG_EVENT_7 175
  134. #define CMDQ_EVENT_FDVT_DONE 177
  135. #define CMDQ_EVENT_FE_DONE 178
  136. #define CMDQ_EVENT_RSC_DONE 179
  137. #define CMDQ_EVENT_DVS_DONE_ASYNC_SHOT 180
  138. #define CMDQ_EVENT_DVP_DONE_ASYNC_SHOT 181
  139. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_0 193
  140. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_1 194
  141. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_2 195
  142. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_3 196
  143. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_4 197
  144. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_5 198
  145. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_6 199
  146. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_7 200
  147. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_8 201
  148. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_9 202
  149. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_10 203
  150. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_11 204
  151. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_12 205
  152. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_13 206
  153. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_14 207
  154. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_15 208
  155. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_16 209
  156. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_17 210
  157. #define CMDQ_EVENT_IMG2_DIP_FRAME_DONE_P2_18 211
  158. #define CMDQ_EVENT_IMG2_DIP_DMA_ERR_EVENT 212
  159. #define CMDQ_EVENT_IMG2_AMD_FRAME_DONE 213
  160. #define CMDQ_EVENT_IMG2_MFB_DONE_LINK_MISC 214
  161. #define CMDQ_EVENT_IMG2_WPE_A_DONE_LINK_MISC 215
  162. #define CMDQ_EVENT_IMG2_MSS_DONE_LINK_MISC 216
  163. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_0 225
  164. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_1 226
  165. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_2 227
  166. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_3 228
  167. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_4 229
  168. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_5 230
  169. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_6 231
  170. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_7 232
  171. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_8 233
  172. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_9 234
  173. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_10 235
  174. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_11 236
  175. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_12 237
  176. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_13 238
  177. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_14 239
  178. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_15 240
  179. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_16 241
  180. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_17 242
  181. #define CMDQ_EVENT_IMG1_DIP_FRAME_DONE_P2_18 243
  182. #define CMDQ_EVENT_IMG1_DIP_DMA_ERR_EVENT 244
  183. #define CMDQ_EVENT_IMG1_AMD_FRAME_DONE 245
  184. #define CMDQ_EVENT_IMG1_MFB_DONE_LINK_MISC 246
  185. #define CMDQ_EVENT_IMG1_WPE_A_DONE_LINK_MISC 247
  186. #define CMDQ_EVENT_IMG1_MSS_DONE_LINK_MISC 248
  187. #define CMDQ_EVENT_MDP_RDMA0_SOF 256
  188. #define CMDQ_EVENT_MDP_RDMA1_SOF 257
  189. #define CMDQ_EVENT_MDP_AAL0_SOF 258
  190. #define CMDQ_EVENT_MDP_AAL1_SOF 259
  191. #define CMDQ_EVENT_MDP_HDR0_SOF 260
  192. #define CMDQ_EVENT_MDP_HDR1_SOF 261
  193. #define CMDQ_EVENT_MDP_RSZ0_SOF 262
  194. #define CMDQ_EVENT_MDP_RSZ1_SOF 263
  195. #define CMDQ_EVENT_MDP_WROT0_SOF 264
  196. #define CMDQ_EVENT_MDP_WROT1_SOF 265
  197. #define CMDQ_EVENT_MDP_TDSHP0_SOF 266
  198. #define CMDQ_EVENT_MDP_TDSHP1_SOF 267
  199. #define CMDQ_EVENT_IMG_DL_RELAY0_SOF 268
  200. #define CMDQ_EVENT_IMG_DL_RELAY1_SOF 269
  201. #define CMDQ_EVENT_MDP_COLOR0_SOF 270
  202. #define CMDQ_EVENT_MDP_COLOR1_SOF 271
  203. #define CMDQ_EVENT_MDP_WROT1_FRAME_DONE 290
  204. #define CMDQ_EVENT_MDP_WROT0_FRAME_DONE 291
  205. #define CMDQ_EVENT_MDP_TDSHP1_FRAME_DONE 294
  206. #define CMDQ_EVENT_MDP_TDSHP0_FRAME_DONE 295
  207. #define CMDQ_EVENT_MDP_RSZ1_FRAME_DONE 302
  208. #define CMDQ_EVENT_MDP_RSZ0_FRAME_DONE 303
  209. #define CMDQ_EVENT_MDP_RDMA1_FRAME_DONE 306
  210. #define CMDQ_EVENT_MDP_RDMA0_FRAME_DONE 307
  211. #define CMDQ_EVENT_MDP_HDR1_FRAME_DONE 308
  212. #define CMDQ_EVENT_MDP_HDR0_FRAME_DONE 309
  213. #define CMDQ_EVENT_MDP_COLOR1_FRAME_DONE 312
  214. #define CMDQ_EVENT_MDP_COLOR0_FRAME_DONE 313
  215. #define CMDQ_EVENT_MDP_AAL1_FRAME_DONE 316
  216. #define CMDQ_EVENT_MDP_AAL0_FRAME_DONE 317
  217. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_0 320
  218. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_1 321
  219. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_2 322
  220. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_3 323
  221. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_4 324
  222. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_5 325
  223. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_6 326
  224. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_7 327
  225. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_8 328
  226. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_9 329
  227. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_10 330
  228. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_11 331
  229. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_12 332
  230. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_13 333
  231. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_14 334
  232. #define CMDQ_EVENT_MDP_STREAM_DONE_ENG_EVENT_15 335
  233. #define CMDQ_EVENT_MDP_WROT1_SW_RST_DONE_ENG_EVENT 338
  234. #define CMDQ_EVENT_MDP_WROT0_SW_RST_DONE_ENG_EVENT 339
  235. #define CMDQ_EVENT_MDP_RDMA1_SW_RST_DONE_ENG_EVENT 342
  236. #define CMDQ_EVENT_MDP_RDMA0_SW_RST_DONE_ENG_EVENT 343
  237. #define CMDQ_EVENT_DISP_OVL0_SOF 384
  238. #define CMDQ_EVENT_DISP_OVL0_2L_SOF 385
  239. #define CMDQ_EVENT_DISP_RDMA0_SOF 386
  240. #define CMDQ_EVENT_DISP_RSZ0_SOF 387
  241. #define CMDQ_EVENT_DISP_COLOR0_SOF 388
  242. #define CMDQ_EVENT_DISP_CCORR0_SOF 389
  243. #define CMDQ_EVENT_DISP_AAL0_SOF 390
  244. #define CMDQ_EVENT_DISP_GAMMA0_SOF 391
  245. #define CMDQ_EVENT_DISP_POSTMASK0_SOF 392
  246. #define CMDQ_EVENT_DISP_DITHER0_SOF 393
  247. #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE0_SOF 394
  248. #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE1_SOF 395
  249. #define CMDQ_EVENT_DSI0_SOF 396
  250. #define CMDQ_EVENT_DISP_WDMA0_SOF 397
  251. #define CMDQ_EVENT_DISP_UFBC_WDMA0_SOF 398
  252. #define CMDQ_EVENT_DISP_PWM0_SOF 399
  253. #define CMDQ_EVENT_DISP_OVL2_2L_SOF 400
  254. #define CMDQ_EVENT_DISP_RDMA4_SOF 401
  255. #define CMDQ_EVENT_DISP_DPI0_SOF 402
  256. #define CMDQ_EVENT_MDP_RDMA4_SOF 403
  257. #define CMDQ_EVENT_MDP_HDR4_SOF 404
  258. #define CMDQ_EVENT_MDP_RSZ4_SOF 405
  259. #define CMDQ_EVENT_MDP_AAL4_SOF 406
  260. #define CMDQ_EVENT_MDP_TDSHP4_SOF 407
  261. #define CMDQ_EVENT_MDP_COLOR4_SOF 408
  262. #define CMDQ_EVENT_DISP_Y2R0_SOF 409
  263. #define CMDQ_EVENT_MDP_TDSHP4_FRAME_DONE 410
  264. #define CMDQ_EVENT_MDP_RSZ4_FRAME_DONE 411
  265. #define CMDQ_EVENT_MDP_RDMA4_FRAME_DONE 412
  266. #define CMDQ_EVENT_MDP_HDR4_FRAME_DONE 413
  267. #define CMDQ_EVENT_MDP_COLOR4_FRAME_DONE 414
  268. #define CMDQ_EVENT_MDP_AAL4_FRAME_DONE 415
  269. #define CMDQ_EVENT_DSI0_FRAME_DONE 416
  270. #define CMDQ_EVENT_DISP_WDMA0_FRAME_DONE 417
  271. #define CMDQ_EVENT_DISP_UFBC_WDMA0_FRAME_DONE 418
  272. #define CMDQ_EVENT_DISP_RSZ0_FRAME_DONE 419
  273. #define CMDQ_EVENT_DISP_RDMA4_FRAME_DONE 420
  274. #define CMDQ_EVENT_DISP_RDMA0_FRAME_DONE 421
  275. #define CMDQ_EVENT_DISP_POSTMASK0_FRAME_DONE 422
  276. #define CMDQ_EVENT_DISP_OVL2_2L_FRAME_DONE 423
  277. #define CMDQ_EVENT_DISP_OVL0_FRAME_DONE 424
  278. #define CMDQ_EVENT_DISP_OVL0_2L_FRAME_DONE 425
  279. #define CMDQ_EVENT_DISP_GAMMA0_FRAME_DONE 426
  280. #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE1_FRAME_DONE 427
  281. #define CMDQ_EVENT_DISP_DSC_WRAP0_CORE0_FRAME_DONE 428
  282. #define CMDQ_EVENT_DISP_DPI0_FRAME_DONE 429
  283. #define CMDQ_EVENT_DISP_DITHER0_FRAME_DONE 430
  284. #define CMDQ_EVENT_DISP_COLOR0_FRAME_DONE 431
  285. #define CMDQ_EVENT_DISP_CCORR0_FRAME_DONE 432
  286. #define CMDQ_EVENT_DISP_AAL0_FRAME_DONE 433
  287. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_0 434
  288. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_1 435
  289. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_2 436
  290. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_3 437
  291. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_4 438
  292. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_5 439
  293. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_6 440
  294. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_7 441
  295. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_8 442
  296. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_9 443
  297. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_10 444
  298. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_11 445
  299. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_12 446
  300. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_13 447
  301. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_14 448
  302. #define CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_15 449
  303. #define CMDQ_EVENT_DSI0_TE_ENG_EVENT 450
  304. #define CMDQ_EVENT_DSI0_IRQ_ENG_EVENT 451
  305. #define CMDQ_EVENT_DSI0_DONE_ENG_EVENT 452
  306. #define CMDQ_EVENT_DISP_WDMA0_SW_RST_DONE_ENG_EVENT 453
  307. #define CMDQ_EVENT_DISP_SMIASSERT_ENG_EVENT 454
  308. #define CMDQ_EVENT_DISP_POSTMASK0_RST_DONE_ENG_EVENT 455
  309. #define CMDQ_EVENT_DISP_OVL2_2L_RST_DONE_ENG_EVENT 456
  310. #define CMDQ_EVENT_DISP_OVL0_RST_DONE_ENG_EVENT 457
  311. #define CMDQ_EVENT_DISP_OVL0_2L_RST_DONE_ENG_EVENT 458
  312. #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_0 459
  313. #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_1 460
  314. #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_2 461
  315. #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_3 462
  316. #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_4 463
  317. #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_5 464
  318. #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_6 465
  319. #define CMDQ_EVENT_BUF_UNDERRUN_ENG_EVENT_7 466
  320. #define CMDQ_MAX_HW_EVENT 512
  321. #endif