sun50i-a100-ccu.h 2.7 KB

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  1. /* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
  2. /*
  3. * Copyright (c) 2020 Yangtao Li <[email protected]>
  4. */
  5. #ifndef _DT_BINDINGS_CLK_SUN50I_A100_H_
  6. #define _DT_BINDINGS_CLK_SUN50I_A100_H_
  7. #define CLK_PLL_PERIPH0 3
  8. #define CLK_CPUX 24
  9. #define CLK_APB1 29
  10. #define CLK_MBUS 31
  11. #define CLK_DE 32
  12. #define CLK_BUS_DE 33
  13. #define CLK_G2D 34
  14. #define CLK_BUS_G2D 35
  15. #define CLK_GPU 36
  16. #define CLK_BUS_GPU 37
  17. #define CLK_CE 38
  18. #define CLK_BUS_CE 39
  19. #define CLK_VE 40
  20. #define CLK_BUS_VE 41
  21. #define CLK_BUS_DMA 42
  22. #define CLK_BUS_MSGBOX 43
  23. #define CLK_BUS_SPINLOCK 44
  24. #define CLK_BUS_HSTIMER 45
  25. #define CLK_AVS 46
  26. #define CLK_BUS_DBG 47
  27. #define CLK_BUS_PSI 48
  28. #define CLK_BUS_PWM 49
  29. #define CLK_BUS_IOMMU 50
  30. #define CLK_MBUS_DMA 51
  31. #define CLK_MBUS_VE 52
  32. #define CLK_MBUS_CE 53
  33. #define CLK_MBUS_NAND 54
  34. #define CLK_MBUS_CSI 55
  35. #define CLK_MBUS_ISP 56
  36. #define CLK_MBUS_G2D 57
  37. #define CLK_NAND0 59
  38. #define CLK_NAND1 60
  39. #define CLK_BUS_NAND 61
  40. #define CLK_MMC0 62
  41. #define CLK_MMC1 63
  42. #define CLK_MMC2 64
  43. #define CLK_MMC3 65
  44. #define CLK_BUS_MMC0 66
  45. #define CLK_BUS_MMC1 67
  46. #define CLK_BUS_MMC2 68
  47. #define CLK_BUS_UART0 69
  48. #define CLK_BUS_UART1 70
  49. #define CLK_BUS_UART2 71
  50. #define CLK_BUS_UART3 72
  51. #define CLK_BUS_UART4 73
  52. #define CLK_BUS_I2C0 74
  53. #define CLK_BUS_I2C1 75
  54. #define CLK_BUS_I2C2 76
  55. #define CLK_BUS_I2C3 77
  56. #define CLK_SPI0 78
  57. #define CLK_SPI1 79
  58. #define CLK_SPI2 80
  59. #define CLK_BUS_SPI0 81
  60. #define CLK_BUS_SPI1 82
  61. #define CLK_BUS_SPI2 83
  62. #define CLK_EMAC_25M 84
  63. #define CLK_BUS_EMAC 85
  64. #define CLK_IR_RX 86
  65. #define CLK_BUS_IR_RX 87
  66. #define CLK_IR_TX 88
  67. #define CLK_BUS_IR_TX 89
  68. #define CLK_BUS_GPADC 90
  69. #define CLK_BUS_THS 91
  70. #define CLK_I2S0 92
  71. #define CLK_I2S1 93
  72. #define CLK_I2S2 94
  73. #define CLK_I2S3 95
  74. #define CLK_BUS_I2S0 96
  75. #define CLK_BUS_I2S1 97
  76. #define CLK_BUS_I2S2 98
  77. #define CLK_BUS_I2S3 99
  78. #define CLK_SPDIF 100
  79. #define CLK_BUS_SPDIF 101
  80. #define CLK_DMIC 102
  81. #define CLK_BUS_DMIC 103
  82. #define CLK_AUDIO_DAC 104
  83. #define CLK_AUDIO_ADC 105
  84. #define CLK_AUDIO_4X 106
  85. #define CLK_BUS_AUDIO_CODEC 107
  86. #define CLK_USB_OHCI0 108
  87. #define CLK_USB_PHY0 109
  88. #define CLK_USB_OHCI1 110
  89. #define CLK_USB_PHY1 111
  90. #define CLK_BUS_OHCI0 112
  91. #define CLK_BUS_OHCI1 113
  92. #define CLK_BUS_EHCI0 114
  93. #define CLK_BUS_EHCI1 115
  94. #define CLK_BUS_OTG 116
  95. #define CLK_BUS_LRADC 117
  96. #define CLK_BUS_DPSS_TOP0 118
  97. #define CLK_BUS_DPSS_TOP1 119
  98. #define CLK_MIPI_DSI 120
  99. #define CLK_BUS_MIPI_DSI 121
  100. #define CLK_TCON_LCD 122
  101. #define CLK_BUS_TCON_LCD 123
  102. #define CLK_LEDC 124
  103. #define CLK_BUS_LEDC 125
  104. #define CLK_CSI_TOP 126
  105. #define CLK_CSI0_MCLK 127
  106. #define CLK_CSI1_MCLK 128
  107. #define CLK_BUS_CSI 129
  108. #define CLK_CSI_ISP 130
  109. #endif /* _DT_BINDINGS_CLK_SUN50I_A100_H_ */